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Also having CTS done separately on different blocks is dangerous as the clock tree depth may be different between blocks causing unexpected hold/setup violations for signals going between different blocks. If I'm not mistaken, LibreLane supports P&R on subblocks separately but still CTS on top block.

I know that CTS recently(-ish) got the ability to place macro at different depth of the CTS depending on the min/max clock delay specified in the liberty file of the macros/sub-blocks. ( https://github.com/The-OpenROAD-Project/OpenROAD/issues/3759 )

Cool, thanks for all the tips. I guess I will have a play around with this and see what I come up with.

But TBH I'm not sure how common it is to harden various block independently. That prevents optimization at boundary and also cost area since macro are rectangular and blocks often harden more into blob shapes.

8:36 a.m.

The only case where I see blocks hardened as macro are highly optimized ones where there was significant manual/scripted/layout/... work to make it a separate block. Something like a SRAM / memory or something like that.

8:36 a.m.

Or of course analog-ish block like say a PLL.

8:36 a.m.

But I wouldn't say ... harden a SPI controller independently ... that'd be a lot of headache for virtually no benefits.

8:37 a.m.

Just my 2 cts ...

Thanks, appreciate the input. I'm not super familiar with this field and trying to learn. In my case, I'm studying SIMD lanes and thought to make the separate arithmetic units (say 32 of them) as I thought this is how 'real' designs are made. I had some severe congestion issues when trying to synth my top module

Olle

Thanks, appreciate the input. I'm not super familiar with this field and trying to learn. In my case, I'm studying SIMD lanes and thought to make the separate arithmetic units (say 32 of them) as I thought this is how 'real' designs are made. I had some severe congestion issues when trying to synth my top module

I'd consider looking into the placement/partitioning tuning options in librelane for how to possibly selectively nudge the density around congested blocks to be lower and/or nudge SIMD lanes to be substantially less-overlapping. If your SIMD instructions are complex enough it might be practical to force them into slices, though, to spend much more compute on optimizing a slice, afforded by then getting to just make 31 already-routed copies at no extra PnR compute for the dense intra-slice situation.

namibj

I'd consider looking into the placement/partitioning tuning options in librelane for how to possibly selectively nudge the density around congested blocks to be lower and/or nudge SIMD lanes to be substantially less-overlapping. If your SIMD instructions are complex enough it might be practical to force them into slices, though, to spend much more compute on optimizing a slice, afforded by then getting to just make 31 already-routed copies at no extra PnR compute for the dense intra-slice situation.

Right. Yeah, its basically option 2 I have been considering (slicing it into a module and instancing it 32 times). At least, that makes sense in my mind. But I understand now that this is a bit more complex than I first thought. I believe I need to specify where I/O to this 'macro' will be placed (like inputs on the left, outputs on the right), but I'm also having issues getting this to close. Well.

7:19 p.m.

Thanks for all the tips!

Olle

Right. Yeah, its basically option 2 I have been considering (slicing it into a module and instancing it 32 times). At least, that makes sense in my mind. But I understand now that this is a bit more complex than I first thought. I believe I need to specify where I/O to this 'macro' will be placed (like inputs on the left, outputs on the right), but I'm also having issues getting this to close. Well.

yeah ideally you'd somehow be able to tell it just that in this region there are 32 identical slices and that they're instances for the 32-wide datapath around it, and that it has to figure out PnR inside, outside, and has to figure out how it likes the ports placed. I'd probably give it opportunity to just place the ports wherever on the grid on one side in teh small slice and just roll with what it likes best there.