
Cell gf180mcu_fd_sc_mcu9t5v0__fillcap_8 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__fillcap_8 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__fillcap_8 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__fillcap_8 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__fillca |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__fillca 
-------------------------------------------|-------------------------------------------
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__fillcap_8 and gf180mcu_fd_sc_mcu9t5v0__fillcap_8 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__fillcap_16 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__fillcap_16 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__fillcap_16 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__fillcap_16 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__fillca |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__fillca 
-------------------------------------------|-------------------------------------------
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__fillcap_16 and gf180mcu_fd_sc_mcu9t5v0__fillcap_16 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__oai21_1 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__oai21_1 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__oai21_1 (0) disconnected node: B
Cell gf180mcu_fd_sc_mcu9t5v0__oai21_1 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__oai21_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__oai21_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__oai21_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__oai21_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__oai21_ |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__oai21_ 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
B                                          |B                                          
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__oai21_1 and gf180mcu_fd_sc_mcu9t5v0__oai21_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__mux2_1 (0) disconnected node: I0
Cell gf180mcu_fd_sc_mcu9t5v0__mux2_1 (0) disconnected node: I1
Cell gf180mcu_fd_sc_mcu9t5v0__mux2_1 (0) disconnected node: S
Cell gf180mcu_fd_sc_mcu9t5v0__mux2_1 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__mux2_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__mux2_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__mux2_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__mux2_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__mux2_1 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__mux2_1 
-------------------------------------------|-------------------------------------------
I0                                         |I0                                         
I1                                         |I1                                         
S                                          |S                                          
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__mux2_1 and gf180mcu_fd_sc_mcu9t5v0__mux2_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__fillcap_4 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__fillcap_4 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__fillcap_4 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__fillcap_4 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__fillca |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__fillca 
-------------------------------------------|-------------------------------------------
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__fillcap_4 and gf180mcu_fd_sc_mcu9t5v0__fillcap_4 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__dffrnq_1 (0) disconnected node: D
Cell gf180mcu_fd_sc_mcu9t5v0__dffrnq_1 (0) disconnected node: RN
Cell gf180mcu_fd_sc_mcu9t5v0__dffrnq_1 (0) disconnected node: CLK
Cell gf180mcu_fd_sc_mcu9t5v0__dffrnq_1 (0) disconnected node: Q
Cell gf180mcu_fd_sc_mcu9t5v0__dffrnq_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__dffrnq_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__dffrnq_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__dffrnq_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__dffrnq |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__dffrnq 
-------------------------------------------|-------------------------------------------
D                                          |D                                          
RN                                         |RN                                         
CLK                                        |CLK                                        
Q                                          |Q                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__dffrnq_1 and gf180mcu_fd_sc_mcu9t5v0__dffrnq_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__or3_1 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__or3_1 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__or3_1 (0) disconnected node: A3
Cell gf180mcu_fd_sc_mcu9t5v0__or3_1 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__or3_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__or3_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__or3_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__or3_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__or3_1  |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__or3_1  
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
A3                                         |A3                                         
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__or3_1 and gf180mcu_fd_sc_mcu9t5v0__or3_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__nor3_1 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__nor3_1 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__nor3_1 (0) disconnected node: A3
Cell gf180mcu_fd_sc_mcu9t5v0__nor3_1 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__nor3_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__nor3_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__nor3_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__nor3_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__nor3_1 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__nor3_1 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
A3                                         |A3                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__nor3_1 and gf180mcu_fd_sc_mcu9t5v0__nor3_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__aoi22_1 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__aoi22_1 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__aoi22_1 (0) disconnected node: B1
Cell gf180mcu_fd_sc_mcu9t5v0__aoi22_1 (0) disconnected node: B2
Cell gf180mcu_fd_sc_mcu9t5v0__aoi22_1 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__aoi22_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__aoi22_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__aoi22_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__aoi22_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__aoi22_ |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__aoi22_ 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
B1                                         |B1                                         
B2                                         |B2                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__aoi22_1 and gf180mcu_fd_sc_mcu9t5v0__aoi22_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__and2_1 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__and2_1 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__and2_1 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__and2_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__and2_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__and2_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__and2_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__and2_1 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__and2_1 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__and2_1 and gf180mcu_fd_sc_mcu9t5v0__and2_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__nand3_1 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__nand3_1 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__nand3_1 (0) disconnected node: A3
Cell gf180mcu_fd_sc_mcu9t5v0__nand3_1 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__nand3_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__nand3_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__nand3_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__nand3_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__nand3_ |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__nand3_ 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
A3                                         |A3                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__nand3_1 and gf180mcu_fd_sc_mcu9t5v0__nand3_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__fillcap_64 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__fillcap_64 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__fillcap_64 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__fillcap_64 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__fillca |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__fillca 
-------------------------------------------|-------------------------------------------
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__fillcap_64 and gf180mcu_fd_sc_mcu9t5v0__fillcap_64 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_1 (0) disconnected node: I
Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_1 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__clkinv |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__clkinv 
-------------------------------------------|-------------------------------------------
I                                          |I                                          
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__clkinv_1 and gf180mcu_fd_sc_mcu9t5v0__clkinv_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__nand2_1 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__nand2_1 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__nand2_1 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__nand2_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__nand2_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__nand2_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__nand2_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__nand2_ |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__nand2_ 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__nand2_1 and gf180mcu_fd_sc_mcu9t5v0__nand2_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_8 (0) disconnected node: I
Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_8 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_8 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_8 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_8 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_8 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__clkbuf |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__clkbuf 
-------------------------------------------|-------------------------------------------
I                                          |I                                          
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__clkbuf_8 and gf180mcu_fd_sc_mcu9t5v0__clkbuf_8 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__oai211_1 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__oai211_1 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__oai211_1 (0) disconnected node: B
Cell gf180mcu_fd_sc_mcu9t5v0__oai211_1 (0) disconnected node: C
Cell gf180mcu_fd_sc_mcu9t5v0__oai211_1 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__oai211_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__oai211_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__oai211_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__oai211_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__oai211 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__oai211 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
B                                          |B                                          
C                                          |C                                          
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__oai211_1 and gf180mcu_fd_sc_mcu9t5v0__oai211_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__aoi21_1 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__aoi21_1 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__aoi21_1 (0) disconnected node: B
Cell gf180mcu_fd_sc_mcu9t5v0__aoi21_1 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__aoi21_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__aoi21_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__aoi21_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__aoi21_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__aoi21_ |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__aoi21_ 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
B                                          |B                                          
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__aoi21_1 and gf180mcu_fd_sc_mcu9t5v0__aoi21_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__dlya_1 (0) disconnected node: I
Cell gf180mcu_fd_sc_mcu9t5v0__dlya_1 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__dlya_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__dlya_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__dlya_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__dlya_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__dlya_1 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__dlya_1 
-------------------------------------------|-------------------------------------------
I                                          |I                                          
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__dlya_1 and gf180mcu_fd_sc_mcu9t5v0__dlya_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__oai21_2 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__oai21_2 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__oai21_2 (0) disconnected node: B
Cell gf180mcu_fd_sc_mcu9t5v0__oai21_2 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__oai21_2 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__oai21_2 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__oai21_2 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__oai21_2 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__oai21_ |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__oai21_ 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
B                                          |B                                          
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__oai21_2 and gf180mcu_fd_sc_mcu9t5v0__oai21_2 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__fillcap_32 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__fillcap_32 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__fillcap_32 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__fillcap_32 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__fillca |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__fillca 
-------------------------------------------|-------------------------------------------
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__fillcap_32 and gf180mcu_fd_sc_mcu9t5v0__fillcap_32 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__mux2_4 (0) disconnected node: I0
Cell gf180mcu_fd_sc_mcu9t5v0__mux2_4 (0) disconnected node: I1
Cell gf180mcu_fd_sc_mcu9t5v0__mux2_4 (0) disconnected node: S
Cell gf180mcu_fd_sc_mcu9t5v0__mux2_4 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__mux2_4 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__mux2_4 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__mux2_4 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__mux2_4 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__mux2_4 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__mux2_4 
-------------------------------------------|-------------------------------------------
I0                                         |I0                                         
I1                                         |I1                                         
S                                          |S                                          
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__mux2_4 and gf180mcu_fd_sc_mcu9t5v0__mux2_4 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_2 (0) disconnected node: I
Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_2 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_2 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_2 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_2 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_2 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__clkbuf |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__clkbuf 
-------------------------------------------|-------------------------------------------
I                                          |I                                          
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__clkbuf_2 and gf180mcu_fd_sc_mcu9t5v0__clkbuf_2 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__nor2_1 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__nor2_1 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__nor2_1 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__nor2_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__nor2_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__nor2_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__nor2_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__nor2_1 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__nor2_1 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__nor2_1 and gf180mcu_fd_sc_mcu9t5v0__nor2_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__oai31_1 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__oai31_1 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__oai31_1 (0) disconnected node: A3
Cell gf180mcu_fd_sc_mcu9t5v0__oai31_1 (0) disconnected node: B
Cell gf180mcu_fd_sc_mcu9t5v0__oai31_1 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__oai31_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__oai31_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__oai31_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__oai31_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__oai31_ |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__oai31_ 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
A3                                         |A3                                         
B                                          |B                                          
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__oai31_1 and gf180mcu_fd_sc_mcu9t5v0__oai31_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_1 (0) disconnected node: I
Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_1 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__clkbuf |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__clkbuf 
-------------------------------------------|-------------------------------------------
I                                          |I                                          
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__clkbuf_1 and gf180mcu_fd_sc_mcu9t5v0__clkbuf_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__or2_1 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__or2_1 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__or2_1 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__or2_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__or2_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__or2_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__or2_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__or2_1  |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__or2_1  
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__or2_1 and gf180mcu_fd_sc_mcu9t5v0__or2_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__and3_1 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__and3_1 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__and3_1 (0) disconnected node: A3
Cell gf180mcu_fd_sc_mcu9t5v0__and3_1 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__and3_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__and3_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__and3_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__and3_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__and3_1 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__and3_1 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
A3                                         |A3                                         
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__and3_1 and gf180mcu_fd_sc_mcu9t5v0__and3_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__nand4_1 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__nand4_1 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__nand4_1 (0) disconnected node: A3
Cell gf180mcu_fd_sc_mcu9t5v0__nand4_1 (0) disconnected node: A4
Cell gf180mcu_fd_sc_mcu9t5v0__nand4_1 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__nand4_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__nand4_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__nand4_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__nand4_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__nand4_ |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__nand4_ 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
A3                                         |A3                                         
A4                                         |A4                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__nand4_1 and gf180mcu_fd_sc_mcu9t5v0__nand4_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__dlyd_1 (0) disconnected node: I
Cell gf180mcu_fd_sc_mcu9t5v0__dlyd_1 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__dlyd_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__dlyd_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__dlyd_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__dlyd_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__dlyd_1 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__dlyd_1 
-------------------------------------------|-------------------------------------------
I                                          |I                                          
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__dlyd_1 and gf180mcu_fd_sc_mcu9t5v0__dlyd_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__aoi221_1 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__aoi221_1 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__aoi221_1 (0) disconnected node: B1
Cell gf180mcu_fd_sc_mcu9t5v0__aoi221_1 (0) disconnected node: B2
Cell gf180mcu_fd_sc_mcu9t5v0__aoi221_1 (0) disconnected node: C
Cell gf180mcu_fd_sc_mcu9t5v0__aoi221_1 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__aoi221_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__aoi221_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__aoi221_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__aoi221_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__aoi221 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__aoi221 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
B1                                         |B1                                         
B2                                         |B2                                         
C                                          |C                                          
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__aoi221_1 and gf180mcu_fd_sc_mcu9t5v0__aoi221_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__buf_2 (0) disconnected node: I
Cell gf180mcu_fd_sc_mcu9t5v0__buf_2 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__buf_2 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__buf_2 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__buf_2 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__buf_2 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__buf_2  |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__buf_2  
-------------------------------------------|-------------------------------------------
I                                          |I                                          
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__buf_2 and gf180mcu_fd_sc_mcu9t5v0__buf_2 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__buf_4 (0) disconnected node: I
Cell gf180mcu_fd_sc_mcu9t5v0__buf_4 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__buf_4 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__buf_4 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__buf_4 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__buf_4 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__buf_4  |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__buf_4  
-------------------------------------------|-------------------------------------------
I                                          |I                                          
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__buf_4 and gf180mcu_fd_sc_mcu9t5v0__buf_4 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__and4_1 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__and4_1 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__and4_1 (0) disconnected node: A3
Cell gf180mcu_fd_sc_mcu9t5v0__and4_1 (0) disconnected node: A4
Cell gf180mcu_fd_sc_mcu9t5v0__and4_1 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__and4_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__and4_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__and4_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__and4_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__and4_1 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__and4_1 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
A3                                         |A3                                         
A4                                         |A4                                         
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__and4_1 and gf180mcu_fd_sc_mcu9t5v0__and4_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__dffsnq_1 (0) disconnected node: D
Cell gf180mcu_fd_sc_mcu9t5v0__dffsnq_1 (0) disconnected node: SETN
Cell gf180mcu_fd_sc_mcu9t5v0__dffsnq_1 (0) disconnected node: CLK
Cell gf180mcu_fd_sc_mcu9t5v0__dffsnq_1 (0) disconnected node: Q
Cell gf180mcu_fd_sc_mcu9t5v0__dffsnq_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__dffsnq_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__dffsnq_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__dffsnq_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__dffsnq |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__dffsnq 
-------------------------------------------|-------------------------------------------
D                                          |D                                          
SETN                                       |SETN                                       
CLK                                        |CLK                                        
Q                                          |Q                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__dffsnq_1 and gf180mcu_fd_sc_mcu9t5v0__dffsnq_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__aoi222_1 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__aoi222_1 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__aoi222_1 (0) disconnected node: B1
Cell gf180mcu_fd_sc_mcu9t5v0__aoi222_1 (0) disconnected node: B2
Cell gf180mcu_fd_sc_mcu9t5v0__aoi222_1 (0) disconnected node: C1
Cell gf180mcu_fd_sc_mcu9t5v0__aoi222_1 (0) disconnected node: C2
Cell gf180mcu_fd_sc_mcu9t5v0__aoi222_1 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__aoi222_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__aoi222_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__aoi222_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__aoi222_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__aoi222 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__aoi222 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
B1                                         |B1                                         
B2                                         |B2                                         
C1                                         |C1                                         
C2                                         |C2                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__aoi222_1 and gf180mcu_fd_sc_mcu9t5v0__aoi222_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__aoi211_1 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__aoi211_1 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__aoi211_1 (0) disconnected node: B
Cell gf180mcu_fd_sc_mcu9t5v0__aoi211_1 (0) disconnected node: C
Cell gf180mcu_fd_sc_mcu9t5v0__aoi211_1 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__aoi211_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__aoi211_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__aoi211_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__aoi211_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__aoi211 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__aoi211 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
B                                          |B                                          
C                                          |C                                          
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__aoi211_1 and gf180mcu_fd_sc_mcu9t5v0__aoi211_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__nor4_1 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__nor4_1 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__nor4_1 (0) disconnected node: A3
Cell gf180mcu_fd_sc_mcu9t5v0__nor4_1 (0) disconnected node: A4
Cell gf180mcu_fd_sc_mcu9t5v0__nor4_1 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__nor4_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__nor4_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__nor4_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__nor4_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__nor4_1 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__nor4_1 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
A3                                         |A3                                         
A4                                         |A4                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__nor4_1 and gf180mcu_fd_sc_mcu9t5v0__nor4_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_4 (0) disconnected node: I
Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_4 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_4 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_4 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_4 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_4 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__clkbuf |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__clkbuf 
-------------------------------------------|-------------------------------------------
I                                          |I                                          
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__clkbuf_4 and gf180mcu_fd_sc_mcu9t5v0__clkbuf_4 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__nor3_2 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__nor3_2 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__nor3_2 (0) disconnected node: A3
Cell gf180mcu_fd_sc_mcu9t5v0__nor3_2 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__nor3_2 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__nor3_2 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__nor3_2 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__nor3_2 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__nor3_2 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__nor3_2 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
A3                                         |A3                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__nor3_2 and gf180mcu_fd_sc_mcu9t5v0__nor3_2 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__nor2_2 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__nor2_2 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__nor2_2 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__nor2_2 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__nor2_2 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__nor2_2 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__nor2_2 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__nor2_2 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__nor2_2 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__nor2_2 and gf180mcu_fd_sc_mcu9t5v0__nor2_2 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__nor3_4 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__nor3_4 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__nor3_4 (0) disconnected node: A3
Cell gf180mcu_fd_sc_mcu9t5v0__nor3_4 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__nor3_4 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__nor3_4 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__nor3_4 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__nor3_4 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__nor3_4 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__nor3_4 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
A3                                         |A3                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__nor3_4 and gf180mcu_fd_sc_mcu9t5v0__nor3_4 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__dffq_1 (0) disconnected node: D
Cell gf180mcu_fd_sc_mcu9t5v0__dffq_1 (0) disconnected node: CLK
Cell gf180mcu_fd_sc_mcu9t5v0__dffq_1 (0) disconnected node: Q
Cell gf180mcu_fd_sc_mcu9t5v0__dffq_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__dffq_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__dffq_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__dffq_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__dffq_1 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__dffq_1 
-------------------------------------------|-------------------------------------------
D                                          |D                                          
CLK                                        |CLK                                        
Q                                          |Q                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__dffq_1 and gf180mcu_fd_sc_mcu9t5v0__dffq_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__dlyc_1 (0) disconnected node: I
Cell gf180mcu_fd_sc_mcu9t5v0__dlyc_1 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__dlyc_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__dlyc_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__dlyc_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__dlyc_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__dlyc_1 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__dlyc_1 
-------------------------------------------|-------------------------------------------
I                                          |I                                          
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__dlyc_1 and gf180mcu_fd_sc_mcu9t5v0__dlyc_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__buf_1 (0) disconnected node: I
Cell gf180mcu_fd_sc_mcu9t5v0__buf_1 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__buf_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__buf_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__buf_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__buf_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__buf_1  |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__buf_1  
-------------------------------------------|-------------------------------------------
I                                          |I                                          
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__buf_1 and gf180mcu_fd_sc_mcu9t5v0__buf_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__oai221_1 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__oai221_1 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__oai221_1 (0) disconnected node: B1
Cell gf180mcu_fd_sc_mcu9t5v0__oai221_1 (0) disconnected node: B2
Cell gf180mcu_fd_sc_mcu9t5v0__oai221_1 (0) disconnected node: C
Cell gf180mcu_fd_sc_mcu9t5v0__oai221_1 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__oai221_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__oai221_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__oai221_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__oai221_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__oai221 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__oai221 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
B1                                         |B1                                         
B2                                         |B2                                         
C                                          |C                                          
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__oai221_1 and gf180mcu_fd_sc_mcu9t5v0__oai221_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__buf_8 (0) disconnected node: I
Cell gf180mcu_fd_sc_mcu9t5v0__buf_8 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__buf_8 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__buf_8 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__buf_8 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__buf_8 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__buf_8  |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__buf_8  
-------------------------------------------|-------------------------------------------
I                                          |I                                          
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__buf_8 and gf180mcu_fd_sc_mcu9t5v0__buf_8 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__tiel (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__tiel (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__tiel (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__tiel (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__tiel (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__tiel   |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__tiel   
-------------------------------------------|-------------------------------------------
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__tiel and gf180mcu_fd_sc_mcu9t5v0__tiel are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__aoi22_4 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__aoi22_4 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__aoi22_4 (0) disconnected node: B1
Cell gf180mcu_fd_sc_mcu9t5v0__aoi22_4 (0) disconnected node: B2
Cell gf180mcu_fd_sc_mcu9t5v0__aoi22_4 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__aoi22_4 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__aoi22_4 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__aoi22_4 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__aoi22_4 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__aoi22_ |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__aoi22_ 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
B1                                         |B1                                         
B2                                         |B2                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__aoi22_4 and gf180mcu_fd_sc_mcu9t5v0__aoi22_4 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__nand4_2 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__nand4_2 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__nand4_2 (0) disconnected node: A3
Cell gf180mcu_fd_sc_mcu9t5v0__nand4_2 (0) disconnected node: A4
Cell gf180mcu_fd_sc_mcu9t5v0__nand4_2 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__nand4_2 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__nand4_2 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__nand4_2 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__nand4_2 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__nand4_ |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__nand4_ 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
A3                                         |A3                                         
A4                                         |A4                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__nand4_2 and gf180mcu_fd_sc_mcu9t5v0__nand4_2 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__dffrnq_2 (0) disconnected node: D
Cell gf180mcu_fd_sc_mcu9t5v0__dffrnq_2 (0) disconnected node: RN
Cell gf180mcu_fd_sc_mcu9t5v0__dffrnq_2 (0) disconnected node: CLK
Cell gf180mcu_fd_sc_mcu9t5v0__dffrnq_2 (0) disconnected node: Q
Cell gf180mcu_fd_sc_mcu9t5v0__dffrnq_2 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__dffrnq_2 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__dffrnq_2 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__dffrnq_2 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__dffrnq |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__dffrnq 
-------------------------------------------|-------------------------------------------
D                                          |D                                          
RN                                         |RN                                         
CLK                                        |CLK                                        
Q                                          |Q                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__dffrnq_2 and gf180mcu_fd_sc_mcu9t5v0__dffrnq_2 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__oai222_1 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__oai222_1 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__oai222_1 (0) disconnected node: B1
Cell gf180mcu_fd_sc_mcu9t5v0__oai222_1 (0) disconnected node: B2
Cell gf180mcu_fd_sc_mcu9t5v0__oai222_1 (0) disconnected node: C1
Cell gf180mcu_fd_sc_mcu9t5v0__oai222_1 (0) disconnected node: C2
Cell gf180mcu_fd_sc_mcu9t5v0__oai222_1 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__oai222_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__oai222_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__oai222_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__oai222_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__oai222 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__oai222 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
B1                                         |B1                                         
B2                                         |B2                                         
C1                                         |C1                                         
C2                                         |C2                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__oai222_1 and gf180mcu_fd_sc_mcu9t5v0__oai222_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__xnor2_1 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__xnor2_1 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__xnor2_1 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__xnor2_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__xnor2_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__xnor2_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__xnor2_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__xnor2_ |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__xnor2_ 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__xnor2_1 and gf180mcu_fd_sc_mcu9t5v0__xnor2_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__antenna (0) disconnected node: I
Cell gf180mcu_fd_sc_mcu9t5v0__antenna (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__antenna (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__antenna (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__antenna (0) disconnected node: VSS
Cell gf180mcu_fd_sc_mcu9t5v0__antenna (1) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__antenna (1) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__antenn |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__antenn 
-------------------------------------------|-------------------------------------------
I                                          |I                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__antenna and gf180mcu_fd_sc_mcu9t5v0__antenna are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__dlyb_1 (0) disconnected node: I
Cell gf180mcu_fd_sc_mcu9t5v0__dlyb_1 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__dlyb_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__dlyb_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__dlyb_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__dlyb_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__dlyb_1 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__dlyb_1 
-------------------------------------------|-------------------------------------------
I                                          |I                                          
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__dlyb_1 and gf180mcu_fd_sc_mcu9t5v0__dlyb_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__nand4_4 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__nand4_4 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__nand4_4 (0) disconnected node: A3
Cell gf180mcu_fd_sc_mcu9t5v0__nand4_4 (0) disconnected node: A4
Cell gf180mcu_fd_sc_mcu9t5v0__nand4_4 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__nand4_4 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__nand4_4 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__nand4_4 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__nand4_4 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__nand4_ |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__nand4_ 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
A3                                         |A3                                         
A4                                         |A4                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__nand4_4 and gf180mcu_fd_sc_mcu9t5v0__nand4_4 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__oai22_1 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__oai22_1 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__oai22_1 (0) disconnected node: B1
Cell gf180mcu_fd_sc_mcu9t5v0__oai22_1 (0) disconnected node: B2
Cell gf180mcu_fd_sc_mcu9t5v0__oai22_1 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__oai22_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__oai22_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__oai22_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__oai22_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__oai22_ |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__oai22_ 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
B1                                         |B1                                         
B2                                         |B2                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__oai22_1 and gf180mcu_fd_sc_mcu9t5v0__oai22_1 are equivalent.

Cell gf180mcu_fd_io__fill10 (0) disconnected node: DVDD
Cell gf180mcu_fd_io__fill10 (0) disconnected node: DVSS
Cell gf180mcu_fd_io__fill10 (0) disconnected node: VDD
Cell gf180mcu_fd_io__fill10 (0) disconnected node: VSS
Cell gf180mcu_fd_io__fill10 (1) disconnected node: DVDD
Cell gf180mcu_fd_io__fill10 (1) disconnected node: DVSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_io__fill10          |Circuit 2: gf180mcu_fd_io__fill10          
-------------------------------------------|-------------------------------------------
DVDD                                       |DVDD                                       
DVSS                                       |DVSS                                       
VDD                                        |VDD                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_io__fill10 and gf180mcu_fd_io__fill10 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__or4_1 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__or4_1 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__or4_1 (0) disconnected node: A3
Cell gf180mcu_fd_sc_mcu9t5v0__or4_1 (0) disconnected node: A4
Cell gf180mcu_fd_sc_mcu9t5v0__or4_1 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__or4_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__or4_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__or4_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__or4_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__or4_1  |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__or4_1  
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
A3                                         |A3                                         
A4                                         |A4                                         
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__or4_1 and gf180mcu_fd_sc_mcu9t5v0__or4_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__oai221_2 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__oai221_2 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__oai221_2 (0) disconnected node: B1
Cell gf180mcu_fd_sc_mcu9t5v0__oai221_2 (0) disconnected node: B2
Cell gf180mcu_fd_sc_mcu9t5v0__oai221_2 (0) disconnected node: C
Cell gf180mcu_fd_sc_mcu9t5v0__oai221_2 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__oai221_2 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__oai221_2 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__oai221_2 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__oai221_2 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__oai221 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__oai221 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
B1                                         |B1                                         
B2                                         |B2                                         
C                                          |C                                          
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__oai221_2 and gf180mcu_fd_sc_mcu9t5v0__oai221_2 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__oai32_1 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__oai32_1 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__oai32_1 (0) disconnected node: A3
Cell gf180mcu_fd_sc_mcu9t5v0__oai32_1 (0) disconnected node: B1
Cell gf180mcu_fd_sc_mcu9t5v0__oai32_1 (0) disconnected node: B2
Cell gf180mcu_fd_sc_mcu9t5v0__oai32_1 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__oai32_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__oai32_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__oai32_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__oai32_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__oai32_ |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__oai32_ 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
A3                                         |A3                                         
B1                                         |B1                                         
B2                                         |B2                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__oai32_1 and gf180mcu_fd_sc_mcu9t5v0__oai32_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__xor2_1 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__xor2_1 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__xor2_1 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__xor2_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__xor2_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__xor2_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__xor2_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__xor2_1 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__xor2_1 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__xor2_1 and gf180mcu_fd_sc_mcu9t5v0__xor2_1 are equivalent.

Cell gf180mcu_fd_io__fill5 (0) disconnected node: DVDD
Cell gf180mcu_fd_io__fill5 (0) disconnected node: DVSS
Cell gf180mcu_fd_io__fill5 (0) disconnected node: VDD
Cell gf180mcu_fd_io__fill5 (0) disconnected node: VSS
Cell gf180mcu_fd_io__fill5 (1) disconnected node: DVDD
Cell gf180mcu_fd_io__fill5 (1) disconnected node: DVSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_io__fill5           |Circuit 2: gf180mcu_fd_io__fill5           
-------------------------------------------|-------------------------------------------
DVDD                                       |DVDD                                       
DVSS                                       |DVSS                                       
VDD                                        |VDD                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_io__fill5 and gf180mcu_fd_io__fill5 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__oai33_1 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__oai33_1 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__oai33_1 (0) disconnected node: A3
Cell gf180mcu_fd_sc_mcu9t5v0__oai33_1 (0) disconnected node: B1
Cell gf180mcu_fd_sc_mcu9t5v0__oai33_1 (0) disconnected node: B2
Cell gf180mcu_fd_sc_mcu9t5v0__oai33_1 (0) disconnected node: B3
Cell gf180mcu_fd_sc_mcu9t5v0__oai33_1 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__oai33_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__oai33_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__oai33_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__oai33_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__oai33_ |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__oai33_ 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
A3                                         |A3                                         
B1                                         |B1                                         
B2                                         |B2                                         
B3                                         |B3                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__oai33_1 and gf180mcu_fd_sc_mcu9t5v0__oai33_1 are equivalent.

Cell gf180mcu_fd_io__bi_24t (0) disconnected node: A
Cell gf180mcu_fd_io__bi_24t (0) disconnected node: CS
Cell gf180mcu_fd_io__bi_24t (0) disconnected node: DVDD
Cell gf180mcu_fd_io__bi_24t (0) disconnected node: DVSS
Cell gf180mcu_fd_io__bi_24t (0) disconnected node: IE
Cell gf180mcu_fd_io__bi_24t (0) disconnected node: OE
Cell gf180mcu_fd_io__bi_24t (0) disconnected node: PAD
Cell gf180mcu_fd_io__bi_24t (0) disconnected node: PD
Cell gf180mcu_fd_io__bi_24t (0) disconnected node: PU
Cell gf180mcu_fd_io__bi_24t (0) disconnected node: SL
Cell gf180mcu_fd_io__bi_24t (0) disconnected node: VDD
Cell gf180mcu_fd_io__bi_24t (0) disconnected node: VSS
Cell gf180mcu_fd_io__bi_24t (0) disconnected node: Y

Subcircuit pins:
Circuit 1: gf180mcu_fd_io__bi_24t          |Circuit 2: gf180mcu_fd_io__bi_24t          
-------------------------------------------|-------------------------------------------
A                                          |A                                          
CS                                         |CS                                         
DVDD                                       |DVDD                                       
DVSS                                       |DVSS                                       
IE                                         |IE                                         
OE                                         |OE                                         
PAD                                        |PAD                                        
PD                                         |PD                                         
PU                                         |PU                                         
SL                                         |SL                                         
VDD                                        |VDD                                        
VSS                                        |VSS                                        
Y                                          |Y                                          
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_io__bi_24t and gf180mcu_fd_io__bi_24t are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_3 (0) disconnected node: I
Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_3 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_3 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_3 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_3 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_3 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__clkbuf |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__clkbuf 
-------------------------------------------|-------------------------------------------
I                                          |I                                          
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__clkbuf_3 and gf180mcu_fd_sc_mcu9t5v0__clkbuf_3 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__aoi222_2 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__aoi222_2 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__aoi222_2 (0) disconnected node: B1
Cell gf180mcu_fd_sc_mcu9t5v0__aoi222_2 (0) disconnected node: B2
Cell gf180mcu_fd_sc_mcu9t5v0__aoi222_2 (0) disconnected node: C1
Cell gf180mcu_fd_sc_mcu9t5v0__aoi222_2 (0) disconnected node: C2
Cell gf180mcu_fd_sc_mcu9t5v0__aoi222_2 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__aoi222_2 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__aoi222_2 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__aoi222_2 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__aoi222_2 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__aoi222 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__aoi222 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
B1                                         |B1                                         
B2                                         |B2                                         
C1                                         |C1                                         
C2                                         |C2                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__aoi222_2 and gf180mcu_fd_sc_mcu9t5v0__aoi222_2 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__or2_2 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__or2_2 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__or2_2 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__or2_2 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__or2_2 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__or2_2 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__or2_2 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__or2_2  |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__or2_2  
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__or2_2 and gf180mcu_fd_sc_mcu9t5v0__or2_2 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__aoi221_2 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__aoi221_2 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__aoi221_2 (0) disconnected node: B1
Cell gf180mcu_fd_sc_mcu9t5v0__aoi221_2 (0) disconnected node: B2
Cell gf180mcu_fd_sc_mcu9t5v0__aoi221_2 (0) disconnected node: C
Cell gf180mcu_fd_sc_mcu9t5v0__aoi221_2 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__aoi221_2 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__aoi221_2 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__aoi221_2 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__aoi221_2 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__aoi221 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__aoi221 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
B1                                         |B1                                         
B2                                         |B2                                         
C                                          |C                                          
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__aoi221_2 and gf180mcu_fd_sc_mcu9t5v0__aoi221_2 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__or3_2 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__or3_2 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__or3_2 (0) disconnected node: A3
Cell gf180mcu_fd_sc_mcu9t5v0__or3_2 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__or3_2 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__or3_2 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__or3_2 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__or3_2 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__or3_2  |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__or3_2  
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
A3                                         |A3                                         
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__or3_2 and gf180mcu_fd_sc_mcu9t5v0__or3_2 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__nand2_2 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__nand2_2 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__nand2_2 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__nand2_2 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__nand2_2 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__nand2_2 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__nand2_2 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__nand2_ |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__nand2_ 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__nand2_2 and gf180mcu_fd_sc_mcu9t5v0__nand2_2 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__oai31_2 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__oai31_2 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__oai31_2 (0) disconnected node: A3
Cell gf180mcu_fd_sc_mcu9t5v0__oai31_2 (0) disconnected node: B
Cell gf180mcu_fd_sc_mcu9t5v0__oai31_2 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__oai31_2 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__oai31_2 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__oai31_2 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__oai31_2 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__oai31_ |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__oai31_ 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
A3                                         |A3                                         
B                                          |B                                          
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__oai31_2 and gf180mcu_fd_sc_mcu9t5v0__oai31_2 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__xnor2_2 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__xnor2_2 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__xnor2_2 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__xnor2_2 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__xnor2_2 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__xnor2_2 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__xnor2_2 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__xnor2_ |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__xnor2_ 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__xnor2_2 and gf180mcu_fd_sc_mcu9t5v0__xnor2_2 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__inv_1 (0) disconnected node: I
Cell gf180mcu_fd_sc_mcu9t5v0__inv_1 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__inv_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__inv_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__inv_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__inv_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__inv_1  |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__inv_1  
-------------------------------------------|-------------------------------------------
I                                          |I                                          
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__inv_1 and gf180mcu_fd_sc_mcu9t5v0__inv_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__and2_2 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__and2_2 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__and2_2 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__and2_2 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__and2_2 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__and2_2 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__and2_2 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__and2_2 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__and2_2 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__and2_2 and gf180mcu_fd_sc_mcu9t5v0__and2_2 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__oai33_4 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__oai33_4 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__oai33_4 (0) disconnected node: A3
Cell gf180mcu_fd_sc_mcu9t5v0__oai33_4 (0) disconnected node: B1
Cell gf180mcu_fd_sc_mcu9t5v0__oai33_4 (0) disconnected node: B2
Cell gf180mcu_fd_sc_mcu9t5v0__oai33_4 (0) disconnected node: B3
Cell gf180mcu_fd_sc_mcu9t5v0__oai33_4 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__oai33_4 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__oai33_4 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__oai33_4 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__oai33_4 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__oai33_ |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__oai33_ 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
A3                                         |A3                                         
B1                                         |B1                                         
B2                                         |B2                                         
B3                                         |B3                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__oai33_4 and gf180mcu_fd_sc_mcu9t5v0__oai33_4 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__nand3_2 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__nand3_2 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__nand3_2 (0) disconnected node: A3
Cell gf180mcu_fd_sc_mcu9t5v0__nand3_2 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__nand3_2 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__nand3_2 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__nand3_2 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__nand3_2 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__nand3_ |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__nand3_ 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
A3                                         |A3                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__nand3_2 and gf180mcu_fd_sc_mcu9t5v0__nand3_2 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__aoi21_2 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__aoi21_2 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__aoi21_2 (0) disconnected node: B
Cell gf180mcu_fd_sc_mcu9t5v0__aoi21_2 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__aoi21_2 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__aoi21_2 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__aoi21_2 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__aoi21_2 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__aoi21_ |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__aoi21_ 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
B                                          |B                                          
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__aoi21_2 and gf180mcu_fd_sc_mcu9t5v0__aoi21_2 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__buf_3 (0) disconnected node: I
Cell gf180mcu_fd_sc_mcu9t5v0__buf_3 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__buf_3 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__buf_3 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__buf_3 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__buf_3 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__buf_3  |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__buf_3  
-------------------------------------------|-------------------------------------------
I                                          |I                                          
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__buf_3 and gf180mcu_fd_sc_mcu9t5v0__buf_3 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__oai22_2 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__oai22_2 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__oai22_2 (0) disconnected node: B1
Cell gf180mcu_fd_sc_mcu9t5v0__oai22_2 (0) disconnected node: B2
Cell gf180mcu_fd_sc_mcu9t5v0__oai22_2 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__oai22_2 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__oai22_2 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__oai22_2 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__oai22_2 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__oai22_ |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__oai22_ 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
B1                                         |B1                                         
B2                                         |B2                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__oai22_2 and gf180mcu_fd_sc_mcu9t5v0__oai22_2 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__oai211_2 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__oai211_2 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__oai211_2 (0) disconnected node: B
Cell gf180mcu_fd_sc_mcu9t5v0__oai211_2 (0) disconnected node: C
Cell gf180mcu_fd_sc_mcu9t5v0__oai211_2 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__oai211_2 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__oai211_2 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__oai211_2 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__oai211_2 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__oai211 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__oai211 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
B                                          |B                                          
C                                          |C                                          
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__oai211_2 and gf180mcu_fd_sc_mcu9t5v0__oai211_2 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__aoi22_2 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__aoi22_2 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__aoi22_2 (0) disconnected node: B1
Cell gf180mcu_fd_sc_mcu9t5v0__aoi22_2 (0) disconnected node: B2
Cell gf180mcu_fd_sc_mcu9t5v0__aoi22_2 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__aoi22_2 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__aoi22_2 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__aoi22_2 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__aoi22_2 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__aoi22_ |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__aoi22_ 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
B1                                         |B1                                         
B2                                         |B2                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__aoi22_2 and gf180mcu_fd_sc_mcu9t5v0__aoi22_2 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__or4_2 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__or4_2 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__or4_2 (0) disconnected node: A3
Cell gf180mcu_fd_sc_mcu9t5v0__or4_2 (0) disconnected node: A4
Cell gf180mcu_fd_sc_mcu9t5v0__or4_2 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__or4_2 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__or4_2 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__or4_2 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__or4_2 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__or4_2  |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__or4_2  
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
A3                                         |A3                                         
A4                                         |A4                                         
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__or4_2 and gf180mcu_fd_sc_mcu9t5v0__or4_2 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__aoi211_2 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__aoi211_2 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__aoi211_2 (0) disconnected node: B
Cell gf180mcu_fd_sc_mcu9t5v0__aoi211_2 (0) disconnected node: C
Cell gf180mcu_fd_sc_mcu9t5v0__aoi211_2 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__aoi211_2 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__aoi211_2 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__aoi211_2 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__aoi211_2 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__aoi211 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__aoi211 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
B                                          |B                                          
C                                          |C                                          
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__aoi211_2 and gf180mcu_fd_sc_mcu9t5v0__aoi211_2 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__oai33_2 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__oai33_2 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__oai33_2 (0) disconnected node: A3
Cell gf180mcu_fd_sc_mcu9t5v0__oai33_2 (0) disconnected node: B1
Cell gf180mcu_fd_sc_mcu9t5v0__oai33_2 (0) disconnected node: B2
Cell gf180mcu_fd_sc_mcu9t5v0__oai33_2 (0) disconnected node: B3
Cell gf180mcu_fd_sc_mcu9t5v0__oai33_2 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__oai33_2 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__oai33_2 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__oai33_2 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__oai33_2 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__oai33_ |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__oai33_ 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
A3                                         |A3                                         
B1                                         |B1                                         
B2                                         |B2                                         
B3                                         |B3                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__oai33_2 and gf180mcu_fd_sc_mcu9t5v0__oai33_2 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__nor4_4 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__nor4_4 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__nor4_4 (0) disconnected node: A3
Cell gf180mcu_fd_sc_mcu9t5v0__nor4_4 (0) disconnected node: A4
Cell gf180mcu_fd_sc_mcu9t5v0__nor4_4 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__nor4_4 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__nor4_4 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__nor4_4 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__nor4_4 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__nor4_4 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__nor4_4 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
A3                                         |A3                                         
A4                                         |A4                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__nor4_4 and gf180mcu_fd_sc_mcu9t5v0__nor4_4 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__dffsnq_2 (0) disconnected node: D
Cell gf180mcu_fd_sc_mcu9t5v0__dffsnq_2 (0) disconnected node: SETN
Cell gf180mcu_fd_sc_mcu9t5v0__dffsnq_2 (0) disconnected node: CLK
Cell gf180mcu_fd_sc_mcu9t5v0__dffsnq_2 (0) disconnected node: Q
Cell gf180mcu_fd_sc_mcu9t5v0__dffsnq_2 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__dffsnq_2 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__dffsnq_2 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__dffsnq_2 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__dffsnq |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__dffsnq 
-------------------------------------------|-------------------------------------------
D                                          |D                                          
SETN                                       |SETN                                       
CLK                                        |CLK                                        
Q                                          |Q                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__dffsnq_2 and gf180mcu_fd_sc_mcu9t5v0__dffsnq_2 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__oai32_2 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__oai32_2 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__oai32_2 (0) disconnected node: A3
Cell gf180mcu_fd_sc_mcu9t5v0__oai32_2 (0) disconnected node: B1
Cell gf180mcu_fd_sc_mcu9t5v0__oai32_2 (0) disconnected node: B2
Cell gf180mcu_fd_sc_mcu9t5v0__oai32_2 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__oai32_2 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__oai32_2 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__oai32_2 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__oai32_2 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__oai32_ |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__oai32_ 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
A3                                         |A3                                         
B1                                         |B1                                         
B2                                         |B2                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__oai32_2 and gf180mcu_fd_sc_mcu9t5v0__oai32_2 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__inv_3 (0) disconnected node: I
Cell gf180mcu_fd_sc_mcu9t5v0__inv_3 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__inv_3 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__inv_3 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__inv_3 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__inv_3 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__inv_3  |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__inv_3  
-------------------------------------------|-------------------------------------------
I                                          |I                                          
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__inv_3 and gf180mcu_fd_sc_mcu9t5v0__inv_3 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__inv_4 (0) disconnected node: I
Cell gf180mcu_fd_sc_mcu9t5v0__inv_4 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__inv_4 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__inv_4 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__inv_4 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__inv_4 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__inv_4  |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__inv_4  
-------------------------------------------|-------------------------------------------
I                                          |I                                          
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__inv_4 and gf180mcu_fd_sc_mcu9t5v0__inv_4 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__inv_2 (0) disconnected node: I
Cell gf180mcu_fd_sc_mcu9t5v0__inv_2 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__inv_2 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__inv_2 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__inv_2 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__inv_2 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__inv_2  |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__inv_2  
-------------------------------------------|-------------------------------------------
I                                          |I                                          
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__inv_2 and gf180mcu_fd_sc_mcu9t5v0__inv_2 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_16 (0) disconnected node: I
Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_16 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_16 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_16 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_16 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_16 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__clkbuf |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__clkbuf 
-------------------------------------------|-------------------------------------------
I                                          |I                                          
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__clkbuf_16 and gf180mcu_fd_sc_mcu9t5v0__clkbuf_16 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__oai222_2 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__oai222_2 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__oai222_2 (0) disconnected node: B1
Cell gf180mcu_fd_sc_mcu9t5v0__oai222_2 (0) disconnected node: B2
Cell gf180mcu_fd_sc_mcu9t5v0__oai222_2 (0) disconnected node: C1
Cell gf180mcu_fd_sc_mcu9t5v0__oai222_2 (0) disconnected node: C2
Cell gf180mcu_fd_sc_mcu9t5v0__oai222_2 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__oai222_2 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__oai222_2 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__oai222_2 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__oai222_2 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__oai222 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__oai222 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
B1                                         |B1                                         
B2                                         |B2                                         
C1                                         |C1                                         
C2                                         |C2                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__oai222_2 and gf180mcu_fd_sc_mcu9t5v0__oai222_2 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__nor2_4 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__nor2_4 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__nor2_4 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__nor2_4 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__nor2_4 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__nor2_4 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__nor2_4 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__nor2_4 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__nor2_4 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__nor2_4 and gf180mcu_fd_sc_mcu9t5v0__nor2_4 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__nor4_2 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__nor4_2 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__nor4_2 (0) disconnected node: A3
Cell gf180mcu_fd_sc_mcu9t5v0__nor4_2 (0) disconnected node: A4
Cell gf180mcu_fd_sc_mcu9t5v0__nor4_2 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__nor4_2 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__nor4_2 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__nor4_2 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__nor4_2 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__nor4_2 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__nor4_2 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
A3                                         |A3                                         
A4                                         |A4                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__nor4_2 and gf180mcu_fd_sc_mcu9t5v0__nor4_2 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__xor2_2 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__xor2_2 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__xor2_2 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__xor2_2 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__xor2_2 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__xor2_2 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__xor2_2 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__xor2_2 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__xor2_2 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__xor2_2 and gf180mcu_fd_sc_mcu9t5v0__xor2_2 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__nand2_4 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__nand2_4 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__nand2_4 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__nand2_4 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__nand2_4 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__nand2_4 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__nand2_4 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__nand2_ |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__nand2_ 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__nand2_4 and gf180mcu_fd_sc_mcu9t5v0__nand2_4 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__nand3_4 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__nand3_4 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__nand3_4 (0) disconnected node: A3
Cell gf180mcu_fd_sc_mcu9t5v0__nand3_4 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__nand3_4 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__nand3_4 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__nand3_4 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__nand3_4 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__nand3_ |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__nand3_ 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
A3                                         |A3                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__nand3_4 and gf180mcu_fd_sc_mcu9t5v0__nand3_4 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__oai32_4 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__oai32_4 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__oai32_4 (0) disconnected node: A3
Cell gf180mcu_fd_sc_mcu9t5v0__oai32_4 (0) disconnected node: B1
Cell gf180mcu_fd_sc_mcu9t5v0__oai32_4 (0) disconnected node: B2
Cell gf180mcu_fd_sc_mcu9t5v0__oai32_4 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__oai32_4 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__oai32_4 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__oai32_4 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__oai32_4 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__oai32_ |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__oai32_ 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
A3                                         |A3                                         
B1                                         |B1                                         
B2                                         |B2                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__oai32_4 and gf180mcu_fd_sc_mcu9t5v0__oai32_4 are equivalent.

Cell gf180mcu_fd_io__fill1 (0) disconnected node: DVDD
Cell gf180mcu_fd_io__fill1 (0) disconnected node: DVSS
Cell gf180mcu_fd_io__fill1 (0) disconnected node: VDD
Cell gf180mcu_fd_io__fill1 (0) disconnected node: VSS
Cell gf180mcu_fd_io__fill1 (1) disconnected node: DVDD
Cell gf180mcu_fd_io__fill1 (1) disconnected node: DVSS
Cell gf180mcu_fd_io__fill1 (1) disconnected node: VDD
Cell gf180mcu_fd_io__fill1 (1) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_io__fill1           |Circuit 2: gf180mcu_fd_io__fill1           
-------------------------------------------|-------------------------------------------
DVDD                                       |DVDD                                       
DVSS                                       |DVSS                                       
VDD                                        |VDD                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_io__fill1 and gf180mcu_fd_io__fill1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__mux2_2 (0) disconnected node: I0
Cell gf180mcu_fd_sc_mcu9t5v0__mux2_2 (0) disconnected node: I1
Cell gf180mcu_fd_sc_mcu9t5v0__mux2_2 (0) disconnected node: S
Cell gf180mcu_fd_sc_mcu9t5v0__mux2_2 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__mux2_2 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__mux2_2 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__mux2_2 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__mux2_2 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__mux2_2 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__mux2_2 
-------------------------------------------|-------------------------------------------
I0                                         |I0                                         
I1                                         |I1                                         
S                                          |S                                          
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__mux2_2 and gf180mcu_fd_sc_mcu9t5v0__mux2_2 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__and3_2 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__and3_2 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__and3_2 (0) disconnected node: A3
Cell gf180mcu_fd_sc_mcu9t5v0__and3_2 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__and3_2 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__and3_2 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__and3_2 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__and3_2 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__and3_2 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__and3_2 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
A3                                         |A3                                         
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__and3_2 and gf180mcu_fd_sc_mcu9t5v0__and3_2 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__oai21_4 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__oai21_4 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__oai21_4 (0) disconnected node: B
Cell gf180mcu_fd_sc_mcu9t5v0__oai21_4 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__oai21_4 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__oai21_4 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__oai21_4 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__oai21_4 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__oai21_ |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__oai21_ 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
B                                          |B                                          
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__oai21_4 and gf180mcu_fd_sc_mcu9t5v0__oai21_4 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__aoi221_4 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__aoi221_4 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__aoi221_4 (0) disconnected node: B1
Cell gf180mcu_fd_sc_mcu9t5v0__aoi221_4 (0) disconnected node: B2
Cell gf180mcu_fd_sc_mcu9t5v0__aoi221_4 (0) disconnected node: C
Cell gf180mcu_fd_sc_mcu9t5v0__aoi221_4 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__aoi221_4 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__aoi221_4 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__aoi221_4 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__aoi221_4 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__aoi221 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__aoi221 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
B1                                         |B1                                         
B2                                         |B2                                         
C                                          |C                                          
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__aoi221_4 and gf180mcu_fd_sc_mcu9t5v0__aoi221_4 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__and4_2 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__and4_2 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__and4_2 (0) disconnected node: A3
Cell gf180mcu_fd_sc_mcu9t5v0__and4_2 (0) disconnected node: A4
Cell gf180mcu_fd_sc_mcu9t5v0__and4_2 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__and4_2 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__and4_2 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__and4_2 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__and4_2 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__and4_2 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__and4_2 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
A3                                         |A3                                         
A4                                         |A4                                         
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__and4_2 and gf180mcu_fd_sc_mcu9t5v0__and4_2 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__or4_4 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__or4_4 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__or4_4 (0) disconnected node: A3
Cell gf180mcu_fd_sc_mcu9t5v0__or4_4 (0) disconnected node: A4
Cell gf180mcu_fd_sc_mcu9t5v0__or4_4 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__or4_4 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__or4_4 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__or4_4 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__or4_4 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__or4_4  |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__or4_4  
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
A3                                         |A3                                         
A4                                         |A4                                         
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__or4_4 and gf180mcu_fd_sc_mcu9t5v0__or4_4 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_12 (0) disconnected node: I
Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_12 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_12 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_12 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_12 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_12 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__clkinv |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__clkinv 
-------------------------------------------|-------------------------------------------
I                                          |I                                          
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__clkinv_12 and gf180mcu_fd_sc_mcu9t5v0__clkinv_12 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__xnor3_1 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__xnor3_1 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__xnor3_1 (0) disconnected node: A3
Cell gf180mcu_fd_sc_mcu9t5v0__xnor3_1 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__xnor3_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__xnor3_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__xnor3_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__xnor3_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__xnor3_ |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__xnor3_ 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
A3                                         |A3                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__xnor3_1 and gf180mcu_fd_sc_mcu9t5v0__xnor3_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__oai31_4 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__oai31_4 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__oai31_4 (0) disconnected node: A3
Cell gf180mcu_fd_sc_mcu9t5v0__oai31_4 (0) disconnected node: B
Cell gf180mcu_fd_sc_mcu9t5v0__oai31_4 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__oai31_4 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__oai31_4 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__oai31_4 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__oai31_4 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__oai31_ |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__oai31_ 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
A3                                         |A3                                         
B                                          |B                                          
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__oai31_4 and gf180mcu_fd_sc_mcu9t5v0__oai31_4 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__aoi211_4 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__aoi211_4 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__aoi211_4 (0) disconnected node: B
Cell gf180mcu_fd_sc_mcu9t5v0__aoi211_4 (0) disconnected node: C
Cell gf180mcu_fd_sc_mcu9t5v0__aoi211_4 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__aoi211_4 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__aoi211_4 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__aoi211_4 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__aoi211_4 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__aoi211 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__aoi211 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
B                                          |B                                          
C                                          |C                                          
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__aoi211_4 and gf180mcu_fd_sc_mcu9t5v0__aoi211_4 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__tieh (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__tieh (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__tieh (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__tieh (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__tieh (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__tieh   |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__tieh   
-------------------------------------------|-------------------------------------------
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__tieh and gf180mcu_fd_sc_mcu9t5v0__tieh are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__oai222_4 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__oai222_4 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__oai222_4 (0) disconnected node: B1
Cell gf180mcu_fd_sc_mcu9t5v0__oai222_4 (0) disconnected node: B2
Cell gf180mcu_fd_sc_mcu9t5v0__oai222_4 (0) disconnected node: C1
Cell gf180mcu_fd_sc_mcu9t5v0__oai222_4 (0) disconnected node: C2
Cell gf180mcu_fd_sc_mcu9t5v0__oai222_4 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__oai222_4 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__oai222_4 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__oai222_4 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__oai222_4 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__oai222 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__oai222 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
B1                                         |B1                                         
B2                                         |B2                                         
C1                                         |C1                                         
C2                                         |C2                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__oai222_4 and gf180mcu_fd_sc_mcu9t5v0__oai222_4 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__or2_4 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__or2_4 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__or2_4 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__or2_4 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__or2_4 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__or2_4 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__or2_4 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__or2_4  |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__or2_4  
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__or2_4 and gf180mcu_fd_sc_mcu9t5v0__or2_4 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__aoi21_4 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__aoi21_4 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__aoi21_4 (0) disconnected node: B
Cell gf180mcu_fd_sc_mcu9t5v0__aoi21_4 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__aoi21_4 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__aoi21_4 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__aoi21_4 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__aoi21_4 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__aoi21_ |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__aoi21_ 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
B                                          |B                                          
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__aoi21_4 and gf180mcu_fd_sc_mcu9t5v0__aoi21_4 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__oai211_4 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__oai211_4 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__oai211_4 (0) disconnected node: B
Cell gf180mcu_fd_sc_mcu9t5v0__oai211_4 (0) disconnected node: C
Cell gf180mcu_fd_sc_mcu9t5v0__oai211_4 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__oai211_4 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__oai211_4 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__oai211_4 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__oai211_4 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__oai211 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__oai211 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
B                                          |B                                          
C                                          |C                                          
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__oai211_4 and gf180mcu_fd_sc_mcu9t5v0__oai211_4 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__mux4_1 (0) disconnected node: I0
Cell gf180mcu_fd_sc_mcu9t5v0__mux4_1 (0) disconnected node: I1
Cell gf180mcu_fd_sc_mcu9t5v0__mux4_1 (0) disconnected node: I2
Cell gf180mcu_fd_sc_mcu9t5v0__mux4_1 (0) disconnected node: I3
Cell gf180mcu_fd_sc_mcu9t5v0__mux4_1 (0) disconnected node: S0
Cell gf180mcu_fd_sc_mcu9t5v0__mux4_1 (0) disconnected node: S1
Cell gf180mcu_fd_sc_mcu9t5v0__mux4_1 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__mux4_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__mux4_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__mux4_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__mux4_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__mux4_1 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__mux4_1 
-------------------------------------------|-------------------------------------------
I0                                         |I0                                         
I1                                         |I1                                         
I2                                         |I2                                         
I3                                         |I3                                         
S0                                         |S0                                         
S1                                         |S1                                         
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__mux4_1 and gf180mcu_fd_sc_mcu9t5v0__mux4_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__inv_12 (0) disconnected node: I
Cell gf180mcu_fd_sc_mcu9t5v0__inv_12 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__inv_12 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__inv_12 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__inv_12 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__inv_12 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__inv_12 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__inv_12 
-------------------------------------------|-------------------------------------------
I                                          |I                                          
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__inv_12 and gf180mcu_fd_sc_mcu9t5v0__inv_12 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__and2_4 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__and2_4 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__and2_4 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__and2_4 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__and2_4 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__and2_4 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__and2_4 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__and2_4 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__and2_4 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__and2_4 and gf180mcu_fd_sc_mcu9t5v0__and2_4 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__and3_4 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__and3_4 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__and3_4 (0) disconnected node: A3
Cell gf180mcu_fd_sc_mcu9t5v0__and3_4 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__and3_4 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__and3_4 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__and3_4 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__and3_4 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__and3_4 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__and3_4 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
A3                                         |A3                                         
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__and3_4 and gf180mcu_fd_sc_mcu9t5v0__and3_4 are equivalent.

Cell gf180mcu_ws_io__dvdd (0) disconnected node: DVDD
Cell gf180mcu_ws_io__dvdd (0) disconnected node: DVSS
Cell gf180mcu_ws_io__dvdd (0) disconnected node: VSS
Cell gf180mcu_ws_io__dvdd (1) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_ws_io__dvdd            |Circuit 2: gf180mcu_ws_io__dvdd            
-------------------------------------------|-------------------------------------------
DVDD                                       |DVDD                                       
DVSS                                       |DVSS                                       
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_ws_io__dvdd and gf180mcu_ws_io__dvdd are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_12 (0) disconnected node: I
Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_12 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_12 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_12 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_12 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__clkbuf_12 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__clkbuf |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__clkbuf 
-------------------------------------------|-------------------------------------------
I                                          |I                                          
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__clkbuf_12 and gf180mcu_fd_sc_mcu9t5v0__clkbuf_12 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__inv_8 (0) disconnected node: I
Cell gf180mcu_fd_sc_mcu9t5v0__inv_8 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__inv_8 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__inv_8 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__inv_8 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__inv_8 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__inv_8  |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__inv_8  
-------------------------------------------|-------------------------------------------
I                                          |I                                          
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__inv_8 and gf180mcu_fd_sc_mcu9t5v0__inv_8 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__oai22_4 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__oai22_4 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__oai22_4 (0) disconnected node: B1
Cell gf180mcu_fd_sc_mcu9t5v0__oai22_4 (0) disconnected node: B2
Cell gf180mcu_fd_sc_mcu9t5v0__oai22_4 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__oai22_4 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__oai22_4 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__oai22_4 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__oai22_4 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__oai22_ |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__oai22_ 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
B1                                         |B1                                         
B2                                         |B2                                         
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__oai22_4 and gf180mcu_fd_sc_mcu9t5v0__oai22_4 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__dlyb_2 (0) disconnected node: I
Cell gf180mcu_fd_sc_mcu9t5v0__dlyb_2 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__dlyb_2 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__dlyb_2 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__dlyb_2 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__dlyb_2 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__dlyb_2 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__dlyb_2 
-------------------------------------------|-------------------------------------------
I                                          |I                                          
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__dlyb_2 and gf180mcu_fd_sc_mcu9t5v0__dlyb_2 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__dffrnq_4 (0) disconnected node: D
Cell gf180mcu_fd_sc_mcu9t5v0__dffrnq_4 (0) disconnected node: RN
Cell gf180mcu_fd_sc_mcu9t5v0__dffrnq_4 (0) disconnected node: CLK
Cell gf180mcu_fd_sc_mcu9t5v0__dffrnq_4 (0) disconnected node: Q
Cell gf180mcu_fd_sc_mcu9t5v0__dffrnq_4 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__dffrnq_4 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__dffrnq_4 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__dffrnq_4 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__dffrnq |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__dffrnq 
-------------------------------------------|-------------------------------------------
D                                          |D                                          
RN                                         |RN                                         
CLK                                        |CLK                                        
Q                                          |Q                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__dffrnq_4 and gf180mcu_fd_sc_mcu9t5v0__dffrnq_4 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__xor3_1 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__xor3_1 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__xor3_1 (0) disconnected node: A3
Cell gf180mcu_fd_sc_mcu9t5v0__xor3_1 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__xor3_1 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__xor3_1 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__xor3_1 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__xor3_1 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__xor3_1 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__xor3_1 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
A3                                         |A3                                         
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__xor3_1 and gf180mcu_fd_sc_mcu9t5v0__xor3_1 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__dffq_2 (0) disconnected node: D
Cell gf180mcu_fd_sc_mcu9t5v0__dffq_2 (0) disconnected node: CLK
Cell gf180mcu_fd_sc_mcu9t5v0__dffq_2 (0) disconnected node: Q
Cell gf180mcu_fd_sc_mcu9t5v0__dffq_2 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__dffq_2 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__dffq_2 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__dffq_2 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__dffq_2 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__dffq_2 
-------------------------------------------|-------------------------------------------
D                                          |D                                          
CLK                                        |CLK                                        
Q                                          |Q                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__dffq_2 and gf180mcu_fd_sc_mcu9t5v0__dffq_2 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_20 (0) disconnected node: I
Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_20 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_20 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_20 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_20 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_20 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__clkinv |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__clkinv 
-------------------------------------------|-------------------------------------------
I                                          |I                                          
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__clkinv_20 and gf180mcu_fd_sc_mcu9t5v0__clkinv_20 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_8 (0) disconnected node: I
Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_8 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_8 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_8 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_8 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_8 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__clkinv |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__clkinv 
-------------------------------------------|-------------------------------------------
I                                          |I                                          
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__clkinv_8 and gf180mcu_fd_sc_mcu9t5v0__clkinv_8 are equivalent.

Cell gf180mcu_fd_io__in_c (0) disconnected node: DVDD
Cell gf180mcu_fd_io__in_c (0) disconnected node: DVSS
Cell gf180mcu_fd_io__in_c (0) disconnected node: PAD
Cell gf180mcu_fd_io__in_c (0) disconnected node: PD
Cell gf180mcu_fd_io__in_c (0) disconnected node: PU
Cell gf180mcu_fd_io__in_c (0) disconnected node: VDD
Cell gf180mcu_fd_io__in_c (0) disconnected node: VSS
Cell gf180mcu_fd_io__in_c (0) disconnected node: Y

Subcircuit pins:
Circuit 1: gf180mcu_fd_io__in_c            |Circuit 2: gf180mcu_fd_io__in_c            
-------------------------------------------|-------------------------------------------
DVDD                                       |DVDD                                       
DVSS                                       |DVSS                                       
PAD                                        |PAD                                        
PD                                         |PD                                         
PU                                         |PU                                         
VDD                                        |VDD                                        
VSS                                        |VSS                                        
Y                                          |Y                                          
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_io__in_c and gf180mcu_fd_io__in_c are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__oai221_4 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__oai221_4 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__oai221_4 (0) disconnected node: B1
Cell gf180mcu_fd_sc_mcu9t5v0__oai221_4 (0) disconnected node: B2
Cell gf180mcu_fd_sc_mcu9t5v0__oai221_4 (0) disconnected node: C
Cell gf180mcu_fd_sc_mcu9t5v0__oai221_4 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__oai221_4 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__oai221_4 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__oai221_4 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__oai221_4 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__oai221 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__oai221 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
B1                                         |B1                                         
B2                                         |B2                                         
C                                          |C                                          
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__oai221_4 and gf180mcu_fd_sc_mcu9t5v0__oai221_4 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_4 (0) disconnected node: I
Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_4 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_4 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_4 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_4 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_4 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__clkinv |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__clkinv 
-------------------------------------------|-------------------------------------------
I                                          |I                                          
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__clkinv_4 and gf180mcu_fd_sc_mcu9t5v0__clkinv_4 are equivalent.

Cell gf180mcu_fd_io__cor (0) disconnected node: DVDD
Cell gf180mcu_fd_io__cor (0) disconnected node: DVSS
Cell gf180mcu_fd_io__cor (0) disconnected node: VDD
Cell gf180mcu_fd_io__cor (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_io__cor             |Circuit 2: gf180mcu_fd_io__cor             
-------------------------------------------|-------------------------------------------
DVDD                                       |DVDD                                       
DVSS                                       |DVSS                                       
VDD                                        |VDD                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_io__cor and gf180mcu_fd_io__cor are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__buf_12 (0) disconnected node: I
Cell gf180mcu_fd_sc_mcu9t5v0__buf_12 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__buf_12 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__buf_12 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__buf_12 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__buf_12 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__buf_12 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__buf_12 
-------------------------------------------|-------------------------------------------
I                                          |I                                          
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__buf_12 and gf180mcu_fd_sc_mcu9t5v0__buf_12 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_2 (0) disconnected node: I
Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_2 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_2 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_2 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_2 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_2 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__clkinv |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__clkinv 
-------------------------------------------|-------------------------------------------
I                                          |I                                          
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__clkinv_2 and gf180mcu_fd_sc_mcu9t5v0__clkinv_2 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_16 (0) disconnected node: I
Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_16 (0) disconnected node: ZN
Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_16 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_16 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_16 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__clkinv_16 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__clkinv |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__clkinv 
-------------------------------------------|-------------------------------------------
I                                          |I                                          
ZN                                         |ZN                                         
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__clkinv_16 and gf180mcu_fd_sc_mcu9t5v0__clkinv_16 are equivalent.

Cell gf180mcu_fd_io__fillnc (0) disconnected node: DVDD
Cell gf180mcu_fd_io__fillnc (0) disconnected node: DVSS
Cell gf180mcu_fd_io__fillnc (0) disconnected node: VDD
Cell gf180mcu_fd_io__fillnc (0) disconnected node: VSS
Cell gf180mcu_fd_io__fillnc (1) disconnected node: DVDD
Cell gf180mcu_fd_io__fillnc (1) disconnected node: DVSS
Cell gf180mcu_fd_io__fillnc (1) disconnected node: VDD
Cell gf180mcu_fd_io__fillnc (1) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_io__fillnc          |Circuit 2: gf180mcu_fd_io__fillnc          
-------------------------------------------|-------------------------------------------
DVDD                                       |DVDD                                       
DVSS                                       |DVSS                                       
VDD                                        |VDD                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_io__fillnc and gf180mcu_fd_io__fillnc are equivalent.

Cell gf180mcu_ws_io__dvss (0) disconnected node: DVDD
Cell gf180mcu_ws_io__dvss (0) disconnected node: DVSS
Cell gf180mcu_ws_io__dvss (0) disconnected node: VDD
Cell gf180mcu_ws_io__dvss (1) disconnected node: VDD

Subcircuit pins:
Circuit 1: gf180mcu_ws_io__dvss            |Circuit 2: gf180mcu_ws_io__dvss            
-------------------------------------------|-------------------------------------------
DVDD                                       |DVDD                                       
DVSS                                       |DVSS                                       
VDD                                        |VDD                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_ws_io__dvss and gf180mcu_ws_io__dvss are equivalent.

Cell gf180mcu_fd_io__asig_5p0 (0) disconnected node: ASIG5V
Cell gf180mcu_fd_io__asig_5p0 (0) disconnected node: DVDD
Cell gf180mcu_fd_io__asig_5p0 (0) disconnected node: DVSS
Cell gf180mcu_fd_io__asig_5p0 (0) disconnected node: VDD
Cell gf180mcu_fd_io__asig_5p0 (0) disconnected node: VSS
Cell gf180mcu_fd_io__asig_5p0 (1) disconnected node: VDD
Cell gf180mcu_fd_io__asig_5p0 (1) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_io__asig_5p0        |Circuit 2: gf180mcu_fd_io__asig_5p0        
-------------------------------------------|-------------------------------------------
ASIG5V                                     |ASIG5V                                     
DVDD                                       |DVDD                                       
DVSS                                       |DVSS                                       
VDD                                        |VDD                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_io__asig_5p0 and gf180mcu_fd_io__asig_5p0 are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__and4_4 (0) disconnected node: A1
Cell gf180mcu_fd_sc_mcu9t5v0__and4_4 (0) disconnected node: A2
Cell gf180mcu_fd_sc_mcu9t5v0__and4_4 (0) disconnected node: A3
Cell gf180mcu_fd_sc_mcu9t5v0__and4_4 (0) disconnected node: A4
Cell gf180mcu_fd_sc_mcu9t5v0__and4_4 (0) disconnected node: Z
Cell gf180mcu_fd_sc_mcu9t5v0__and4_4 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__and4_4 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__and4_4 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__and4_4 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__and4_4 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__and4_4 
-------------------------------------------|-------------------------------------------
A1                                         |A1                                         
A2                                         |A2                                         
A3                                         |A3                                         
A4                                         |A4                                         
Z                                          |Z                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__and4_4 and gf180mcu_fd_sc_mcu9t5v0__and4_4 are equivalent.

Cell gf180mcu_fd_io__in_s (0) disconnected node: DVDD
Cell gf180mcu_fd_io__in_s (0) disconnected node: DVSS
Cell gf180mcu_fd_io__in_s (0) disconnected node: PAD
Cell gf180mcu_fd_io__in_s (0) disconnected node: PD
Cell gf180mcu_fd_io__in_s (0) disconnected node: PU
Cell gf180mcu_fd_io__in_s (0) disconnected node: VDD
Cell gf180mcu_fd_io__in_s (0) disconnected node: VSS
Cell gf180mcu_fd_io__in_s (0) disconnected node: Y

Subcircuit pins:
Circuit 1: gf180mcu_fd_io__in_s            |Circuit 2: gf180mcu_fd_io__in_s            
-------------------------------------------|-------------------------------------------
DVDD                                       |DVDD                                       
DVSS                                       |DVSS                                       
PAD                                        |PAD                                        
PD                                         |PD                                         
PU                                         |PU                                         
VDD                                        |VDD                                        
VSS                                        |VSS                                        
Y                                          |Y                                          
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_io__in_s and gf180mcu_fd_io__in_s are equivalent.

Cell gf180mcu_fd_sc_mcu9t5v0__dffq_4 (0) disconnected node: D
Cell gf180mcu_fd_sc_mcu9t5v0__dffq_4 (0) disconnected node: CLK
Cell gf180mcu_fd_sc_mcu9t5v0__dffq_4 (0) disconnected node: Q
Cell gf180mcu_fd_sc_mcu9t5v0__dffq_4 (0) disconnected node: VDD
Cell gf180mcu_fd_sc_mcu9t5v0__dffq_4 (0) disconnected node: VNW
Cell gf180mcu_fd_sc_mcu9t5v0__dffq_4 (0) disconnected node: VPW
Cell gf180mcu_fd_sc_mcu9t5v0__dffq_4 (0) disconnected node: VSS

Subcircuit pins:
Circuit 1: gf180mcu_fd_sc_mcu9t5v0__dffq_4 |Circuit 2: gf180mcu_fd_sc_mcu9t5v0__dffq_4 
-------------------------------------------|-------------------------------------------
D                                          |D                                          
CLK                                        |CLK                                        
Q                                          |Q                                          
VDD                                        |VDD                                        
VNW                                        |VNW                                        
VPW                                        |VPW                                        
VSS                                        |VSS                                        
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes gf180mcu_fd_sc_mcu9t5v0__dffq_4 and gf180mcu_fd_sc_mcu9t5v0__dffq_4 are equivalent.
Flattening unmatched subcell gf180mcu_fd_sc_mcu9t5v0__inv_16 in circuit chip_top (1)(1 instance)
Flattening unmatched subcell gf180mcu_fd_sc_mcu9t5v0__buf_16 in circuit chip_top (1)(1 instance)

Class chip_top (0):  Merged 201044 parallel devices.
Class chip_top (1):  Merged 201118 parallel devices.
Subcircuit summary:
Circuit 1: chip_top                        |Circuit 2: chip_top                        
-------------------------------------------|-------------------------------------------
gf180mcu_fd_sc_mcu9t5v0__fillcap_8 (53208- |gf180mcu_fd_sc_mcu9t5v0__fillcap_8 (53208- 
gf180mcu_fd_sc_mcu9t5v0__fillcap_16 (43112 |gf180mcu_fd_sc_mcu9t5v0__fillcap_16 (43112 
gf180mcu_fd_sc_mcu9t5v0__oai21_1 (12908)   |gf180mcu_fd_sc_mcu9t5v0__oai21_1 (13137) * 
gf180mcu_fd_sc_mcu9t5v0__mux2_1 (10908)    |gf180mcu_fd_sc_mcu9t5v0__mux2_1 (10942) ** 
gf180mcu_fd_sc_mcu9t5v0__fillcap_4 (71730- |gf180mcu_fd_sc_mcu9t5v0__fillcap_4 (71730- 
gf180mcu_fd_sc_mcu9t5v0__dffrnq_1 (4112)   |gf180mcu_fd_sc_mcu9t5v0__dffrnq_1 (4112)   
gf180mcu_fd_sc_mcu9t5v0__or3_1 (459)       |gf180mcu_fd_sc_mcu9t5v0__or3_1 (486) **Mis 
gf180mcu_fd_sc_mcu9t5v0__nor3_1 (2611)     |gf180mcu_fd_sc_mcu9t5v0__nor3_1 (2713) **M 
gf180mcu_fd_sc_mcu9t5v0__aoi22_1 (1862)    |gf180mcu_fd_sc_mcu9t5v0__aoi22_1 (1884) ** 
gf180mcu_fd_sc_mcu9t5v0__and2_1 (2616)     |gf180mcu_fd_sc_mcu9t5v0__and2_1 (2676) **M 
gf180mcu_fd_sc_mcu9t5v0__nand3_1 (4390)    |gf180mcu_fd_sc_mcu9t5v0__nand3_1 (4495) ** 
gf180mcu_fd_sc_mcu9t5v0__fillcap_64 (8495- |gf180mcu_fd_sc_mcu9t5v0__fillcap_64 (8495- 
gf180mcu_fd_sc_mcu9t5v0__clkinv_1 (4567)   |gf180mcu_fd_sc_mcu9t5v0__clkinv_1 (4685) * 
gf180mcu_fd_sc_mcu9t5v0__nand2_1 (13599)   |gf180mcu_fd_sc_mcu9t5v0__nand2_1 (13875) * 
gf180mcu_fd_sc_mcu9t5v0__clkbuf_8 (3626)   |gf180mcu_fd_sc_mcu9t5v0__clkbuf_8 (3626)   
gf180mcu_fd_sc_mcu9t5v0__oai211_1 (2730)   |gf180mcu_fd_sc_mcu9t5v0__oai211_1 (2773) * 
gf180mcu_fd_sc_mcu9t5v0__aoi21_1 (6635)    |gf180mcu_fd_sc_mcu9t5v0__aoi21_1 (6772) ** 
gf180mcu_fd_sc_mcu9t5v0__dlya_1 (431)      |gf180mcu_fd_sc_mcu9t5v0__dlya_1 (431)      
gf180mcu_fd_sc_mcu9t5v0__oai21_2 (308)     |gf180mcu_fd_sc_mcu9t5v0__oai21_2 (340) **M 
gf180mcu_fd_sc_mcu9t5v0__fillcap_32 (24447 |gf180mcu_fd_sc_mcu9t5v0__fillcap_32 (24447 
gf180mcu_fd_sc_mcu9t5v0__mux2_4 (25)       |gf180mcu_fd_sc_mcu9t5v0__mux2_4 (25)       
gf180mcu_fd_sc_mcu9t5v0__clkbuf_2 (3753)   |gf180mcu_fd_sc_mcu9t5v0__clkbuf_2 (3760) * 
gf180mcu_fd_sc_mcu9t5v0__nor2_1 (11180)    |gf180mcu_fd_sc_mcu9t5v0__nor2_1 (11533) ** 
gf180mcu_fd_sc_mcu9t5v0__oai31_1 (2225)    |gf180mcu_fd_sc_mcu9t5v0__oai31_1 (2289) ** 
gf180mcu_fd_sc_mcu9t5v0__clkbuf_1 (2074)   |gf180mcu_fd_sc_mcu9t5v0__clkbuf_1 (2090) * 
gf180mcu_fd_sc_mcu9t5v0__or2_1 (2521)      |gf180mcu_fd_sc_mcu9t5v0__or2_1 (2644) **Mi 
gf180mcu_fd_sc_mcu9t5v0__and3_1 (1059)     |gf180mcu_fd_sc_mcu9t5v0__and3_1 (1088) **M 
gf180mcu_fd_sc_mcu9t5v0__nand4_1 (2660)    |gf180mcu_fd_sc_mcu9t5v0__nand4_1 (2730) ** 
gf180mcu_fd_sc_mcu9t5v0__dlyd_1 (1488)     |gf180mcu_fd_sc_mcu9t5v0__dlyd_1 (1488)     
gf180mcu_fd_sc_mcu9t5v0__aoi221_1 (1233)   |gf180mcu_fd_sc_mcu9t5v0__aoi221_1 (1262) * 
gf180mcu_fd_sc_mcu9t5v0__buf_2 (4455)      |gf180mcu_fd_sc_mcu9t5v0__buf_2 (4546) **Mi 
gf180mcu_fd_sc_mcu9t5v0__buf_4 (4618)      |gf180mcu_fd_sc_mcu9t5v0__buf_4 (4629) **Mi 
gf180mcu_fd_sc_mcu9t5v0__and4_1 (706)      |gf180mcu_fd_sc_mcu9t5v0__and4_1 (708) **Mi 
gf180mcu_fd_sc_mcu9t5v0__dffsnq_1 (2056)   |gf180mcu_fd_sc_mcu9t5v0__dffsnq_1 (2056)   
gf180mcu_fd_sc_mcu9t5v0__aoi222_1 (261)    |gf180mcu_fd_sc_mcu9t5v0__aoi222_1 (272) ** 
gf180mcu_fd_sc_mcu9t5v0__aoi211_1 (2062)   |gf180mcu_fd_sc_mcu9t5v0__aoi211_1 (2109) * 
gf180mcu_fd_sc_mcu9t5v0__nor4_1 (1631)     |gf180mcu_fd_sc_mcu9t5v0__nor4_1 (1690) **M 
gf180mcu_fd_sc_mcu9t5v0__clkbuf_4 (1833)   |gf180mcu_fd_sc_mcu9t5v0__clkbuf_4 (1833)   
gf180mcu_fd_sc_mcu9t5v0__nor3_2 (147)      |gf180mcu_fd_sc_mcu9t5v0__nor3_2 (156) **Mi 
gf180mcu_fd_sc_mcu9t5v0__nor2_2 (277)      |gf180mcu_fd_sc_mcu9t5v0__nor2_2 (291) **Mi 
gf180mcu_fd_sc_mcu9t5v0__nor3_4 (36)       |gf180mcu_fd_sc_mcu9t5v0__nor3_4 (42) **Mis 
gf180mcu_fd_sc_mcu9t5v0__dffq_1 (756)      |gf180mcu_fd_sc_mcu9t5v0__dffq_1 (756)      
gf180mcu_fd_sc_mcu9t5v0__dlyc_1 (3163)     |gf180mcu_fd_sc_mcu9t5v0__dlyc_1 (3163)     
gf180mcu_fd_sc_mcu9t5v0__buf_1 (5023)      |gf180mcu_fd_sc_mcu9t5v0__buf_1 (5157) **Mi 
gf180mcu_fd_sc_mcu9t5v0__oai221_1 (870)    |gf180mcu_fd_sc_mcu9t5v0__oai221_1 (911) ** 
gf180mcu_fd_sc_mcu9t5v0__buf_8 (157)       |gf180mcu_fd_sc_mcu9t5v0__buf_8 (166) **Mis 
gf180mcu_fd_sc_mcu9t5v0__tiel (245)        |gf180mcu_fd_sc_mcu9t5v0__tiel (245)        
gf180mcu_fd_sc_mcu9t5v0__aoi22_4 (43)      |gf180mcu_fd_sc_mcu9t5v0__aoi22_4 (43)      
gf180mcu_fd_sc_mcu9t5v0__nand4_2 (98)      |gf180mcu_fd_sc_mcu9t5v0__nand4_2 (100) **M 
gf180mcu_fd_sc_mcu9t5v0__dffrnq_2 (94)     |gf180mcu_fd_sc_mcu9t5v0__dffrnq_2 (94)     
gf180mcu_fd_sc_mcu9t5v0__oai222_1 (217)    |gf180mcu_fd_sc_mcu9t5v0__oai222_1 (232) ** 
gf180mcu_fd_sc_mcu9t5v0__xnor2_1 (940)     |gf180mcu_fd_sc_mcu9t5v0__xnor2_1 (985) **M 
gf180mcu_fd_sc_mcu9t5v0__antenna (374->317 |gf180mcu_fd_sc_mcu9t5v0__antenna (374->317 
gf180mcu_fd_sc_mcu9t5v0__dlyb_1 (212)      |gf180mcu_fd_sc_mcu9t5v0__dlyb_1 (212)      
gf180mcu_fd_sc_mcu9t5v0__nand4_4 (35)      |gf180mcu_fd_sc_mcu9t5v0__nand4_4 (35)      
gf180mcu_fd_sc_mcu9t5v0__oai22_1 (1056)    |gf180mcu_fd_sc_mcu9t5v0__oai22_1 (1079) ** 
gf180mcu_fd_io__fill10 (906)               |gf180mcu_fd_io__fill10 (906)               
gf180mcu_fd_sc_mcu9t5v0__or4_1 (342)       |gf180mcu_fd_sc_mcu9t5v0__or4_1 (349) **Mis 
gf180mcu_fd_sc_mcu9t5v0__oai221_2 (39)     |gf180mcu_fd_sc_mcu9t5v0__oai221_2 (42) **M 
gf180mcu_fd_sc_mcu9t5v0__oai32_1 (399)     |gf180mcu_fd_sc_mcu9t5v0__oai32_1 (410) **M 
gf180mcu_fd_sc_mcu9t5v0__xor2_1 (574)      |gf180mcu_fd_sc_mcu9t5v0__xor2_1 (591) **Mi 
gf180mcu_fd_io__fill5 (78)                 |gf180mcu_fd_io__fill5 (78)                 
gf180mcu_fd_sc_mcu9t5v0__oai33_1 (250)     |gf180mcu_fd_sc_mcu9t5v0__oai33_1 (299) **M 
gf180mcu_fd_io__bi_24t (40)                |gf180mcu_fd_io__bi_24t (40)                
gf180mcu_fd_sc_mcu9t5v0__clkbuf_3 (188)    |gf180mcu_fd_sc_mcu9t5v0__clkbuf_3 (189) ** 
gf180mcu_fd_sc_mcu9t5v0__aoi222_2 (10)     |gf180mcu_fd_sc_mcu9t5v0__aoi222_2 (12) **M 
gf180mcu_fd_sc_mcu9t5v0__or2_2 (91)        |gf180mcu_fd_sc_mcu9t5v0__or2_2 (95) **Mism 
gf180mcu_fd_sc_mcu9t5v0__aoi221_2 (80)     |gf180mcu_fd_sc_mcu9t5v0__aoi221_2 (84) **M 
gf180mcu_fd_sc_mcu9t5v0__or3_2 (26)        |gf180mcu_fd_sc_mcu9t5v0__or3_2 (27) **Mism 
gf180mcu_fd_sc_mcu9t5v0__nand2_2 (97)      |gf180mcu_fd_sc_mcu9t5v0__nand2_2 (104) **M 
gf180mcu_fd_sc_mcu9t5v0__oai31_2 (192)     |gf180mcu_fd_sc_mcu9t5v0__oai31_2 (201) **M 
gf180mcu_fd_sc_mcu9t5v0__xnor2_2 (129)     |gf180mcu_fd_sc_mcu9t5v0__xnor2_2 (129)     
gf180mcu_fd_sc_mcu9t5v0__inv_1 (182)       |gf180mcu_fd_sc_mcu9t5v0__inv_1 (184) **Mis 
gf180mcu_fd_sc_mcu9t5v0__and2_2 (65)       |gf180mcu_fd_sc_mcu9t5v0__and2_2 (65)       
gf180mcu_fd_sc_mcu9t5v0__oai33_4 (12)      |gf180mcu_fd_sc_mcu9t5v0__oai33_4 (14) **Mi 
gf180mcu_fd_sc_mcu9t5v0__nand3_2 (126)     |gf180mcu_fd_sc_mcu9t5v0__nand3_2 (133) **M 
gf180mcu_fd_sc_mcu9t5v0__aoi21_2 (267)     |gf180mcu_fd_sc_mcu9t5v0__aoi21_2 (274) **M 
gf180mcu_fd_sc_mcu9t5v0__buf_3 (96)        |gf180mcu_fd_sc_mcu9t5v0__buf_3 (101) **Mis 
gf180mcu_fd_sc_mcu9t5v0__oai22_2 (83)      |gf180mcu_fd_sc_mcu9t5v0__oai22_2 (86) **Mi 
gf180mcu_fd_sc_mcu9t5v0__oai211_2 (89)     |gf180mcu_fd_sc_mcu9t5v0__oai211_2 (95) **M 
gf180mcu_fd_sc_mcu9t5v0__aoi22_2 (146)     |gf180mcu_fd_sc_mcu9t5v0__aoi22_2 (146)     
gf180mcu_fd_sc_mcu9t5v0__or4_2 (87)        |gf180mcu_fd_sc_mcu9t5v0__or4_2 (90) **Mism 
gf180mcu_fd_sc_mcu9t5v0__aoi211_2 (116)    |gf180mcu_fd_sc_mcu9t5v0__aoi211_2 (124) ** 
gf180mcu_fd_sc_mcu9t5v0__oai33_2 (41)      |gf180mcu_fd_sc_mcu9t5v0__oai33_2 (47) **Mi 
gf180mcu_fd_sc_mcu9t5v0__nor4_4 (58)       |gf180mcu_fd_sc_mcu9t5v0__nor4_4 (59) **Mis 
gf180mcu_fd_sc_mcu9t5v0__dffsnq_2 (24)     |gf180mcu_fd_sc_mcu9t5v0__dffsnq_2 (24)     
gf180mcu_fd_sc_mcu9t5v0__oai32_2 (32)      |gf180mcu_fd_sc_mcu9t5v0__oai32_2 (33) **Mi 
gf180mcu_fd_sc_mcu9t5v0__inv_3 (69)        |gf180mcu_fd_sc_mcu9t5v0__inv_3 (70) **Mism 
gf180mcu_fd_sc_mcu9t5v0__inv_4 (80)        |gf180mcu_fd_sc_mcu9t5v0__inv_4 (81) **Mism 
gf180mcu_fd_sc_mcu9t5v0__inv_2 (146)       |gf180mcu_fd_sc_mcu9t5v0__inv_2 (146)       
gf180mcu_fd_sc_mcu9t5v0__clkbuf_16 (68)    |gf180mcu_fd_sc_mcu9t5v0__clkbuf_16 (68)    
gf180mcu_fd_sc_mcu9t5v0__oai222_2 (5)      |gf180mcu_fd_sc_mcu9t5v0__oai222_2 (6) **Mi 
gf180mcu_fd_sc_mcu9t5v0__nor2_4 (90)       |gf180mcu_fd_sc_mcu9t5v0__nor2_4 (93) **Mis 
gf180mcu_fd_sc_mcu9t5v0__nor4_2 (201)      |gf180mcu_fd_sc_mcu9t5v0__nor4_2 (206) **Mi 
gf180mcu_fd_sc_mcu9t5v0__xor2_2 (112)      |gf180mcu_fd_sc_mcu9t5v0__xor2_2 (112)      
gf180mcu_fd_sc_mcu9t5v0__nand2_4 (88)      |gf180mcu_fd_sc_mcu9t5v0__nand2_4 (91) **Mi 
gf180mcu_fd_sc_mcu9t5v0__nand3_4 (35)      |gf180mcu_fd_sc_mcu9t5v0__nand3_4 (36) **Mi 
gf180mcu_fd_sc_mcu9t5v0__oai32_4 (5)       |gf180mcu_fd_sc_mcu9t5v0__oai32_4 (5)       
gf180mcu_fd_io__fill1 (58)                 |gf180mcu_fd_io__fill1 (58)                 
gf180mcu_fd_sc_mcu9t5v0__mux2_2 (50)       |gf180mcu_fd_sc_mcu9t5v0__mux2_2 (51) **Mis 
gf180mcu_fd_sc_mcu9t5v0__and3_2 (42)       |gf180mcu_fd_sc_mcu9t5v0__and3_2 (47) **Mis 
gf180mcu_fd_sc_mcu9t5v0__oai21_4 (38)      |gf180mcu_fd_sc_mcu9t5v0__oai21_4 (41) **Mi 
gf180mcu_fd_sc_mcu9t5v0__aoi221_4 (14)     |gf180mcu_fd_sc_mcu9t5v0__aoi221_4 (15) **M 
gf180mcu_fd_sc_mcu9t5v0__and4_2 (20)       |gf180mcu_fd_sc_mcu9t5v0__and4_2 (21) **Mis 
gf180mcu_fd_sc_mcu9t5v0__or4_4 (6)         |gf180mcu_fd_sc_mcu9t5v0__or4_4 (7) **Misma 
gf180mcu_fd_sc_mcu9t5v0__clkinv_12 (9)     |gf180mcu_fd_sc_mcu9t5v0__clkinv_12 (9)     
gf180mcu_fd_sc_mcu9t5v0__xnor3_1 (23)      |gf180mcu_fd_sc_mcu9t5v0__xnor3_1 (23)      
gf180mcu_fd_sc_mcu9t5v0__oai31_4 (30)      |gf180mcu_fd_sc_mcu9t5v0__oai31_4 (31) **Mi 
gf180mcu_fd_sc_mcu9t5v0__aoi211_4 (21)     |gf180mcu_fd_sc_mcu9t5v0__aoi211_4 (24) **M 
gf180mcu_fd_sc_mcu9t5v0__tieh (52)         |gf180mcu_fd_sc_mcu9t5v0__tieh (52)         
gf180mcu_fd_sc_mcu9t5v0__oai222_4 (1)      |gf180mcu_fd_sc_mcu9t5v0__oai222_4 (1)      
gf180mcu_fd_sc_mcu9t5v0__or2_4 (6)         |gf180mcu_fd_sc_mcu9t5v0__or2_4 (6)         
gf180mcu_fd_sc_mcu9t5v0__aoi21_4 (45)      |gf180mcu_fd_sc_mcu9t5v0__aoi21_4 (47) **Mi 
gf180mcu_fd_sc_mcu9t5v0__oai211_4 (9)      |gf180mcu_fd_sc_mcu9t5v0__oai211_4 (9)      
gf180mcu_fd_sc_mcu9t5v0__mux4_1 (7)        |gf180mcu_fd_sc_mcu9t5v0__mux4_1 (7)        
gf180mcu_fd_sc_mcu9t5v0__inv_12 (2)        |gf180mcu_fd_sc_mcu9t5v0__inv_12 (2)        
gf180mcu_fd_sc_mcu9t5v0__and2_4 (9)        |gf180mcu_fd_sc_mcu9t5v0__and2_4 (9)        
gf180mcu_fd_sc_mcu9t5v0__and3_4 (4)        |gf180mcu_fd_sc_mcu9t5v0__and3_4 (4)        
gf180mcu_ws_io__dvdd (8)                   |gf180mcu_ws_io__dvdd (8)                   
gf180mcu_fd_sc_mcu9t5v0__clkbuf_12 (10)    |gf180mcu_fd_sc_mcu9t5v0__clkbuf_12 (10)    
gf180mcu_fd_sc_mcu9t5v0__inv_8 (13)        |gf180mcu_fd_sc_mcu9t5v0__inv_8 (13)        
gf180mcu_fd_sc_mcu9t5v0__oai22_4 (16)      |gf180mcu_fd_sc_mcu9t5v0__oai22_4 (16)      
gf180mcu_fd_sc_mcu9t5v0__dlyb_2 (1)        |gf180mcu_fd_sc_mcu9t5v0__dlyb_2 (1)        
gf180mcu_fd_sc_mcu9t5v0__dffrnq_4 (8)      |gf180mcu_fd_sc_mcu9t5v0__dffrnq_4 (8)      
gf180mcu_fd_sc_mcu9t5v0__xor3_1 (11)       |gf180mcu_fd_sc_mcu9t5v0__xor3_1 (11)       
gf180mcu_fd_sc_mcu9t5v0__dffq_2 (4)        |gf180mcu_fd_sc_mcu9t5v0__dffq_2 (4)        
gf180mcu_fd_sc_mcu9t5v0__clkinv_20 (2)     |gf180mcu_fd_sc_mcu9t5v0__clkinv_20 (2)     
gf180mcu_fd_sc_mcu9t5v0__clkinv_8 (24)     |gf180mcu_fd_sc_mcu9t5v0__clkinv_8 (24)     
gf180mcu_fd_io__in_c (13)                  |gf180mcu_fd_io__in_c (13)                  
gf180mcu_fd_sc_mcu9t5v0__oai221_4 (6)      |gf180mcu_fd_sc_mcu9t5v0__oai221_4 (6)      
gf180mcu_fd_sc_mcu9t5v0__clkinv_4 (4)      |gf180mcu_fd_sc_mcu9t5v0__clkinv_4 (4)      
gf180mcu_fd_io__cor (4)                    |gf180mcu_fd_io__cor (4)                    
gf180mcu_fd_sc_mcu9t5v0__buf_12 (20)       |gf180mcu_fd_sc_mcu9t5v0__buf_12 (22) **Mis 
gf180mcu_fd_sc_mcu9t5v0__clkinv_2 (15)     |gf180mcu_fd_sc_mcu9t5v0__clkinv_2 (15)     
gf180mcu_fd_sc_mcu9t5v0__clkinv_16 (1)     |gf180mcu_fd_sc_mcu9t5v0__clkinv_16 (1)     
gf180mcu_fd_io__fillnc (20)                |gf180mcu_fd_io__fillnc (20)                
gf180mcu_ws_io__dvss (10)                  |gf180mcu_ws_io__dvss (10)                  
gf180mcu_fd_io__asig_5p0 (2)               |gf180mcu_fd_io__asig_5p0 (2)               
gf180mcu_fd_sc_mcu9t5v0__and4_4 (1)        |gf180mcu_fd_sc_mcu9t5v0__and4_4 (1)        
gf180mcu_fd_io__in_s (1)                   |gf180mcu_fd_io__in_s (1)                   
gf180mcu_fd_sc_mcu9t5v0__dffq_4 (1)        |gf180mcu_fd_sc_mcu9t5v0__dffq_4 (1)        
(no matching element)                      |nfet_05v0 (40->3)                          
(no matching element)                      |pfet_05v0 (40->3)                          
Number of devices: 137698 **Mismatch**     |Number of devices: 140300 **Mismatch**     
Number of nets: 133045 **Mismatch**        |Number of nets: 138947 **Mismatch**        
---------------------------------------------------------------------------------------
NET mismatches: Class fragments follow (with fanout counts):
Circuit 1: chip_top                        |Circuit 2: chip_top                        

---------------------------------------------------------------------------------------
Net: VDD                                   |Net: VDD                                   
  gf180mcu_fd_sc_mcu9t5v0__fillcap_8/VDD = |  gf180mcu_fd_sc_mcu9t5v0__fillcap_8/VDD = 
  gf180mcu_fd_sc_mcu9t5v0__fillcap_8/VNW = |  gf180mcu_fd_sc_mcu9t5v0__fillcap_8/VNW = 
  gf180mcu_fd_sc_mcu9t5v0__fillcap_16/VDD  |  gf180mcu_fd_sc_mcu9t5v0__fillcap_16/VDD  
  gf180mcu_fd_sc_mcu9t5v0__fillcap_16/VNW  |  gf180mcu_fd_sc_mcu9t5v0__fillcap_16/VNW  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/VDD = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/VDD = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/VNW = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/VNW = 1 
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/VDD = 10 |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/VDD = 10 
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/VNW = 10 |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/VNW = 10 
  gf180mcu_fd_sc_mcu9t5v0__fillcap_4/VDD = |  gf180mcu_fd_sc_mcu9t5v0__fillcap_4/VDD = 
  gf180mcu_fd_sc_mcu9t5v0__fillcap_4/VNW = |  gf180mcu_fd_sc_mcu9t5v0__fillcap_4/VNW = 
  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/VDD =  |  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/VDD =  
  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/VNW =  |  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/VNW =  
  gf180mcu_fd_sc_mcu9t5v0__or3_1/VDD = 459 |  gf180mcu_fd_sc_mcu9t5v0__or3_1/VDD = 486 
  gf180mcu_fd_sc_mcu9t5v0__or3_1/VNW = 459 |  gf180mcu_fd_sc_mcu9t5v0__or3_1/VNW = 486 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/VDD = 26 |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/VDD = 27 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/VNW = 26 |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/VNW = 27 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/VDD = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/VDD = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/VNW = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/VNW = 1 
  gf180mcu_fd_sc_mcu9t5v0__and2_1/VDD = 26 |  gf180mcu_fd_sc_mcu9t5v0__and2_1/VDD = 26 
  gf180mcu_fd_sc_mcu9t5v0__and2_1/VNW = 26 |  gf180mcu_fd_sc_mcu9t5v0__and2_1/VNW = 26 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/VDD = 4 |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/VDD = 4 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/VNW = 4 |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/VNW = 4 
  gf180mcu_fd_sc_mcu9t5v0__fillcap_64/VDD  |  gf180mcu_fd_sc_mcu9t5v0__fillcap_64/VDD  
  gf180mcu_fd_sc_mcu9t5v0__fillcap_64/VNW  |  gf180mcu_fd_sc_mcu9t5v0__fillcap_64/VNW  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/VDD =  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/VDD =  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/VNW =  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/VNW =  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/VDD = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/VDD = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/VNW = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/VNW = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/VDD =  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/VDD =  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/VNW =  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/VNW =  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/VDD =  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/VDD =  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/VNW =  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/VNW =  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/VDD = 6 |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/VDD = 6 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/VNW = 6 |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/VNW = 6 
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/VDD = 43 |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/VDD = 43 
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/VNW = 43 |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/VNW = 43 
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/VDD = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/VDD = 3 
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/VNW = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/VNW = 3 
  gf180mcu_fd_sc_mcu9t5v0__fillcap_32/VDD  |  gf180mcu_fd_sc_mcu9t5v0__fillcap_32/VDD  
  gf180mcu_fd_sc_mcu9t5v0__fillcap_32/VNW  |  gf180mcu_fd_sc_mcu9t5v0__fillcap_32/VNW  
  gf180mcu_fd_sc_mcu9t5v0__mux2_4/VDD = 25 |  gf180mcu_fd_sc_mcu9t5v0__mux2_4/VDD = 25 
  gf180mcu_fd_sc_mcu9t5v0__mux2_4/VNW = 25 |  gf180mcu_fd_sc_mcu9t5v0__mux2_4/VNW = 25 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/VDD =  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/VDD =  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/VNW =  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/VNW =  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/VDD = 11 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/VDD = 11 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/VNW = 11 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/VNW = 11 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/VDD = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/VDD = 2 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/VNW = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/VNW = 2 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/VDD =  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/VDD =  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/VNW =  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/VNW =  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/VDD = 252 |  gf180mcu_fd_sc_mcu9t5v0__or2_1/VDD = 264 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/VNW = 252 |  gf180mcu_fd_sc_mcu9t5v0__or2_1/VNW = 264 
  gf180mcu_fd_sc_mcu9t5v0__and3_1/VDD = 10 |  gf180mcu_fd_sc_mcu9t5v0__and3_1/VDD = 10 
  gf180mcu_fd_sc_mcu9t5v0__and3_1/VNW = 10 |  gf180mcu_fd_sc_mcu9t5v0__and3_1/VNW = 10 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/VDD = 2 |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/VDD = 2 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/VNW = 2 |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/VNW = 2 
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/VDD = 14 |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/VDD = 14 
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/VNW = 14 |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/VNW = 14 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/VDD =  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/VDD =  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/VNW =  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/VNW =  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/VDD = 445 |  gf180mcu_fd_sc_mcu9t5v0__buf_2/VDD = 454 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/VNW = 445 |  gf180mcu_fd_sc_mcu9t5v0__buf_2/VNW = 454 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/VDD = 461 |  gf180mcu_fd_sc_mcu9t5v0__buf_4/VDD = 462 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/VNW = 461 |  gf180mcu_fd_sc_mcu9t5v0__buf_4/VNW = 462 
  gf180mcu_fd_sc_mcu9t5v0__and4_1/VDD = 70 |  gf180mcu_fd_sc_mcu9t5v0__and4_1/VDD = 70 
  gf180mcu_fd_sc_mcu9t5v0__and4_1/VNW = 70 |  gf180mcu_fd_sc_mcu9t5v0__and4_1/VNW = 70 
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/VDD =  |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/VDD =  
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/VNW =  |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/VNW =  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/VDD =  |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/VDD =  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/VNW =  |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/VNW =  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/VDD =  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/VDD =  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/VNW =  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/VNW =  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/VDD = 16 |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/VDD = 16 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/VNW = 16 |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/VNW = 16 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/VDD =  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/VDD =  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/VNW =  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/VNW =  
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/VDD = 14 |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/VDD = 15 
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/VNW = 14 |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/VNW = 15 
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/VDD = 27 |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/VDD = 29 
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/VNW = 27 |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/VNW = 29 
  gf180mcu_fd_sc_mcu9t5v0__nor3_4/VDD = 36 |  gf180mcu_fd_sc_mcu9t5v0__nor3_4/VDD = 42 
  gf180mcu_fd_sc_mcu9t5v0__nor3_4/VNW = 36 |  gf180mcu_fd_sc_mcu9t5v0__nor3_4/VNW = 42 
  gf180mcu_fd_sc_mcu9t5v0__dffq_1/VDD = 75 |  gf180mcu_fd_sc_mcu9t5v0__dffq_1/VDD = 75 
  gf180mcu_fd_sc_mcu9t5v0__dffq_1/VNW = 75 |  gf180mcu_fd_sc_mcu9t5v0__dffq_1/VNW = 75 
  gf180mcu_fd_sc_mcu9t5v0__dlyc_1/VDD = 31 |  gf180mcu_fd_sc_mcu9t5v0__dlyc_1/VDD = 31 
  gf180mcu_fd_sc_mcu9t5v0__dlyc_1/VNW = 31 |  gf180mcu_fd_sc_mcu9t5v0__dlyc_1/VNW = 31 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/VDD = 502 |  gf180mcu_fd_sc_mcu9t5v0__buf_1/VDD = 515 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/VNW = 502 |  gf180mcu_fd_sc_mcu9t5v0__buf_1/VNW = 515 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/VDD =  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/VDD =  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/VNW =  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/VNW =  
  gf180mcu_fd_sc_mcu9t5v0__buf_8/VDD = 157 |  gf180mcu_fd_sc_mcu9t5v0__buf_8/VDD = 166 
  gf180mcu_fd_sc_mcu9t5v0__buf_8/VNW = 157 |  gf180mcu_fd_sc_mcu9t5v0__buf_8/VNW = 166 
  gf180mcu_fd_sc_mcu9t5v0__tiel/VDD = 245  |  gf180mcu_fd_sc_mcu9t5v0__tiel/VDD = 245  
  gf180mcu_fd_sc_mcu9t5v0__tiel/VNW = 245  |  gf180mcu_fd_sc_mcu9t5v0__tiel/VNW = 245  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_4/VDD = 4 |  gf180mcu_fd_sc_mcu9t5v0__aoi22_4/VDD = 4 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_4/VNW = 4 |  gf180mcu_fd_sc_mcu9t5v0__aoi22_4/VNW = 4 
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/VDD = 9 |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/VDD = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/VNW = 9 |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/VNW = 1 
  gf180mcu_fd_sc_mcu9t5v0__dffrnq_2/VDD =  |  gf180mcu_fd_sc_mcu9t5v0__dffrnq_2/VDD =  
  gf180mcu_fd_sc_mcu9t5v0__dffrnq_2/VNW =  |  gf180mcu_fd_sc_mcu9t5v0__dffrnq_2/VNW =  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/VDD =  |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/VDD =  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/VNW =  |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/VNW =  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/VDD = 9 |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/VDD = 9 
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/VNW = 9 |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/VNW = 9 
  gf180mcu_fd_sc_mcu9t5v0__antenna/VDD = 3 |  gf180mcu_fd_sc_mcu9t5v0__antenna/VDD = 3 
  gf180mcu_fd_sc_mcu9t5v0__antenna/VNW = 3 |  gf180mcu_fd_sc_mcu9t5v0__antenna/VNW = 3 
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/VDD = 21 |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/VDD = 21 
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/VNW = 21 |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/VNW = 21 
  gf180mcu_fd_sc_mcu9t5v0__nand4_4/VDD = 3 |  gf180mcu_fd_sc_mcu9t5v0__nand4_4/VDD = 3 
  gf180mcu_fd_sc_mcu9t5v0__nand4_4/VNW = 3 |  gf180mcu_fd_sc_mcu9t5v0__nand4_4/VNW = 3 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/VDD = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/VDD = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/VNW = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/VNW = 1 
  gf180mcu_fd_io__fill10/DVDD = 906        |  gf180mcu_fd_io__fill10/DVDD = 906        
  gf180mcu_fd_io__fill10/VDD = 906         |  gf180mcu_fd_io__fill10/VDD = 906         
  gf180mcu_fd_sc_mcu9t5v0__or4_1/VDD = 342 |  gf180mcu_fd_sc_mcu9t5v0__or4_1/VDD = 349 
  gf180mcu_fd_sc_mcu9t5v0__or4_1/VNW = 342 |  gf180mcu_fd_sc_mcu9t5v0__or4_1/VNW = 349 
  gf180mcu_fd_sc_mcu9t5v0__oai221_2/VDD =  |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/VDD =  
  gf180mcu_fd_sc_mcu9t5v0__oai221_2/VNW =  |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/VNW =  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/VDD = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/VDD = 4 
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/VNW = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/VNW = 4 
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/VDD = 57 |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/VDD = 59 
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/VNW = 57 |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/VNW = 59 
  gf180mcu_fd_io__fill5/DVDD = 78          |  gf180mcu_fd_io__fill5/DVDD = 78          
  gf180mcu_fd_io__fill5/VDD = 78           |  gf180mcu_fd_io__fill5/VDD = 78           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/VDD = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/VDD = 2 
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/VNW = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/VNW = 2 
  gf180mcu_fd_io__bi_24t/DVDD = 40         |  gf180mcu_fd_io__bi_24t/DVDD = 40         
  gf180mcu_fd_io__bi_24t/VDD = 40          |  gf180mcu_fd_io__bi_24t/VDD = 40          
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/VDD =  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/VDD =  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/VNW =  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/VNW =  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_2/VDD =  |  gf180mcu_fd_sc_mcu9t5v0__aoi222_2/VDD =  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_2/VNW =  |  gf180mcu_fd_sc_mcu9t5v0__aoi222_2/VNW =  
  gf180mcu_fd_sc_mcu9t5v0__or2_2/VDD = 91  |  gf180mcu_fd_sc_mcu9t5v0__or2_2/VDD = 95  
  gf180mcu_fd_sc_mcu9t5v0__or2_2/VNW = 91  |  gf180mcu_fd_sc_mcu9t5v0__or2_2/VNW = 95  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/VDD =  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/VDD =  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/VNW =  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/VNW =  
  gf180mcu_fd_sc_mcu9t5v0__or3_2/VDD = 26  |  gf180mcu_fd_sc_mcu9t5v0__or3_2/VDD = 27  
  gf180mcu_fd_sc_mcu9t5v0__or3_2/VNW = 26  |  gf180mcu_fd_sc_mcu9t5v0__or3_2/VNW = 27  
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/VDD = 9 |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/VDD = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/VNW = 9 |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/VNW = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/VDD = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/VDD = 2 
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/VNW = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/VNW = 2 
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/VDD = 1 |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/VDD = 1 
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/VNW = 1 |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/VNW = 1 
  gf180mcu_fd_sc_mcu9t5v0__inv_1/VDD = 182 |  gf180mcu_fd_sc_mcu9t5v0__inv_1/VDD = 184 
  gf180mcu_fd_sc_mcu9t5v0__inv_1/VNW = 182 |  gf180mcu_fd_sc_mcu9t5v0__inv_1/VNW = 184 
  gf180mcu_fd_sc_mcu9t5v0__and2_2/VDD = 65 |  gf180mcu_fd_sc_mcu9t5v0__and2_2/VDD = 65 
  gf180mcu_fd_sc_mcu9t5v0__and2_2/VNW = 65 |  gf180mcu_fd_sc_mcu9t5v0__and2_2/VNW = 65 
  gf180mcu_fd_sc_mcu9t5v0__oai33_4/VDD = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/VDD = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai33_4/VNW = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/VNW = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/VDD = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/VDD = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/VNW = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/VNW = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/VDD = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/VDD = 2 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/VNW = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/VNW = 2 
  gf180mcu_fd_sc_mcu9t5v0__buf_3/VDD = 96  |  gf180mcu_fd_sc_mcu9t5v0__buf_3/VDD = 101 
  gf180mcu_fd_sc_mcu9t5v0__buf_3/VNW = 96  |  gf180mcu_fd_sc_mcu9t5v0__buf_3/VNW = 101 
  gf180mcu_fd_sc_mcu9t5v0__oai22_2/VDD = 8 |  gf180mcu_fd_sc_mcu9t5v0__oai22_2/VDD = 8 
  gf180mcu_fd_sc_mcu9t5v0__oai22_2/VNW = 8 |  gf180mcu_fd_sc_mcu9t5v0__oai22_2/VNW = 8 
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/VDD =  |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/VDD =  
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/VNW =  |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/VNW =  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/VDD = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/VDD = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/VNW = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/VNW = 1 
  gf180mcu_fd_sc_mcu9t5v0__or4_2/VDD = 87  |  gf180mcu_fd_sc_mcu9t5v0__or4_2/VDD = 90  
  gf180mcu_fd_sc_mcu9t5v0__or4_2/VNW = 87  |  gf180mcu_fd_sc_mcu9t5v0__or4_2/VNW = 90  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/VDD =  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/VDD =  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/VNW =  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/VNW =  
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/VDD = 4 |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/VDD = 4 
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/VNW = 4 |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/VNW = 4 
  gf180mcu_fd_sc_mcu9t5v0__nor4_4/VDD = 58 |  gf180mcu_fd_sc_mcu9t5v0__nor4_4/VDD = 59 
  gf180mcu_fd_sc_mcu9t5v0__nor4_4/VNW = 58 |  gf180mcu_fd_sc_mcu9t5v0__nor4_4/VNW = 59 
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_2/VDD =  |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_2/VDD =  
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_2/VNW =  |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_2/VNW =  
  gf180mcu_fd_sc_mcu9t5v0__oai32_2/VDD = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/VDD = 3 
  gf180mcu_fd_sc_mcu9t5v0__oai32_2/VNW = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/VNW = 3 
  gf180mcu_fd_sc_mcu9t5v0__inv_3/VDD = 69  |  gf180mcu_fd_sc_mcu9t5v0__inv_3/VDD = 70  
  gf180mcu_fd_sc_mcu9t5v0__inv_3/VNW = 69  |  gf180mcu_fd_sc_mcu9t5v0__inv_3/VNW = 70  
  gf180mcu_fd_sc_mcu9t5v0__inv_4/VDD = 80  |  gf180mcu_fd_sc_mcu9t5v0__inv_4/VDD = 81  
  gf180mcu_fd_sc_mcu9t5v0__inv_4/VNW = 80  |  gf180mcu_fd_sc_mcu9t5v0__inv_4/VNW = 81  
  gf180mcu_fd_sc_mcu9t5v0__inv_2/VDD = 146 |  gf180mcu_fd_sc_mcu9t5v0__inv_2/VDD = 146 
  gf180mcu_fd_sc_mcu9t5v0__inv_2/VNW = 146 |  gf180mcu_fd_sc_mcu9t5v0__inv_2/VNW = 146 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_16/VDD = |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_16/VDD = 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_16/VNW = |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_16/VNW = 
  gf180mcu_fd_sc_mcu9t5v0__oai222_2/VDD =  |  gf180mcu_fd_sc_mcu9t5v0__oai222_2/VDD =  
  gf180mcu_fd_sc_mcu9t5v0__oai222_2/VNW =  |  gf180mcu_fd_sc_mcu9t5v0__oai222_2/VNW =  
  gf180mcu_fd_sc_mcu9t5v0__nor2_4/VDD = 90 |  gf180mcu_fd_sc_mcu9t5v0__nor2_4/VDD = 93 
  gf180mcu_fd_sc_mcu9t5v0__nor2_4/VNW = 90 |  gf180mcu_fd_sc_mcu9t5v0__nor2_4/VNW = 93 
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/VDD = 20 |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/VDD = 20 
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/VNW = 20 |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/VNW = 20 
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/VDD = 11 |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/VDD = 11 
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/VNW = 11 |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/VNW = 11 
  gf180mcu_fd_sc_mcu9t5v0__nand2_4/VDD = 8 |  gf180mcu_fd_sc_mcu9t5v0__nand2_4/VDD = 9 
  gf180mcu_fd_sc_mcu9t5v0__nand2_4/VNW = 8 |  gf180mcu_fd_sc_mcu9t5v0__nand2_4/VNW = 9 
  gf180mcu_fd_sc_mcu9t5v0__nand3_4/VDD = 3 |  gf180mcu_fd_sc_mcu9t5v0__nand3_4/VDD = 3 
  gf180mcu_fd_sc_mcu9t5v0__nand3_4/VNW = 3 |  gf180mcu_fd_sc_mcu9t5v0__nand3_4/VNW = 3 
  gf180mcu_fd_sc_mcu9t5v0__oai32_4/VDD = 5 |  gf180mcu_fd_sc_mcu9t5v0__oai32_4/VDD = 5 
  gf180mcu_fd_sc_mcu9t5v0__oai32_4/VNW = 5 |  gf180mcu_fd_sc_mcu9t5v0__oai32_4/VNW = 5 
  gf180mcu_fd_io__fill1/DVDD = 58          |  gf180mcu_fd_io__fill1/DVDD = 58          
  gf180mcu_fd_io__fill1/VDD = 58           |  gf180mcu_fd_io__fill1/VDD = 58           
  gf180mcu_fd_sc_mcu9t5v0__mux2_2/VDD = 50 |  gf180mcu_fd_sc_mcu9t5v0__mux2_2/VDD = 51 
  gf180mcu_fd_sc_mcu9t5v0__mux2_2/VNW = 50 |  gf180mcu_fd_sc_mcu9t5v0__mux2_2/VNW = 51 
  gf180mcu_fd_sc_mcu9t5v0__and3_2/VDD = 42 |  gf180mcu_fd_sc_mcu9t5v0__and3_2/VDD = 47 
  gf180mcu_fd_sc_mcu9t5v0__and3_2/VNW = 42 |  gf180mcu_fd_sc_mcu9t5v0__and3_2/VNW = 47 
  gf180mcu_fd_sc_mcu9t5v0__oai21_4/VDD = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai21_4/VDD = 4 
  gf180mcu_fd_sc_mcu9t5v0__oai21_4/VNW = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai21_4/VNW = 4 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_4/VDD =  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_4/VDD =  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_4/VNW =  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_4/VNW =  
  gf180mcu_fd_sc_mcu9t5v0__and4_2/VDD = 20 |  gf180mcu_fd_sc_mcu9t5v0__and4_2/VDD = 21 
  gf180mcu_fd_sc_mcu9t5v0__and4_2/VNW = 20 |  gf180mcu_fd_sc_mcu9t5v0__and4_2/VNW = 21 
  gf180mcu_fd_sc_mcu9t5v0__or4_4/VDD = 6   |  gf180mcu_fd_sc_mcu9t5v0__or4_4/VDD = 7   
  gf180mcu_fd_sc_mcu9t5v0__or4_4/VNW = 6   |  gf180mcu_fd_sc_mcu9t5v0__or4_4/VNW = 7   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_12/VDD = |  gf180mcu_fd_sc_mcu9t5v0__clkinv_12/VDD = 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_12/VNW = |  gf180mcu_fd_sc_mcu9t5v0__clkinv_12/VNW = 
  gf180mcu_fd_sc_mcu9t5v0__xnor3_1/VDD = 2 |  gf180mcu_fd_sc_mcu9t5v0__xnor3_1/VDD = 2 
  gf180mcu_fd_sc_mcu9t5v0__xnor3_1/VNW = 2 |  gf180mcu_fd_sc_mcu9t5v0__xnor3_1/VNW = 2 
  gf180mcu_fd_sc_mcu9t5v0__oai31_4/VDD = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai31_4/VDD = 3 
  gf180mcu_fd_sc_mcu9t5v0__oai31_4/VNW = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai31_4/VNW = 3 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/VDD =  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/VDD =  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/VNW =  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/VNW =  
  gf180mcu_fd_sc_mcu9t5v0__tieh/VDD = 52   |  gf180mcu_fd_sc_mcu9t5v0__tieh/VDD = 52   
  gf180mcu_fd_sc_mcu9t5v0__tieh/VNW = 52   |  gf180mcu_fd_sc_mcu9t5v0__tieh/VNW = 52   
  gf180mcu_fd_sc_mcu9t5v0__oai222_4/VDD =  |  gf180mcu_fd_sc_mcu9t5v0__oai222_4/VDD =  
  gf180mcu_fd_sc_mcu9t5v0__oai222_4/VNW =  |  gf180mcu_fd_sc_mcu9t5v0__oai222_4/VNW =  
  gf180mcu_fd_sc_mcu9t5v0__or2_4/VDD = 6   |  gf180mcu_fd_sc_mcu9t5v0__or2_4/VDD = 6   
  gf180mcu_fd_sc_mcu9t5v0__or2_4/VNW = 6   |  gf180mcu_fd_sc_mcu9t5v0__or2_4/VNW = 6   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/VDD = 4 |  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/VDD = 4 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/VNW = 4 |  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/VNW = 4 
  gf180mcu_fd_sc_mcu9t5v0__oai211_4/VDD =  |  gf180mcu_fd_sc_mcu9t5v0__oai211_4/VDD =  
  gf180mcu_fd_sc_mcu9t5v0__oai211_4/VNW =  |  gf180mcu_fd_sc_mcu9t5v0__oai211_4/VNW =  
  gf180mcu_fd_sc_mcu9t5v0__mux4_1/VDD = 7  |  gf180mcu_fd_sc_mcu9t5v0__mux4_1/VDD = 7  
  gf180mcu_fd_sc_mcu9t5v0__mux4_1/VNW = 7  |  gf180mcu_fd_sc_mcu9t5v0__mux4_1/VNW = 7  
  gf180mcu_fd_sc_mcu9t5v0__inv_12/VDD = 2  |  gf180mcu_fd_sc_mcu9t5v0__inv_12/VDD = 2  
  gf180mcu_fd_sc_mcu9t5v0__inv_12/VNW = 2  |  gf180mcu_fd_sc_mcu9t5v0__inv_12/VNW = 2  
  gf180mcu_fd_sc_mcu9t5v0__and2_4/VDD = 9  |  gf180mcu_fd_sc_mcu9t5v0__and2_4/VDD = 9  
  gf180mcu_fd_sc_mcu9t5v0__and2_4/VNW = 9  |  gf180mcu_fd_sc_mcu9t5v0__and2_4/VNW = 9  
  gf180mcu_fd_sc_mcu9t5v0__and3_4/VDD = 4  |  gf180mcu_fd_sc_mcu9t5v0__and3_4/VDD = 4  
  gf180mcu_fd_sc_mcu9t5v0__and3_4/VNW = 4  |  gf180mcu_fd_sc_mcu9t5v0__and3_4/VNW = 4  
  gf180mcu_ws_io__dvdd/DVDD = 8            |  gf180mcu_ws_io__dvdd/DVDD = 8            
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_12/VDD = |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_12/VDD = 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_12/VNW = |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_12/VNW = 
  gf180mcu_fd_sc_mcu9t5v0__inv_8/VDD = 13  |  gf180mcu_fd_sc_mcu9t5v0__inv_8/VDD = 13  
  gf180mcu_fd_sc_mcu9t5v0__inv_8/VNW = 13  |  gf180mcu_fd_sc_mcu9t5v0__inv_8/VNW = 13  
  gf180mcu_fd_sc_mcu9t5v0__oai22_4/VDD = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai22_4/VDD = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai22_4/VNW = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai22_4/VNW = 1 
  gf180mcu_fd_sc_mcu9t5v0__dlyb_2/VDD = 1  |  gf180mcu_fd_sc_mcu9t5v0__dlyb_2/VDD = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyb_2/VNW = 1  |  gf180mcu_fd_sc_mcu9t5v0__dlyb_2/VNW = 1  
  gf180mcu_fd_sc_mcu9t5v0__dffrnq_4/VDD =  |  gf180mcu_fd_sc_mcu9t5v0__dffrnq_4/VDD =  
  gf180mcu_fd_sc_mcu9t5v0__dffrnq_4/VNW =  |  gf180mcu_fd_sc_mcu9t5v0__dffrnq_4/VNW =  
  gf180mcu_fd_sc_mcu9t5v0__xor3_1/VDD = 11 |  gf180mcu_fd_sc_mcu9t5v0__xor3_1/VDD = 11 
  gf180mcu_fd_sc_mcu9t5v0__xor3_1/VNW = 11 |  gf180mcu_fd_sc_mcu9t5v0__xor3_1/VNW = 11 
  gf180mcu_fd_sc_mcu9t5v0__dffq_2/VDD = 4  |  gf180mcu_fd_sc_mcu9t5v0__dffq_2/VDD = 4  
  gf180mcu_fd_sc_mcu9t5v0__dffq_2/VNW = 4  |  gf180mcu_fd_sc_mcu9t5v0__dffq_2/VNW = 4  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_20/VDD = |  gf180mcu_fd_sc_mcu9t5v0__clkinv_20/VDD = 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_20/VNW = |  gf180mcu_fd_sc_mcu9t5v0__clkinv_20/VNW = 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_8/VDD =  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_8/VDD =  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_8/VNW =  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_8/VNW =  
  gf180mcu_fd_io__in_c/DVDD = 13           |  gf180mcu_fd_io__in_c/DVDD = 13           
  gf180mcu_fd_io__in_c/VDD = 13            |  gf180mcu_fd_io__in_c/VDD = 13            
  gf180mcu_fd_sc_mcu9t5v0__oai221_4/VDD =  |  gf180mcu_fd_sc_mcu9t5v0__oai221_4/VDD =  
  gf180mcu_fd_sc_mcu9t5v0__oai221_4/VNW =  |  gf180mcu_fd_sc_mcu9t5v0__oai221_4/VNW =  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_4/VDD =  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_4/VDD =  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_4/VNW =  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_4/VNW =  
  gf180mcu_fd_io__cor/DVDD = 4             |  gf180mcu_fd_io__cor/DVDD = 4             
  gf180mcu_fd_io__cor/VDD = 4              |  gf180mcu_fd_io__cor/VDD = 4              
  gf180mcu_fd_sc_mcu9t5v0__buf_12/VDD = 20 |  gf180mcu_fd_sc_mcu9t5v0__buf_12/VDD = 22 
  gf180mcu_fd_sc_mcu9t5v0__buf_12/VNW = 20 |  gf180mcu_fd_sc_mcu9t5v0__buf_12/VNW = 22 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_2/VDD =  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_2/VDD =  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_2/VNW =  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_2/VNW =  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_16/VDD = |  gf180mcu_fd_sc_mcu9t5v0__clkinv_16/VDD = 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_16/VNW = |  gf180mcu_fd_sc_mcu9t5v0__clkinv_16/VNW = 
  gf180mcu_fd_io__fillnc/DVDD = 20         |  gf180mcu_fd_io__fillnc/DVDD = 20         
  gf180mcu_fd_io__fillnc/VDD = 20          |  gf180mcu_fd_io__fillnc/VDD = 20          
  gf180mcu_ws_io__dvss/DVDD = 10           |  gf180mcu_ws_io__dvss/DVDD = 10           
  gf180mcu_ws_io__dvss/VDD = 10            |  gf180mcu_ws_io__dvss/VDD = 10            
  gf180mcu_fd_io__asig_5p0/DVDD = 2        |  gf180mcu_fd_io__asig_5p0/DVDD = 2        
  gf180mcu_fd_io__asig_5p0/VDD = 2         |  gf180mcu_fd_io__asig_5p0/VDD = 2         
  gf180mcu_fd_sc_mcu9t5v0__and4_4/VDD = 1  |  gf180mcu_fd_sc_mcu9t5v0__and4_4/VDD = 1  
  gf180mcu_fd_sc_mcu9t5v0__and4_4/VNW = 1  |  gf180mcu_fd_sc_mcu9t5v0__and4_4/VNW = 1  
  gf180mcu_fd_io__in_s/DVDD = 1            |  gf180mcu_fd_io__in_s/DVDD = 1            
  gf180mcu_fd_io__in_s/VDD = 1             |  gf180mcu_fd_io__in_s/VDD = 1             
  gf180mcu_fd_sc_mcu9t5v0__dffq_4/VDD = 1  |  gf180mcu_fd_sc_mcu9t5v0__dffq_4/VDD = 1  
  gf180mcu_fd_sc_mcu9t5v0__dffq_4/VNW = 1  |  gf180mcu_fd_sc_mcu9t5v0__dffq_4/VNW = 1  
                                           |  pfet_05v0/(1|3) = 3                      
                                           |  pfet_05v0/4 = 3                          
                                           |                                           
Net: VSS                                   |Net: VSS                                   
  gf180mcu_fd_sc_mcu9t5v0__fillcap_8/VPW = |  gf180mcu_fd_sc_mcu9t5v0__fillcap_8/VPW = 
  gf180mcu_fd_sc_mcu9t5v0__fillcap_8/VSS = |  gf180mcu_fd_sc_mcu9t5v0__fillcap_8/VSS = 
  gf180mcu_fd_sc_mcu9t5v0__fillcap_16/VPW  |  gf180mcu_fd_sc_mcu9t5v0__fillcap_16/VPW  
  gf180mcu_fd_sc_mcu9t5v0__fillcap_16/VSS  |  gf180mcu_fd_sc_mcu9t5v0__fillcap_16/VSS  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/VPW = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/VPW = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/VSS = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/VSS = 1 
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/VPW = 10 |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/VPW = 10 
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/VSS = 10 |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/VSS = 10 
  gf180mcu_fd_sc_mcu9t5v0__fillcap_4/VPW = |  gf180mcu_fd_sc_mcu9t5v0__fillcap_4/VPW = 
  gf180mcu_fd_sc_mcu9t5v0__fillcap_4/VSS = |  gf180mcu_fd_sc_mcu9t5v0__fillcap_4/VSS = 
  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/VPW =  |  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/VPW =  
  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/VSS =  |  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/VSS =  
  gf180mcu_fd_sc_mcu9t5v0__or3_1/VPW = 459 |  gf180mcu_fd_sc_mcu9t5v0__or3_1/VPW = 486 
  gf180mcu_fd_sc_mcu9t5v0__or3_1/VSS = 459 |  gf180mcu_fd_sc_mcu9t5v0__or3_1/VSS = 486 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/VPW = 26 |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/VPW = 27 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/VSS = 26 |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/VSS = 27 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/VPW = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/VPW = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/VSS = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/VSS = 1 
  gf180mcu_fd_sc_mcu9t5v0__and2_1/VPW = 26 |  gf180mcu_fd_sc_mcu9t5v0__and2_1/VPW = 26 
  gf180mcu_fd_sc_mcu9t5v0__and2_1/VSS = 26 |  gf180mcu_fd_sc_mcu9t5v0__and2_1/VSS = 26 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/VPW = 4 |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/VPW = 4 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/VSS = 4 |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/VSS = 4 
  gf180mcu_fd_sc_mcu9t5v0__fillcap_64/VPW  |  gf180mcu_fd_sc_mcu9t5v0__fillcap_64/VPW  
  gf180mcu_fd_sc_mcu9t5v0__fillcap_64/VSS  |  gf180mcu_fd_sc_mcu9t5v0__fillcap_64/VSS  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/VPW =  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/VPW =  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/VSS =  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/VSS =  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/VPW = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/VPW = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/VSS = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/VSS = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/VPW =  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/VPW =  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/VSS =  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/VSS =  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/VPW =  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/VPW =  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/VSS =  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/VSS =  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/VPW = 6 |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/VPW = 6 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/VSS = 6 |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/VSS = 6 
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/VPW = 43 |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/VPW = 43 
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/VSS = 43 |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/VSS = 43 
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/VPW = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/VPW = 3 
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/VSS = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/VSS = 3 
  gf180mcu_fd_sc_mcu9t5v0__fillcap_32/VPW  |  gf180mcu_fd_sc_mcu9t5v0__fillcap_32/VPW  
  gf180mcu_fd_sc_mcu9t5v0__fillcap_32/VSS  |  gf180mcu_fd_sc_mcu9t5v0__fillcap_32/VSS  
  gf180mcu_fd_sc_mcu9t5v0__mux2_4/VPW = 25 |  gf180mcu_fd_sc_mcu9t5v0__mux2_4/VPW = 25 
  gf180mcu_fd_sc_mcu9t5v0__mux2_4/VSS = 25 |  gf180mcu_fd_sc_mcu9t5v0__mux2_4/VSS = 25 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/VPW =  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/VPW =  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/VSS =  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/VSS =  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/VPW = 11 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/VPW = 11 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/VSS = 11 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/VSS = 11 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/VPW = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/VPW = 2 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/VSS = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/VSS = 2 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/VPW =  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/VPW =  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/VSS =  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/VSS =  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/VPW = 252 |  gf180mcu_fd_sc_mcu9t5v0__or2_1/VPW = 264 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/VSS = 252 |  gf180mcu_fd_sc_mcu9t5v0__or2_1/VSS = 264 
  gf180mcu_fd_sc_mcu9t5v0__and3_1/VPW = 10 |  gf180mcu_fd_sc_mcu9t5v0__and3_1/VPW = 10 
  gf180mcu_fd_sc_mcu9t5v0__and3_1/VSS = 10 |  gf180mcu_fd_sc_mcu9t5v0__and3_1/VSS = 10 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/VPW = 2 |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/VPW = 2 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/VSS = 2 |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/VSS = 2 
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/VPW = 14 |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/VPW = 14 
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/VSS = 14 |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/VSS = 14 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/VPW =  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/VPW =  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/VSS =  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/VSS =  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/VPW = 445 |  gf180mcu_fd_sc_mcu9t5v0__buf_2/VPW = 454 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/VSS = 445 |  gf180mcu_fd_sc_mcu9t5v0__buf_2/VSS = 454 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/VPW = 461 |  gf180mcu_fd_sc_mcu9t5v0__buf_4/VPW = 462 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/VSS = 461 |  gf180mcu_fd_sc_mcu9t5v0__buf_4/VSS = 462 
  gf180mcu_fd_sc_mcu9t5v0__and4_1/VPW = 70 |  gf180mcu_fd_sc_mcu9t5v0__and4_1/VPW = 70 
  gf180mcu_fd_sc_mcu9t5v0__and4_1/VSS = 70 |  gf180mcu_fd_sc_mcu9t5v0__and4_1/VSS = 70 
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/VPW =  |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/VPW =  
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/VSS =  |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/VSS =  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/VPW =  |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/VPW =  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/VSS =  |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/VSS =  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/VPW =  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/VPW =  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/VSS =  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/VSS =  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/VPW = 16 |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/VPW = 16 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/VSS = 16 |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/VSS = 16 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/VPW =  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/VPW =  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/VSS =  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/VSS =  
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/VPW = 14 |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/VPW = 15 
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/VSS = 14 |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/VSS = 15 
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/VPW = 27 |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/VPW = 29 
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/VSS = 27 |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/VSS = 29 
  gf180mcu_fd_sc_mcu9t5v0__nor3_4/VPW = 36 |  gf180mcu_fd_sc_mcu9t5v0__nor3_4/VPW = 42 
  gf180mcu_fd_sc_mcu9t5v0__nor3_4/VSS = 36 |  gf180mcu_fd_sc_mcu9t5v0__nor3_4/VSS = 42 
  gf180mcu_fd_sc_mcu9t5v0__dffq_1/VPW = 75 |  gf180mcu_fd_sc_mcu9t5v0__dffq_1/VPW = 75 
  gf180mcu_fd_sc_mcu9t5v0__dffq_1/VSS = 75 |  gf180mcu_fd_sc_mcu9t5v0__dffq_1/VSS = 75 
  gf180mcu_fd_sc_mcu9t5v0__dlyc_1/VPW = 31 |  gf180mcu_fd_sc_mcu9t5v0__dlyc_1/VPW = 31 
  gf180mcu_fd_sc_mcu9t5v0__dlyc_1/VSS = 31 |  gf180mcu_fd_sc_mcu9t5v0__dlyc_1/VSS = 31 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/VPW = 502 |  gf180mcu_fd_sc_mcu9t5v0__buf_1/VPW = 515 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/VSS = 502 |  gf180mcu_fd_sc_mcu9t5v0__buf_1/VSS = 515 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/VPW =  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/VPW =  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/VSS =  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/VSS =  
  gf180mcu_fd_sc_mcu9t5v0__buf_8/VPW = 157 |  gf180mcu_fd_sc_mcu9t5v0__buf_8/VPW = 166 
  gf180mcu_fd_sc_mcu9t5v0__buf_8/VSS = 157 |  gf180mcu_fd_sc_mcu9t5v0__buf_8/VSS = 166 
  gf180mcu_fd_sc_mcu9t5v0__tiel/VPW = 245  |  gf180mcu_fd_sc_mcu9t5v0__tiel/VPW = 245  
  gf180mcu_fd_sc_mcu9t5v0__tiel/VSS = 245  |  gf180mcu_fd_sc_mcu9t5v0__tiel/VSS = 245  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_4/VPW = 4 |  gf180mcu_fd_sc_mcu9t5v0__aoi22_4/VPW = 4 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_4/VSS = 4 |  gf180mcu_fd_sc_mcu9t5v0__aoi22_4/VSS = 4 
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/VPW = 9 |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/VPW = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/VSS = 9 |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/VSS = 1 
  gf180mcu_fd_sc_mcu9t5v0__dffrnq_2/VPW =  |  gf180mcu_fd_sc_mcu9t5v0__dffrnq_2/VPW =  
  gf180mcu_fd_sc_mcu9t5v0__dffrnq_2/VSS =  |  gf180mcu_fd_sc_mcu9t5v0__dffrnq_2/VSS =  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/VPW =  |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/VPW =  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/VSS =  |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/VSS =  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/VPW = 9 |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/VPW = 9 
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/VSS = 9 |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/VSS = 9 
  gf180mcu_fd_sc_mcu9t5v0__antenna/VPW = 3 |  gf180mcu_fd_sc_mcu9t5v0__antenna/VPW = 3 
  gf180mcu_fd_sc_mcu9t5v0__antenna/VSS = 3 |  gf180mcu_fd_sc_mcu9t5v0__antenna/VSS = 3 
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/VPW = 21 |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/VPW = 21 
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/VSS = 21 |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/VSS = 21 
  gf180mcu_fd_sc_mcu9t5v0__nand4_4/VPW = 3 |  gf180mcu_fd_sc_mcu9t5v0__nand4_4/VPW = 3 
  gf180mcu_fd_sc_mcu9t5v0__nand4_4/VSS = 3 |  gf180mcu_fd_sc_mcu9t5v0__nand4_4/VSS = 3 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/VPW = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/VPW = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/VSS = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/VSS = 1 
  gf180mcu_fd_io__fill10/DVSS = 906        |  gf180mcu_fd_io__fill10/DVSS = 906        
  gf180mcu_fd_io__fill10/VSS = 906         |  gf180mcu_fd_io__fill10/VSS = 906         
  gf180mcu_fd_sc_mcu9t5v0__or4_1/VPW = 342 |  gf180mcu_fd_sc_mcu9t5v0__or4_1/VPW = 349 
  gf180mcu_fd_sc_mcu9t5v0__or4_1/VSS = 342 |  gf180mcu_fd_sc_mcu9t5v0__or4_1/VSS = 349 
  gf180mcu_fd_sc_mcu9t5v0__oai221_2/VPW =  |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/VPW =  
  gf180mcu_fd_sc_mcu9t5v0__oai221_2/VSS =  |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/VSS =  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/VPW = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/VPW = 4 
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/VSS = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/VSS = 4 
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/VPW = 57 |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/VPW = 59 
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/VSS = 57 |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/VSS = 59 
  gf180mcu_fd_io__fill5/DVSS = 78          |  gf180mcu_fd_io__fill5/DVSS = 78          
  gf180mcu_fd_io__fill5/VSS = 78           |  gf180mcu_fd_io__fill5/VSS = 78           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/VPW = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/VPW = 2 
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/VSS = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/VSS = 2 
  gf180mcu_fd_io__bi_24t/DVSS = 40         |  gf180mcu_fd_io__bi_24t/DVSS = 40         
  gf180mcu_fd_io__bi_24t/VSS = 40          |  gf180mcu_fd_io__bi_24t/VSS = 40          
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/VPW =  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/VPW =  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/VSS =  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/VSS =  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_2/VPW =  |  gf180mcu_fd_sc_mcu9t5v0__aoi222_2/VPW =  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_2/VSS =  |  gf180mcu_fd_sc_mcu9t5v0__aoi222_2/VSS =  
  gf180mcu_fd_sc_mcu9t5v0__or2_2/VPW = 91  |  gf180mcu_fd_sc_mcu9t5v0__or2_2/VPW = 95  
  gf180mcu_fd_sc_mcu9t5v0__or2_2/VSS = 91  |  gf180mcu_fd_sc_mcu9t5v0__or2_2/VSS = 95  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/VPW =  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/VPW =  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/VSS =  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/VSS =  
  gf180mcu_fd_sc_mcu9t5v0__or3_2/VPW = 26  |  gf180mcu_fd_sc_mcu9t5v0__or3_2/VPW = 27  
  gf180mcu_fd_sc_mcu9t5v0__or3_2/VSS = 26  |  gf180mcu_fd_sc_mcu9t5v0__or3_2/VSS = 27  
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/VPW = 9 |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/VPW = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/VSS = 9 |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/VSS = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/VPW = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/VPW = 2 
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/VSS = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/VSS = 2 
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/VPW = 1 |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/VPW = 1 
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/VSS = 1 |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/VSS = 1 
  gf180mcu_fd_sc_mcu9t5v0__inv_1/VPW = 182 |  gf180mcu_fd_sc_mcu9t5v0__inv_1/VPW = 184 
  gf180mcu_fd_sc_mcu9t5v0__inv_1/VSS = 182 |  gf180mcu_fd_sc_mcu9t5v0__inv_1/VSS = 184 
  gf180mcu_fd_sc_mcu9t5v0__and2_2/VPW = 65 |  gf180mcu_fd_sc_mcu9t5v0__and2_2/VPW = 65 
  gf180mcu_fd_sc_mcu9t5v0__and2_2/VSS = 65 |  gf180mcu_fd_sc_mcu9t5v0__and2_2/VSS = 65 
  gf180mcu_fd_sc_mcu9t5v0__oai33_4/VPW = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/VPW = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai33_4/VSS = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/VSS = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/VPW = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/VPW = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/VSS = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/VSS = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/VPW = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/VPW = 2 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/VSS = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/VSS = 2 
  gf180mcu_fd_sc_mcu9t5v0__buf_3/VPW = 96  |  gf180mcu_fd_sc_mcu9t5v0__buf_3/VPW = 101 
  gf180mcu_fd_sc_mcu9t5v0__buf_3/VSS = 96  |  gf180mcu_fd_sc_mcu9t5v0__buf_3/VSS = 101 
  gf180mcu_fd_sc_mcu9t5v0__oai22_2/VPW = 8 |  gf180mcu_fd_sc_mcu9t5v0__oai22_2/VPW = 8 
  gf180mcu_fd_sc_mcu9t5v0__oai22_2/VSS = 8 |  gf180mcu_fd_sc_mcu9t5v0__oai22_2/VSS = 8 
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/VPW =  |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/VPW =  
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/VSS =  |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/VSS =  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/VPW = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/VPW = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/VSS = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/VSS = 1 
  gf180mcu_fd_sc_mcu9t5v0__or4_2/VPW = 87  |  gf180mcu_fd_sc_mcu9t5v0__or4_2/VPW = 90  
  gf180mcu_fd_sc_mcu9t5v0__or4_2/VSS = 87  |  gf180mcu_fd_sc_mcu9t5v0__or4_2/VSS = 90  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/VPW =  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/VPW =  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/VSS =  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/VSS =  
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/VPW = 4 |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/VPW = 4 
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/VSS = 4 |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/VSS = 4 
  gf180mcu_fd_sc_mcu9t5v0__nor4_4/VPW = 58 |  gf180mcu_fd_sc_mcu9t5v0__nor4_4/VPW = 59 
  gf180mcu_fd_sc_mcu9t5v0__nor4_4/VSS = 58 |  gf180mcu_fd_sc_mcu9t5v0__nor4_4/VSS = 59 
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_2/VPW =  |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_2/VPW =  
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_2/VSS =  |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_2/VSS =  
  gf180mcu_fd_sc_mcu9t5v0__oai32_2/VPW = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/VPW = 3 
  gf180mcu_fd_sc_mcu9t5v0__oai32_2/VSS = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/VSS = 3 
  gf180mcu_fd_sc_mcu9t5v0__inv_3/VPW = 69  |  gf180mcu_fd_sc_mcu9t5v0__inv_3/VPW = 70  
  gf180mcu_fd_sc_mcu9t5v0__inv_3/VSS = 69  |  gf180mcu_fd_sc_mcu9t5v0__inv_3/VSS = 70  
  gf180mcu_fd_sc_mcu9t5v0__inv_4/VPW = 80  |  gf180mcu_fd_sc_mcu9t5v0__inv_4/VPW = 81  
  gf180mcu_fd_sc_mcu9t5v0__inv_4/VSS = 80  |  gf180mcu_fd_sc_mcu9t5v0__inv_4/VSS = 81  
  gf180mcu_fd_sc_mcu9t5v0__inv_2/VPW = 146 |  gf180mcu_fd_sc_mcu9t5v0__inv_2/VPW = 146 
  gf180mcu_fd_sc_mcu9t5v0__inv_2/VSS = 146 |  gf180mcu_fd_sc_mcu9t5v0__inv_2/VSS = 146 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_16/VPW = |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_16/VPW = 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_16/VSS = |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_16/VSS = 
  gf180mcu_fd_sc_mcu9t5v0__oai222_2/VPW =  |  gf180mcu_fd_sc_mcu9t5v0__oai222_2/VPW =  
  gf180mcu_fd_sc_mcu9t5v0__oai222_2/VSS =  |  gf180mcu_fd_sc_mcu9t5v0__oai222_2/VSS =  
  gf180mcu_fd_sc_mcu9t5v0__nor2_4/VPW = 90 |  gf180mcu_fd_sc_mcu9t5v0__nor2_4/VPW = 93 
  gf180mcu_fd_sc_mcu9t5v0__nor2_4/VSS = 90 |  gf180mcu_fd_sc_mcu9t5v0__nor2_4/VSS = 93 
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/VPW = 20 |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/VPW = 20 
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/VSS = 20 |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/VSS = 20 
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/VPW = 11 |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/VPW = 11 
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/VSS = 11 |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/VSS = 11 
  gf180mcu_fd_sc_mcu9t5v0__nand2_4/VPW = 8 |  gf180mcu_fd_sc_mcu9t5v0__nand2_4/VPW = 9 
  gf180mcu_fd_sc_mcu9t5v0__nand2_4/VSS = 8 |  gf180mcu_fd_sc_mcu9t5v0__nand2_4/VSS = 9 
  gf180mcu_fd_sc_mcu9t5v0__nand3_4/VPW = 3 |  gf180mcu_fd_sc_mcu9t5v0__nand3_4/VPW = 3 
  gf180mcu_fd_sc_mcu9t5v0__nand3_4/VSS = 3 |  gf180mcu_fd_sc_mcu9t5v0__nand3_4/VSS = 3 
  gf180mcu_fd_sc_mcu9t5v0__oai32_4/VPW = 5 |  gf180mcu_fd_sc_mcu9t5v0__oai32_4/VPW = 5 
  gf180mcu_fd_sc_mcu9t5v0__oai32_4/VSS = 5 |  gf180mcu_fd_sc_mcu9t5v0__oai32_4/VSS = 5 
  gf180mcu_fd_io__fill1/DVSS = 58          |  gf180mcu_fd_io__fill1/DVSS = 58          
  gf180mcu_fd_io__fill1/VSS = 58           |  gf180mcu_fd_io__fill1/VSS = 58           
  gf180mcu_fd_sc_mcu9t5v0__mux2_2/VPW = 50 |  gf180mcu_fd_sc_mcu9t5v0__mux2_2/VPW = 51 
  gf180mcu_fd_sc_mcu9t5v0__mux2_2/VSS = 50 |  gf180mcu_fd_sc_mcu9t5v0__mux2_2/VSS = 51 
  gf180mcu_fd_sc_mcu9t5v0__and3_2/VPW = 42 |  gf180mcu_fd_sc_mcu9t5v0__and3_2/VPW = 47 
  gf180mcu_fd_sc_mcu9t5v0__and3_2/VSS = 42 |  gf180mcu_fd_sc_mcu9t5v0__and3_2/VSS = 47 
  gf180mcu_fd_sc_mcu9t5v0__oai21_4/VPW = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai21_4/VPW = 4 
  gf180mcu_fd_sc_mcu9t5v0__oai21_4/VSS = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai21_4/VSS = 4 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_4/VPW =  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_4/VPW =  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_4/VSS =  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_4/VSS =  
  gf180mcu_fd_sc_mcu9t5v0__and4_2/VPW = 20 |  gf180mcu_fd_sc_mcu9t5v0__and4_2/VPW = 21 
  gf180mcu_fd_sc_mcu9t5v0__and4_2/VSS = 20 |  gf180mcu_fd_sc_mcu9t5v0__and4_2/VSS = 21 
  gf180mcu_fd_sc_mcu9t5v0__or4_4/VPW = 6   |  gf180mcu_fd_sc_mcu9t5v0__or4_4/VPW = 7   
  gf180mcu_fd_sc_mcu9t5v0__or4_4/VSS = 6   |  gf180mcu_fd_sc_mcu9t5v0__or4_4/VSS = 7   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_12/VPW = |  gf180mcu_fd_sc_mcu9t5v0__clkinv_12/VPW = 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_12/VSS = |  gf180mcu_fd_sc_mcu9t5v0__clkinv_12/VSS = 
  gf180mcu_fd_sc_mcu9t5v0__xnor3_1/VPW = 2 |  gf180mcu_fd_sc_mcu9t5v0__xnor3_1/VPW = 2 
  gf180mcu_fd_sc_mcu9t5v0__xnor3_1/VSS = 2 |  gf180mcu_fd_sc_mcu9t5v0__xnor3_1/VSS = 2 
  gf180mcu_fd_sc_mcu9t5v0__oai31_4/VPW = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai31_4/VPW = 3 
  gf180mcu_fd_sc_mcu9t5v0__oai31_4/VSS = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai31_4/VSS = 3 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/VPW =  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/VPW =  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/VSS =  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/VSS =  
  gf180mcu_fd_sc_mcu9t5v0__tieh/VPW = 52   |  gf180mcu_fd_sc_mcu9t5v0__tieh/VPW = 52   
  gf180mcu_fd_sc_mcu9t5v0__tieh/VSS = 52   |  gf180mcu_fd_sc_mcu9t5v0__tieh/VSS = 52   
  gf180mcu_fd_sc_mcu9t5v0__oai222_4/VPW =  |  gf180mcu_fd_sc_mcu9t5v0__oai222_4/VPW =  
  gf180mcu_fd_sc_mcu9t5v0__oai222_4/VSS =  |  gf180mcu_fd_sc_mcu9t5v0__oai222_4/VSS =  
  gf180mcu_fd_sc_mcu9t5v0__or2_4/VPW = 6   |  gf180mcu_fd_sc_mcu9t5v0__or2_4/VPW = 6   
  gf180mcu_fd_sc_mcu9t5v0__or2_4/VSS = 6   |  gf180mcu_fd_sc_mcu9t5v0__or2_4/VSS = 6   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/VPW = 4 |  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/VPW = 4 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/VSS = 4 |  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/VSS = 4 
  gf180mcu_fd_sc_mcu9t5v0__oai211_4/VPW =  |  gf180mcu_fd_sc_mcu9t5v0__oai211_4/VPW =  
  gf180mcu_fd_sc_mcu9t5v0__oai211_4/VSS =  |  gf180mcu_fd_sc_mcu9t5v0__oai211_4/VSS =  
  gf180mcu_fd_sc_mcu9t5v0__mux4_1/VPW = 7  |  gf180mcu_fd_sc_mcu9t5v0__mux4_1/VPW = 7  
  gf180mcu_fd_sc_mcu9t5v0__mux4_1/VSS = 7  |  gf180mcu_fd_sc_mcu9t5v0__mux4_1/VSS = 7  
  gf180mcu_fd_sc_mcu9t5v0__inv_12/VPW = 2  |  gf180mcu_fd_sc_mcu9t5v0__inv_12/VPW = 2  
  gf180mcu_fd_sc_mcu9t5v0__inv_12/VSS = 2  |  gf180mcu_fd_sc_mcu9t5v0__inv_12/VSS = 2  
  gf180mcu_fd_sc_mcu9t5v0__and2_4/VPW = 9  |  gf180mcu_fd_sc_mcu9t5v0__and2_4/VPW = 9  
  gf180mcu_fd_sc_mcu9t5v0__and2_4/VSS = 9  |  gf180mcu_fd_sc_mcu9t5v0__and2_4/VSS = 9  
  gf180mcu_fd_sc_mcu9t5v0__and3_4/VPW = 4  |  gf180mcu_fd_sc_mcu9t5v0__and3_4/VPW = 4  
  gf180mcu_fd_sc_mcu9t5v0__and3_4/VSS = 4  |  gf180mcu_fd_sc_mcu9t5v0__and3_4/VSS = 4  
  gf180mcu_ws_io__dvdd/DVSS = 8            |  gf180mcu_ws_io__dvdd/DVSS = 8            
  gf180mcu_ws_io__dvdd/VSS = 8             |  gf180mcu_ws_io__dvdd/VSS = 8             
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_12/VPW = |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_12/VPW = 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_12/VSS = |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_12/VSS = 
  gf180mcu_fd_sc_mcu9t5v0__inv_8/VPW = 13  |  gf180mcu_fd_sc_mcu9t5v0__inv_8/VPW = 13  
  gf180mcu_fd_sc_mcu9t5v0__inv_8/VSS = 13  |  gf180mcu_fd_sc_mcu9t5v0__inv_8/VSS = 13  
  gf180mcu_fd_sc_mcu9t5v0__oai22_4/VPW = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai22_4/VPW = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai22_4/VSS = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai22_4/VSS = 1 
  gf180mcu_fd_sc_mcu9t5v0__dlyb_2/VPW = 1  |  gf180mcu_fd_sc_mcu9t5v0__dlyb_2/VPW = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyb_2/VSS = 1  |  gf180mcu_fd_sc_mcu9t5v0__dlyb_2/VSS = 1  
  gf180mcu_fd_sc_mcu9t5v0__dffrnq_4/VPW =  |  gf180mcu_fd_sc_mcu9t5v0__dffrnq_4/VPW =  
  gf180mcu_fd_sc_mcu9t5v0__dffrnq_4/VSS =  |  gf180mcu_fd_sc_mcu9t5v0__dffrnq_4/VSS =  
  gf180mcu_fd_sc_mcu9t5v0__xor3_1/VPW = 11 |  gf180mcu_fd_sc_mcu9t5v0__xor3_1/VPW = 11 
  gf180mcu_fd_sc_mcu9t5v0__xor3_1/VSS = 11 |  gf180mcu_fd_sc_mcu9t5v0__xor3_1/VSS = 11 
  gf180mcu_fd_sc_mcu9t5v0__dffq_2/VPW = 4  |  gf180mcu_fd_sc_mcu9t5v0__dffq_2/VPW = 4  
  gf180mcu_fd_sc_mcu9t5v0__dffq_2/VSS = 4  |  gf180mcu_fd_sc_mcu9t5v0__dffq_2/VSS = 4  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_20/VPW = |  gf180mcu_fd_sc_mcu9t5v0__clkinv_20/VPW = 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_20/VSS = |  gf180mcu_fd_sc_mcu9t5v0__clkinv_20/VSS = 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_8/VPW =  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_8/VPW =  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_8/VSS =  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_8/VSS =  
  gf180mcu_fd_io__in_c/DVSS = 13           |  gf180mcu_fd_io__in_c/DVSS = 13           
  gf180mcu_fd_io__in_c/VSS = 13            |  gf180mcu_fd_io__in_c/VSS = 13            
  gf180mcu_fd_sc_mcu9t5v0__oai221_4/VPW =  |  gf180mcu_fd_sc_mcu9t5v0__oai221_4/VPW =  
  gf180mcu_fd_sc_mcu9t5v0__oai221_4/VSS =  |  gf180mcu_fd_sc_mcu9t5v0__oai221_4/VSS =  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_4/VPW =  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_4/VPW =  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_4/VSS =  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_4/VSS =  
  gf180mcu_fd_io__cor/DVSS = 4             |  gf180mcu_fd_io__cor/DVSS = 4             
  gf180mcu_fd_io__cor/VSS = 4              |  gf180mcu_fd_io__cor/VSS = 4              
  gf180mcu_fd_sc_mcu9t5v0__buf_12/VPW = 20 |  gf180mcu_fd_sc_mcu9t5v0__buf_12/VPW = 22 
  gf180mcu_fd_sc_mcu9t5v0__buf_12/VSS = 20 |  gf180mcu_fd_sc_mcu9t5v0__buf_12/VSS = 22 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_2/VPW =  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_2/VPW =  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_2/VSS =  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_2/VSS =  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_16/VPW = |  gf180mcu_fd_sc_mcu9t5v0__clkinv_16/VPW = 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_16/VSS = |  gf180mcu_fd_sc_mcu9t5v0__clkinv_16/VSS = 
  gf180mcu_fd_io__fillnc/DVSS = 20         |  gf180mcu_fd_io__fillnc/DVSS = 20         
  gf180mcu_fd_io__fillnc/VSS = 20          |  gf180mcu_fd_io__fillnc/VSS = 20          
  gf180mcu_ws_io__dvss/DVSS = 10           |  gf180mcu_ws_io__dvss/DVSS = 10           
  gf180mcu_fd_io__asig_5p0/DVSS = 2        |  gf180mcu_fd_io__asig_5p0/DVSS = 2        
  gf180mcu_fd_io__asig_5p0/VSS = 2         |  gf180mcu_fd_io__asig_5p0/VSS = 2         
  gf180mcu_fd_sc_mcu9t5v0__and4_4/VPW = 1  |  gf180mcu_fd_sc_mcu9t5v0__and4_4/VPW = 1  
  gf180mcu_fd_sc_mcu9t5v0__and4_4/VSS = 1  |  gf180mcu_fd_sc_mcu9t5v0__and4_4/VSS = 1  
  gf180mcu_fd_io__in_s/DVSS = 1            |  gf180mcu_fd_io__in_s/DVSS = 1            
  gf180mcu_fd_io__in_s/VSS = 1             |  gf180mcu_fd_io__in_s/VSS = 1             
  gf180mcu_fd_sc_mcu9t5v0__dffq_4/VPW = 1  |  gf180mcu_fd_sc_mcu9t5v0__dffq_4/VPW = 1  
  gf180mcu_fd_sc_mcu9t5v0__dffq_4/VSS = 1  |  gf180mcu_fd_sc_mcu9t5v0__dffq_4/VSS = 1  
                                           |  nfet_05v0/(1|3) = 3                      
                                           |  nfet_05v0/4 = 3                          
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[57\]. |Net: net22112                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core7.b.arb_data_out\[1\] |Net: \i_chip_core.core0.b.gen_square[41].s 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[35\]. |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |                                           
Net: net18009                              |Net: net18009                              
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 4   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: net22160                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_4/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 3  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: net22327                              |Net: net22327                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    |                                           
                                           |                                           
Net: net15229                              |Net: net15229                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[55\]. |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 4  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    |                                           
                                           |                                           
Net: net10590                              |Net: net10590                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |                                           
                                           |                                           
Net: net14243                              |Net: net14243                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
                                           |                                           
Net: net19768                              |Net: net19768                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[29\]. |Net: \i_chip_core.core0.b.gen_square[27].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core4.b.arb_data_out\[0\] |Net: \i_chip_core.core5.b.gen_square[6].sq 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
                                           |                                           
Net: net12510                              |Net: net12510                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |                                           
                                           |                                           
Net: net12654                              |Net: net12654                              
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[4\].s |Net: \i_chip_core.core0.b.gen_square[59].s 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_4/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
Net: net8199                               |Net: net8199                               
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
                                           |                                           
Net: net20857                              |Net: net20857                              
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
                                           |                                           
Net: net18660                              |Net: net18660                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_4/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  |                                           
                                           |                                           
Net: net9886                               |Net: net9886                               
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 2 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 |                                           
                                           |                                           
Net: net18150                              |Net: net18150                              
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
                                           |                                           
Net: net18479                              |Net: net18479                              
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: net15540                              |Net: net15540                              
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
                                           |                                           
Net: net6807                               |Net: net6807                               
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
                                           |                                           
Net: net22320                              |Net: net22320                              
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    |                                           
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: net22033                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
                                           |                                           
Net: net20075                              |Net: net20075                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_2/A1 = 1    |                                           
                                           |                                           
Net: net16615                              |Net: net16615                              
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 3 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 3 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[62\]. |Net: \i_chip_core.core0.b.gen_square[5].sq 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 2    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or4_2/A4 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
                                           |                                           
Net: net15479                              |Net: net15479                              
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
                                           |                                           
Net: net19614                              |Net: net19614                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
                                           |                                           
Net: net16718                              |Net: net16718                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__inv_12/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
                                           |                                           
Net: net21637                              |Net: net21637                              
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_4/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_4/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.gen_square[29].s 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |                                           
Net: net12351                              |Net: net12351                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
                                           |                                           
Net: net19814                              |Net: net19814                              
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__antenna/I = 1   |  gf180mcu_fd_sc_mcu9t5v0__antenna/I = 1   
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[60\]. |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.gen_square[55].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |                                           
                                           |                                           
Net: net16218                              |Net: net16218                              
  gf180mcu_fd_sc_mcu9t5v0__buf_3/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_3/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: net15965                              |Net: net15965                              
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
                                           |                                           
Net: net14546                              |Net: net14546                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 4  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    |                                           
                                           |                                           
Net: net9969                               |Net: net9969                               
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
                                           |                                           
Net: net9808                               |Net: net9808                               
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 4 |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
                                           |                                           
Net: net18143                              |Net: net18143                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[52\]. |Net: net22108                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
                                           |                                           
Net: net20942                              |Net: net20942                              
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi221_4/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: net20093                              |Net: net20093                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |                                           
                                           |                                           
Net: net15206                              |Net: net15206                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 |                                           
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
                                           |                                           
Net: net20813                              |Net: net20813                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.gen_square[10].s 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
                                           |                                           
Net: net3268                               |Net: net3268                               
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: net14378                              |Net: net14378                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
                                           |                                           
Net: net18623                              |Net: net18623                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  |                                           
                                           |                                           
Net: net8571                               |Net: net8571                               
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
                                           |                                           
Net: net19432                              |Net: net19432                              
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 3   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 4  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 4  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[43\]. |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   
  gf180mcu_fd_sc_mcu9t5v0__buf_3/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 3  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
                                           |                                           
Net: net15841                              |Net: net15841                              
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
                                           |                                           
Net: net9688                               |Net: net9688                               
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[59\]. |Net: \i_chip_core.core0.b.gen_square[29].s 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.gen_square[6].sq 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[13\]. |Net: \i_chip_core.core0.b.gen_square[15].s 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[4\].s |Net: \i_chip_core.core0.b.gen_square[38].s 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 2  
                                           |                                           
Net: net13065                              |Net: net13065                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
Net: net17168                              |Net: net17168                              
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.gen_square[17].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 3  
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.gen_square[3].sq 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_4/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
Net: net14412                              |Net: net14412                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.gen_square[6].sq 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |                                           
Net: i_chip_core.core4.b.arb_data_out\[1\] |Net: \i_chip_core.core0.b.gen_square[28].s 
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[36\]. |Net: \i_chip_core.core0.b.gen_square[4].sq 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[38\]. |Net: \i_chip_core.core0.b.gen_square[29].s 
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |                                           
Net: net9853                               |Net: net9853                               
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: net14846                              |Net: net14846                              
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: net11462                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[29\]. |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
Net: net14755                              |Net: net14755                              
  gf180mcu_fd_sc_mcu9t5v0__oai222_2/C2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_2/C2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_2/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |                                           
Net: net20424                              |Net: net20424                              
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[30\]. |Net: \i_chip_core.core0.b.gen_square[47].s 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[11\]. |Net: \i_chip_core.core0.b.gen_square[41].s 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.gen_square[4].sq 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[6\].s |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 3 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 4  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.gen_square[50].s 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: net22052                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[10\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    |                                           
                                           |                                           
Net: net12720                              |Net: net12720                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |                                           
Net: net16850                              |Net: net16850                              
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[57\]. |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 1 
                                           |                                           
Net: i_chip_core.core3.b.arb_data_out\[0\] |Net: \i_chip_core.core3.b.gen_square[13].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[44\]. |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
                                           |                                           
Net: i_chip_core.core3.b.arb_data_out\[0\] |Net: net22044                              
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A4 = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
Net: net11860                              |Net: net11860                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
Net: net4825                               |Net: net4825                               
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |                                           
Net: net18388                              |Net: net18388                              
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |                                           
Net: net14405                              |Net: net14405                              
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[28\]. |Net: net18107                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[28\]. |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__and3_2/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[8\].s |Net: \i_chip_core.core1.b.gen_square[18].s 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_4/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |                                           
Net: net12121                              |Net: net12121                              
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[29\]. |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: net21539                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
                                           |                                           
Net: i_chip_core.core3.b.arb_data_out\[0\] |Net: net21295                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
                                           |                                           
Net: net16551                              |Net: net16551                              
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: i_chip_core.core3.b.arb_data_out\[0\] |Net: net21455                              
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_4/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
                                           |                                           
Net: net14415                              |Net: net14415                              
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
Net: net11707                              |Net: net11707                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[27\]. |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   |                                           
                                           |                                           
Net: i_chip_core.core0.b.arb_data_out\[0\] |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_2/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |                                           
Net: i_chip_core.core7.b.arb_data_out\[1\] |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[34\]. |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/I = 1  
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[13\]. |Net: \i_chip_core.core1.b.gen_square[42].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[6\].s |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
                                           |                                           
Net: net17073                              |Net: net17073                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.gen_square[9].sq 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[10\]. |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
Net: net14096                              |Net: net14096                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
Net: net15214                              |Net: net21350                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
                                           |                                           
Net: net2884                               |Net: net2884                               
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_2/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[44\]. |Net: \i_chip_core.core6.b.gen_square[55].s 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
Net: i_chip_core.core3.b.arb_data_out\[0\] |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: i_chip_core.core2.b.arb_data_out\[1\] |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai221_2/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[4\].s |Net: \i_chip_core.core1.b.gen_square[32].s 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
Net: net7392                               |Net: net7392                               
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_2/I1 = 1   
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[37\]. |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: net21446                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |                                           
Net: net14927                              |Net: net14927                              
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
                                           |                                           
Net: net11139                              |Net: net11139                              
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[55\]. |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[1\].s |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 2    |                                           
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[9\].s |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  
  gf180mcu_fd_sc_mcu9t5v0__oai21_4/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: net21348                              
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[14\]. |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 4  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_2/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: net21607                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: net15204                              |Net: net15204                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 4  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: net15380                              |Net: net15380                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[6\].s |Net: net20886                              
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: net13743                              |Net: net13743                              
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[44\]. |Net: net20853                              
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 4  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[54\]. |Net: \i_chip_core.core2.b.gen_square[36].s 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B2 = 1  
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[47\]. |Net: net20848                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.gen_square[35].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.gen_square[13].s 
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
Net: i_chip_core.core1.b.gen_square\[19\]. |Net: net20709                              
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    
  gf180mcu_fd_sc_mcu9t5v0__oai221_2/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: net1895                               |Net: net1895                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_4/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.gen_square[11].s 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.gen_square[23].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[4\].s |Net: net8395                               
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[0\].s |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_2/C1 = 1 |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.gen_square[45].s 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[46\]. |Net: net20999                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[39\]. |Net: \i_chip_core.core2.b.gen_square[14].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[19\]. |Net: \i_chip_core.core2.b.gen_square[13].s 
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: net20667                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core6.b.arb_data_out\[1\] |Net: net20668                              
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: net20666                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: net12974                              |Net: net12974                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[8\].s |Net: \i_chip_core.core2.b.gen_square[30].s 
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
                                           |                                           
Net: net7621                               |Net: net7621                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |                                           
Net: net12255                              |Net: net12255                              
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or4_4/A3 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |                                           
                                           |                                           
Net: net17475                              |Net: net17475                              
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |                                           
Net: net15256                              |Net: net15256                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai33_4/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_8/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_8/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
Net: net6190                               |Net: net6190                               
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
                                           |                                           
Net: net3319                               |Net: net3319                               
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[49\]. |Net: net20910                              
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: net15490                              |Net: net15490                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
Net: net16085                              |Net: net16085                              
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: net20619                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__and2_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_4/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
Net: net15358                              |Net: net15358                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 3  
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
Net: net15213                              |Net: net15213                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.gen_square[34].s 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[13\]. |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |                                           
Net: i_chip_core.core4.b.arb_data_out\[0\] |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[10\]. |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |                                           
Net: net8524                               |Net: net8524                               
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[55\]. |Net: \i_chip_core.core2.b.gen_square[13].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |                                           
Net: net6487                               |Net: net6487                               
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[58\]. |Net: \i_chip_core.core2.b.gen_square[13].s 
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 4   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
Net: net8804                               |Net: net8804                               
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 3  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/B = 1  
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.gen_square[21].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[29\]. |Net: \i_chip_core.core2.b.gen_square[36].s 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 6   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: net15202                              |Net: net15202                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: net17574                              |Net: net17574                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |                                           
Net: net13185                              |Net: net13185                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[54\]. |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
Net: i_chip_core.core5.b.arb_data_out\[0\] |Net: \i_chip_core.core2.b.gen_square[35].s 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 4   
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |                                           
                                           |                                           
Net: net11149                              |Net: net11149                              
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
Net: i_chip_core.core3.b.arb_data_out\[0\] |Net: \i_chip_core.core2.b.gen_square[4].sq 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and4_2/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core4.b.arb_data_out\[1\] |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.gen_square[23].s 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.gen_square[34].s 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 3     |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |                                           
Net: net11021                              |Net: net11021                              
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |                                           
Net: net17343                              |Net: net17343                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |                                           
Net: i_chip_core.core2.b.arb_data_out\[1\] |Net: \i_chip_core.core2.b.gen_square[34].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |                                           
Net: net11001                              |Net: net11001                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   
                                           |                                           
Net: net17119                              |Net: net17119                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A4 = 1    
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[19\]. |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: net16996                              |Net: net16996                              
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
Net: net11293                              |Net: net11293                              
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.gen_square[34].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |                                           
Net: net11422                              |Net: net11422                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[57\]. |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.gen_square[43].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_4/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_4/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[31\]. |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 2  
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[25\]. |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[27\]. |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_4/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |                                           
Net: net12991                              |Net: net12991                              
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: net6592                               |Net: net6592                               
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: net14225                              
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyc_1/Z = 1    
                                           |                                           
Net: net17162                              |Net: net17162                              
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |                                           
Net: i_chip_core.core3.b.arb_data_out\[0\] |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.arb_data_out\[0\] |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 3    
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |                                           
Net: i_chip_core.core4.b.arb_data_out\[0\] |Net: net20312                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[41\]. |Net: \i_chip_core.core0.b.gen_square[1].sq 
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 2    |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
                                           |                                           
Net: net15750                              |Net: net15750                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__oai32_2/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[52\]. |Net: \i_chip_core.core3.b.gen_square[2].sq 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
Net: i_chip_core.core3.b.arb_data_out\[0\] |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[9\].s |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
Net: net16873                              |Net: net16873                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 5   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 3    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: net5777                               |Net: net5777                               
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
Net: i_chip_core.core3.b.arb_data_out\[0\] |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
Net: i_chip_core.core3.b.arb_data_out\[0\] |Net: net20218                              
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[31\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 3    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.gen_square[37].s 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
Net: net7475                               |Net: net7475                               
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
Net: i_chip_core.core1.b.gen_square\[27\]. |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: net17600                              |Net: net17600                              
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.gen_square[59].s 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: net20187                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__inv_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.gen_square[48].s 
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.gen_square[49].s 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 5  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A4 = 1  
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[23\]. |Net: net20096                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[20\]. |Net: \i_chip_core.core6.b.gen_square[40].s 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
                                           |                                           
Net: net15357                              |Net: net15357                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 3  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[38\]. |Net: \i_chip_core.core7.b.gen_square[31].s 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[24\]. |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[4\].s |Net: net20042                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: net7463                               |Net: net7463                               
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
Net: i_chip_core.core1.b.gen_square\[31\]. |Net: \i_chip_core.core3.b.gen_square[9].sq 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
Net: net16538                              |Net: net16538                              
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.arb_data_out[6]_ 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A3 = 1    
                                           |                                           
Net: i_chip_core.core6.b.arb_data_out\[0\] |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
                                           |                                           
Net: net13948                              |Net: net13948                              
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai33_4/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
                                           |                                           
Net: net6451                               |Net: net6451                               
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.gen_square[41].s 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[8\].s |Net: net20245                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[3\].s |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 4  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[56\]. |Net: \i_chip_core.core3.b.gen_square[9].sq 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 3    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |                                           
Net: net10039                              |Net: net10039                              
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
                                           |                                           
Net: net12923                              |Net: net12923                              
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |                                           
Net: i_chip_core.core4.b.arb_data_out\[1\] |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[19\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[40\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__or4_2/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[41\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[8\].s |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[40\]. |Net: \i_chip_core.core3.b.gen_square[16].s 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |                                           
Net: net11774                              |Net: net11774                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[18\]. |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |                                           
                                           |                                           
Net: net14242                              |Net: net14242                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[12\]. |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
                                           |                                           
Net: i_chip_core.core7.b.arb_data_out\[1\] |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.gen_square[4].sq 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.gen_square[9].sq 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |                                           
Net: net17489                              |Net: net17489                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A4 = 1  
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[44\]. |Net: \i_chip_core.core3.b.gen_square[13].s 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[13\]. |Net: \i_chip_core.core3.b.gen_square[13].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[60\]. |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  nfet_05v0/(1|3) = 1                      
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  nfet_05v0/2 = 1                          
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  pfet_05v0/(1|3) = 1                      
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  pfet_05v0/2 = 1                          
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.gen_square[9].sq 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 6  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 5   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: i_chip_core.core1.b.gen_square\[26\]. |Net: net20033                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor4_4/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_4/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.gen_square[14].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[10\]. |Net: net19375                              
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor3_4/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_4/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.gen_square[18].s 
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[43\]. |Net: \i_chip_core.core3.b.gen_square[19].s 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
Net: net12631                              |Net: net12631                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |                                           
                                           |                                           
Net: net17592                              |Net: net17592                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[3\].s |Net: \i_chip_core.core4.b.gen_square[62].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |                                           
Net: i_chip_core.core3.b.arb_data_out\[0\] |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.gen_square[37].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 3   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 3  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: net7830                               |Net: net7830                               
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: net20353                              
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[48\]. |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
                                           |                                           
Net: i_chip_core.core1.b.gen_square\[32\]. |Net: \i_chip_core.core3.b.gen_square[27].s 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 5  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.gen_square[27].s 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
Net: i_chip_core.core2.b.arb_data_out\[1\] |Net: \i_chip_core.core3.b.gen_square[28].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 4  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 5  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
Net: i_chip_core.core3.b.arb_data_out\[0\] |Net: \i_chip_core.core3.b.gen_square[35].s 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_4/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 3  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |                                           
Net: net12422                              |Net: net12422                              
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[15\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.gen_square[29].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_4/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.gen_square[34].s 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[62\]. |Net: net20298                              
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[59\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[40\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[52\]. |Net: net20168                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[27\]. |Net: net20167                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core4.b.arb_data_out\[0\] |Net: \i_chip_core.core3.b.gen_square[50].s 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |                                           
Net: i_chip_core.core1.b.arb_data_out\[0\] |Net: net20172                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[37\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[40\]. |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 2 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: net20132                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: net20125                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[25\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[59\]. |Net: \i_chip_core.core3.b.gen_square[6].sq 
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[49\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |                                           
Net: i_chip_core.core6.b.arb_data_out\[1\] |Net: net15553                              
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
Net: i_chip_core.core1.b.arb_data_out\[0\] |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
Net: i_chip_core.core4.b.arb_data_out\[0\] |Net: net20173                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[37\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 4  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[57\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |                                           
Net: i_chip_core.core2.b.arb_data_out\[0\] |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[13\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[4\].s |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.gen_square[6].sq 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.gen_square[7].sq 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[8\].s |Net: \i_chip_core.core4.b.gen_square[7].sq 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 3    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A3 = 1   
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[37\]. |Net: \i_chip_core.core4.b.gen_square[4].sq 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
Net: net15682                              |Net: net15682                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[46\]. |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |                                           
Net: net12076                              |Net: net12076                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[46\]. |Net: net19494                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[40\]. |Net: net19827                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
Net: i_chip_core.core6.b.arb_data_out\[0\] |Net: net19804                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[1\].s |Net: \i_chip_core.core5.b.gen_square[26].s 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.gen_square[12].s 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[13\]. |Net: \i_chip_core.core4.b.gen_square[23].s 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.gen_square[48].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 3    
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.gen_square[45].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[33\]. |Net: \i_chip_core.core4.b.gen_square[45].s 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |                                           
Net: i_chip_core.core0.b.arb_data_out\[6\] |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[55\]. |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |                                           
Net: i_chip_core.core4.b.arb_data_out\[0\] |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
Net: i_chip_core.core2.b.arb_data_out\[1\] |Net: net19597                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core3.b.arb_data_out\[0\] |Net: \i_chip_core.core4.b.gen_square[62].s 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[9\].s |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A2 = 1  
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.gen_square[55].s 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
Net: i_chip_core.core6.b.arb_data_out\[1\] |Net: \i_chip_core.core4.b.gen_square[60].s 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: net15986                              |Net: net15986                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[55\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
Net: net14247                              |Net: net14247                              
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[8\].s |Net: \i_chip_core.core6.b.gen_square[1].sq 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[12\]. |Net: net14179                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
                                           |                                           
Net: net16740                              |Net: net16740                              
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: net19764                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.gen_square[29].s 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[30\]. |Net: net19722                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core3.b.arb_data_out\[0\] |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.gen_square[22].s 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 3    
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[30\]. |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.gen_square[40].s 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[13\]. |Net: \i_chip_core.core4.b.gen_square[47].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.gen_square[47].s 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[38\]. |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[37\]. |Net: net19637                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core4.b.arb_data_out\[0\] |Net: net19635                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
                                           |                                           
Net: i_chip_core.core3.b.arb_data_out\[0\] |Net: \i_chip_core.core4.b.gen_square[44].s 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 4  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[21\]. |Net: \i_chip_core.core4.b.gen_square[40].s 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[34\]. |Net: \i_chip_core.core5.b.gen_square[29].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: net16264                              |Net: net16264                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: net19570                              
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |                                           
Net: i_chip_core.core3.b.arb_data_out\[0\] |Net: \i_chip_core.core4.b.gen_square[9].sq 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
Net: net12013                              |Net: net12013                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.gen_square[43].s 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_4/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.gen_square[12].s 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.gen_square[12].s 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[23\]. |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[55\]. |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 3  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
Net: i_chip_core.core6.b.arb_data_out\[0\] |Net: \i_chip_core.core4.b.gen_square[12].s 
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[60\]. |Net: \i_chip_core.core4.b.gen_square[41].s 
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 4  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: net19836                              
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.gen_square[2].sq 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core2.b.arb_data_out\[0\] |Net: net19833                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: net19832                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: net19818                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 3  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 4   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[52\]. |Net: \i_chip_core.core4.b.gen_square[1].sq 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__antenna/I = 1   
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.gen_square[9].sq 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[33\]. |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 5  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[7\].s |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 5  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 5  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[7\].s |Net: \i_chip_core.core4.b.gen_square[37].s 
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[6\].s |Net: \i_chip_core.core4.b.gen_square[62].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
Net: i_chip_core.core7.b.arb_data_out\[0\] |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.gen_square[37].s 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
Net: i_chip_core.core6.b.arb_data_out\[0\] |Net: \i_chip_core.core4.b.gen_square[29].s 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
Net: i_chip_core.core0.b.arb_data_out\[0\] |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |                                           
Net: net15037                              |Net: net15037                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[23\]. |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[40\]. |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |                                           
Net: net12929                              |Net: net12929                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
Net: i_chip_core.core7.b.arb_data_out\[1\] |Net: \i_chip_core.core4.b.gen_square[37].s 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 2   
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.gen_square[59].s 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/B = 1   
                                           |                                           
Net: i_chip_core.core6.b.arb_data_out\[0\] |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[5\].s |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
Net: i_chip_core.core6.b.arb_data_out\[0\] |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 5  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[2\].s |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[40\]. |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[48\]. |Net: \i_chip_core.core4.b.gen_square[43].s 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 4  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[46\]. |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
                                           |                                           
Net: i_chip_core.core4.b.arb_data_out\[0\] |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 5  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.gen_square[56].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |                                           
Net: i_chip_core.core7.b.arb_data_out\[1\] |Net: \i_chip_core.core4.b.gen_square[57].s 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.gen_square[21].s 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.gen_square[50].s 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.gen_square[15].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[29\]. |Net: \i_chip_core.core0.b.gen_square[9].sq 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.gen_square[60].s 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
Net: i_chip_core.core3.b.arb_data_out\[0\] |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[62\]. |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: net19577                              
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.gen_square[62].s 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[8\].s |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: net19511                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: net2239                               |Net: net2239                               
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |                                           
Net: net14396                              |Net: net14396                              
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[41\]. |Net: \i_chip_core.core5.b.gen_square[1].sq 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[12\]. |Net: \i_chip_core.core5.b.arb_data_out[6]_ 
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |                                           
Net: net15532                              |Net: net15532                              
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A4 = 1    
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[55\]. |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__or4_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[48\]. |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 5  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: net19247                              
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[45\]. |Net: net19237                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: net19236                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__or3_2/A3 = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_4/A1 = 1  
                                           |                                           
Net: net14349                              |Net: net14349                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |                                           
Net: net6431                               |Net: net6431                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |                                           
Net: net12750                              |Net: net12750                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.gen_square[38].s 
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[11\]. |Net: net19158                              
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: net19419                              
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
                                           |                                           
Net: net13994                              |Net: net13994                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.gen_square[7].sq 
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[57\]. |Net: net19299                              
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: net19317                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
                                           |                                           
Net: i_chip_core.core0.b.arb_data_out\[0\] |Net: \i_chip_core.core0.b.gen_square[1].sq 
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[8\].s |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
Net: net10030                              |Net: net10030                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
Net: net7674                               |Net: net7674                               
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 2 
                                           |                                           
Net: net14481                              |Net: net14481                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
Net: i_chip_core.core6.b.arb_data_out\[1\] |Net: net19246                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core4.b.arb_data_out\[0\] |Net: \i_chip_core.core5.b.gen_square[20].s 
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |                                           
Net: net16016                              |Net: net16016                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
                                           |                                           
Net: net13942                              |Net: net13942                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_4/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/B1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
Net: net18521                              |Net: net18521                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |                                           
Net: net12100                              |Net: net12100                              
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.gen_square[28].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.gen_square[29].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |                                           
Net: net9987                               |Net: net19296                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 4  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[6\].s |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
Net: i_chip_core.core6.b.arb_data_out\[0\] |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  
                                           |                                           
Net: i_chip_core.core6.b.arb_data_out\[1\] |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.gen_square[1].sq 
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |                                           
Net: net15378                              |Net: net15378                              
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
                                           |                                           
Net: net12172                              |Net: net12172                              
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[33\]. |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 3  
                                           |                                           
Net: net9927                               |Net: net9927                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[55\]. |Net: net19205                              
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: net16911                              |Net: net16911                              
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B2 = 1 
                                           |                                           
Net: net14449                              |Net: net14449                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: net13945                              |Net: net13945                              
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai33_4/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B1 = 1  
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[40\]. |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_2/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core0.b.arb_data_out\[0\] |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
Net: net16913                              |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: net14413                              |Net: net14413                              
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 2  
                                           |                                           
Net: net6497                               |Net: net6497                               
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[22\]. |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[57\]. |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 2 
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.gen_square[40].s 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
Net: net11190                              |Net: net11190                              
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
Net: net16500                              |Net: net16500                              
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/C = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.gen_square[52].s 
  gf180mcu_fd_sc_mcu9t5v0__and3_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: i_chip_core.core1.b.gen_square\[59\]. |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_4/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.gen_square[9].sq 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[27\]. |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |                                           
Net: net13558                              |Net: net13558                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.gen_square[6].sq 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.gen_square[6].sq 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
                                           |                                           
Net: i_chip_core.core6.b.arb_data_out\[0\] |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 5  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
Net: net12812                              |Net: net12812                              
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |                                           
Net: net12450                              |Net: net12450                              
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: i_chip_core.core6.b.arb_data_out\[1\] |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.gen_square[28].s 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: net18682                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.gen_square[12].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.gen_square[1].sq 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.gen_square[45].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.gen_square[40].s 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.gen_square[46].s 
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.gen_square[57].s 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.gen_square[57].s 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: net18556                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: net11955                              |Net: net11955                              
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: net18565                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__and3_2/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
Net: net10647                              |Net: net10647                              
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[6\].s |Net: net18570                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: net12409                              |Net: net12409                              
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[2\].s |Net: \i_chip_core.core7.b.gen_square[4].sq 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |                                           
Net: net12900                              |Net: net12900                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
Net: i_chip_core.core4.b.arb_data_out\[0\] |Net: \i_chip_core.core6.b.gen_square[57].s 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[61\]. |Net: net18588                              
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: net8989                               |Net: net8989                               
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  |                                           
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 2   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: net20220                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
Net: net19496                              |Net: net19496                              
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[58\]. |Net: net5827                               
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
                                           |                                           
Net: net17104                              |Net: net17104                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[40\]. |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[28\]. |Net: \i_chip_core.core6.b.gen_square[29].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |                                           
Net: net17372                              |Net: net17372                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |                                           
Net: net10690                              |Net: net10690                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 |                                           
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.gen_square[5].sq 
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
                                           |                                           
Net: net20628                              |Net: net20628                              
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[61\]. |Net: net18662                              
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_4/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[53\]. |Net: \i_chip_core.core6.b.gen_square[12].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 2  
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[23\]. |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[40\]. |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A4 = 1   |                                           
                                           |                                           
Net: net8552                               |Net: net8552                               
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 2 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.gen_square[46].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: net18653                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.gen_square[38].s 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
Net: net19772                              |Net: net19772                              
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[46\]. |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.gen_square[53].s 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 2   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[33\]. |Net: net18607                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
                                           |                                           
Net: i_chip_core.core0.b.arb_data_out\[1\] |Net: \i_chip_core.core6.b.gen_square[45].s 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_4/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_2/A1 = 1    
                                           |                                           
Net: i_chip_core.core1.b.gen_square\[8\].s |Net: net18631                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
                                           |                                           
Net: net20283                              |Net: net20283                              
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    |                                           
                                           |                                           
Net: net22324                              |Net: net22324                              
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |                                           
Net: net4454                               |Net: net4454                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |                                           
                                           |                                           
Net: net12035                              |Net: net12035                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[52\]. |Net: net18476                              
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 5    |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[49\]. |Net: net15351                              
  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 5    |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__or2_2/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
                                           |                                           
Net: net3013                               |Net: net3013                               
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: i_chip_core.core1.b.arb_data_out\[1\] |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: net13343                              
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__oai22_2/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[23\]. |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
Net: net8317                               |Net: net8317                               
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |                                           
                                           |                                           
Net: net13812                              |Net: net13812                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[44\]. |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: net18593                              
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[5\].s |Net: \i_chip_core.core6.b.gen_square[40].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |                                           
Net: net19191                              |Net: net19191                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: net18612                              
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: net8344                               |Net: net8344                               
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
                                           |                                           
Net: net17605                              |Net: net17605                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |                                           
Net: i_chip_core.core0.b.arb_data_out\[1\] |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[4\].s |Net: \i_chip_core.core6.b.gen_square[44].s 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.gen_square[57].s 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |                                           
Net: net16550                              |Net: net16550                              
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 3 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/B1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/B1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[45\]. |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__and3_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
Net: net17149                              |Net: net17149                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |                                           
Net: net15740                              |Net: net15740                              
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
Net: net18444                              |Net: net18444                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: net5933                               |Net: net5933                               
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |                                           
                                           |                                           
Net: net9914                               |Net: net9914                               
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_4/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_4/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[7\].s |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |                                           
Net: net9749                               |Net: net9749                               
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[1\].s |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[27\]. |Net: net7626                               
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |                                           
Net: i_chip_core.core1.b.gen_square\[32\]. |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
Net: net7296                               |Net: net7296                               
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: net18715                              
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: net6196                               |Net: net6196                               
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.gen_square[37].s 
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[4\].s |Net: \i_chip_core.core6.b.gen_square[23].s 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[9\].s |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[28\]. |Net: \i_chip_core.core6.b.gen_square[23].s 
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[14\]. |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[45\]. |Net: \i_chip_core.core6.b.gen_square[1].sq 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
Net: net6471                               |Net: net6471                               
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
                                           |                                           
Net: net8250                               |Net: net8250                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  |                                           
                                           |                                           
Net: net5063                               |Net: net5063                               
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[21\]. |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 3     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |                                           
Net: net17283                              |Net: net17283                              
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |                                           
Net: net7597                               |Net: net7597                               
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[46\]. |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 3    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[44\]. |Net: \i_chip_core.core6.b.gen_square[24].s 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
Net: net15199                              |Net: net15199                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 5  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 5  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
Net: i_chip_core.core0.b.arb_data_out\[1\] |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
                                           |                                           
Net: i_chip_core.core5.b.arb_data_out\[6\] |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_4/A1 = 1    
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 3   
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_4/A2 = 1    
                                           |                                           
Net: net12335                              |Net: net12335                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 3   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
Net: i_chip_core.core3.b.arb_data_out\[0\] |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and4_2/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |                                           
Net: net18574                              |Net: net18574                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  
                                           |                                           
Net: net19083                              |Net: net19083                              
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[3\].s |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[61\]. |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  
                                           |                                           
Net: net17385                              |Net: net17385                              
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 2 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
                                           |                                           
Net: net6665                               |Net: net6665                               
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
Net: i_chip_core.core6.b.arb_data_out\[1\] |Net: \i_chip_core.core6.b.gen_square[55].s 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai221_2/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor3_4/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__oai22_4/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai31_4/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
Net: net17619                              |Net: net17619                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |                                           
Net: i_chip_core.core6.b.arb_data_out\[0\] |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai33_4/B3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: net18605                              
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: net16318                              |Net: net16318                              
  gf180mcu_fd_sc_mcu9t5v0__aoi221_4/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/ZN = 1   |                                           
                                           |                                           
Net: i_chip_core.core4.b.arb_data_out\[0\] |Net: \i_chip_core.core4.b.gen_square[1].sq 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
                                           |                                           
Net: net8546                               |Net: net8546                               
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |                                           
                                           |                                           
Net: net4845                               |Net: net4845                               
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |                                           
                                           |                                           
Net: net12769                              |Net: net12769                              
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
                                           |                                           
Net: net14756                              |Net: net14756                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_2/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai222_2/C2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_2/C2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
                                           |                                           
Net: net17445                              |Net: net17445                              
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
                                           |                                           
Net: net16598                              |Net: net16598                              
  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
                                           |                                           
Net: net21958                              |Net: net21958                              
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
Net: i_chip_core.core4.b.arb_data_out\[1\] |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
                                           |                                           
Net: i_chip_core.core0.b.arb_data_out\[0\] |Net: \i_chip_core.core6.b.gen_square[55].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 4  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_2/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[45\]. |Net: net18531                              
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core1.b.gen_square\[26\]. |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[7\].s |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[23\]. |Net: \i_chip_core.core6.b.gen_square[57].s 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: net18801                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__and4_2/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[22\]. |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 3    
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: net17913                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
                                           |                                           
Net: net17061                              |Net: net17061                              
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: net18672                              |Net: net18672                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__inv_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__inv_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |                                           
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.gen_square[52].s 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[16\]. |Net: \i_chip_core.core7.b.gen_square[49].s 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |                                           
Net: net12663                              |Net: net12663                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[23\]. |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__inv_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.gen_square[22].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |                                           
Net: net11109                              |Net: net11109                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: net9250                               |Net: net9250                               
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
                                           |                                           
Net: net21963                              |Net: net21963                              
  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
Net: net7515                               |Net: net7515                               
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.gen_square[51].s 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
Net: net10581                              |Net: net10581                              
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[53\]. |Net: net18113                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: net17071                              |Net: net17071                              
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |                                           
Net: net13652                              |Net: net13652                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: net10530                              |Net: net10530                              
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 5 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: net11232                              |Net: net11232                              
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core7.b.arb_data_out\[0\] |Net: net15633                              
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
                                           |                                           
Net: net8704                               |Net: net8704                               
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[29\]. |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[55\]. |Net: \i_chip_core.core7.b.gen_square[17].s 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |                                           
Net: net21174                              |Net: net21174                              
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_4/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_4/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: net17608                              |Net: net17608                              
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
Net: net11215                              |Net: net11215                              
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
                                           |                                           
Net: net16539                              |Net: net16539                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |                                           
Net: i_chip_core.core1.b.arb_data_out\[1\] |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |                                           
Net: i_chip_core.core1.b.arb_data_out\[0\] |Net: \i_chip_core.core7.b.gen_square[13].s 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 5  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[42\]. |Net: \i_chip_core.core7.b.gen_square[13].s 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/B = 1  
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.gen_square[13].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 6  
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |                                           
Net: net17352                              |Net: net17352                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |                                           
Net: net18558                              |Net: net18558                              
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
                                           |                                           
Net: net20703                              |Net: net20703                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[12\]. |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 2    
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 3   |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 3    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
                                           |                                           
Net: net18693                              |Net: net18693                              
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_2/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
                                           |                                           
Net: net4041                               |Net: net4041                               
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/A1 = 1  |                                           
                                           |                                           
Net: net21451                              |Net: net21451                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
                                           |                                           
Net: net8474                               |Net: net8474                               
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 3     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
                                           |                                           
Net: net19708                              |Net: net19708                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
                                           |                                           
Net: net17254                              |Net: net17254                              
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_4/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |                                           
                                           |                                           
Net: net17481                              |Net: net17481                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
                                           |                                           
Net: net18478                              |Net: net18478                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
                                           |                                           
Net: net10842                              |Net: net10842                              
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_2/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
                                           |                                           
Net: net22175                              |Net: net22175                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
                                           |                                           
Net: net16520                              |Net: net16520                              
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
                                           |                                           
Net: i_chip_core.core1.b.gen_square\[43\]. |Net: \i_chip_core.core7.b.gen_square[33].s 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[12\]. |Net: net18108                              
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 3  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
                                           |                                           
Net: net21608                              |Net: net21608                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
                                           |                                           
Net: net19773                              |Net: net19773                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
                                           |                                           
Net: net18582                              |Net: net18582                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |                                           
                                           |                                           
Net: net19223                              |Net: net19223                              
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[8\].s |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |                                           
                                           |                                           
Net: net19292                              |Net: net19292                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 3  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
                                           |                                           
Net: net12969                              |Net: net12969                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 3   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 3   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
                                           |                                           
Net: net2871                               |Net: net2871                               
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 2    |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
                                           |                                           
Net: net17247                              |Net: net17247                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
                                           |                                           
Net: net13557                              |Net: net13557                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[41\]. |Net: \i_chip_core.core7.b.gen_square[41].s 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
                                           |                                           
Net: net19545                              |Net: net19545                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 3  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 2    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  |                                           
                                           |                                           
Net: net17345                              |Net: net17345                              
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.gen_square[44].s 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 4  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 3 |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A2 = 1  |                                           
                                           |                                           
Net: net21287                              |Net: net21287                              
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__inv_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__inv_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__inv_1/ZN = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
                                           |                                           
Net: net21309                              |Net: net21309                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[26\]. |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/ZN = 1 |                                           
                                           |                                           
Net: net11974                              |Net: net11974                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__antenna/I = 1   |  gf180mcu_fd_sc_mcu9t5v0__antenna/I = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__inv_1/ZN = 1    |                                           
                                           |                                           
Net: net20090                              |Net: net20090                              
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
                                           |                                           
Net: net22029                              |Net: net22029                              
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |                                           
                                           |                                           
Net: net16672                              |Net: net16672                              
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
                                           |                                           
Net: net9822                               |Net: net9822                               
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 3     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: net18109                              |Net: net18109                              
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.gen_square[37].s 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
                                           |                                           
Net: net14063                              |Net: net14063                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: net21647                              |Net: net21647                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
                                           |                                           
Net: net15349                              |Net: net15349                              
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
                                           |                                           
Net: net18514                              |Net: net18514                              
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: net16421                              |Net: net16421                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
                                           |                                           
Net: net18576                              |Net: net18576                              
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 1  
                                           |                                           
Net: net13379                              |Net: net13379                              
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
                                           |                                           
Net: net21616                              |Net: net21616                              
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
                                           |                                           
Net: net15482                              |Net: net15482                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 4   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 3   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
                                           |                                           
Net: net14039                              |Net: net14039                              
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  |                                           
                                           |                                           
Net: net20738                              |Net: net20738                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[25\]. |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[9\].s |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
                                           |                                           
Net: net22197                              |Net: net22197                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: net8379                               
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
                                           |                                           
Net: net12481                              |Net: net12481                              
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 3 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
                                           |                                           
Net: net20712                              |Net: net20712                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.gen_square[30].s 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[7\].s |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 3    |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_2/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[34\]. |Net: \i_chip_core.core4.b.gen_square[6].sq 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 3  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[44\]. |Net: \i_chip_core.core5.b.gen_square[8].sq 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
                                           |                                           
Net: net6639                               |Net: net6639                               
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 3 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[15\]. |Net: net15592                              
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[1\].s |Net: \i_chip_core.core7.b.gen_square[16].s 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[6\].s |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 3 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
                                           |                                           
Net: net14814                              |Net: net14814                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: net14811                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
                                           |                                           
Net: i_chip_core.core4.b.arb_data_out\[0\] |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
                                           |                                           
Net: net20308                              |Net: net20308                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |                                           
Net: net18517                              |Net: net18517                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.gen_square[29].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core2.b.arb_data_out\[1\] |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
                                           |                                           
Net: net1479                               |Net: net1479                               
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
                                           |                                           
Net: net18483                              |Net: net18483                              
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |                                           
                                           |                                           
Net: net14011                              |Net: net14011                              
  gf180mcu_fd_sc_mcu9t5v0__buf_3/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_3/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |                                           
                                           |                                           
Net: net15631                              |Net: net15631                              
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
                                           |                                           
Net: net22226                              |Net: net22226                              
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 3  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[40\]. |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
                                           |                                           
Net: net16432                              |Net: net16432                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 6  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 5  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: net12825                              
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[29\]. |Net: net15492                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_4/A1 = 1  |                                           
                                           |                                           
Net: net12606                              |Net: net12606                              
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
Net: net21398                              |Net: net21398                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[16\]. |Net: \i_chip_core.core6.b.arb_data_out[6]_ 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
                                           |                                           
Net: net19117                              |Net: net19117                              
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |                                           
Net: net18657                              |Net: net18657                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
Net: i_chip_core.core0.b.arb_data_out\[0\] |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   |                                           
                                           |                                           
Net: net17258                              |Net: net17258                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: net11294                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[41\]. |Net: \i_chip_core.core7.b.gen_square[11].s 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
                                           |                                           
Net: net11994                              |Net: net11994                              
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
                                           |                                           
Net: i_chip_core.core5.b.arb_data_out\[6\] |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[28\]. |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_4/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_2/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: i_chip_core.core6.b.arb_data_out\[6\] |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A2 = 1 |                                           
                                           |                                           
Net: net5862                               |Net: net5862                               
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_2/A2 = 1    |                                           
                                           |                                           
Net: net19882                              |Net: net19882                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
                                           |                                           
Net: net20162                              |Net: net20162                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 3  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[1\].s |Net: net8682                               
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[3\].s |Net: \i_chip_core.core5.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |                                           
                                           |                                           
Net: net17595                              |Net: net17595                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
                                           |                                           
Net: net6496                               |Net: net6496                               
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[31\]. |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |                                           
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[31\]. |Net: \i_chip_core.core7.b.gen_square[38].s 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
                                           |                                           
Net: i_chip_core.core2.b.arb_data_out\[2\] |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
                                           |                                           
Net: net16692                              |Net: net16692                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[55\]. |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |                                           
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_2/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_2/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[1\].s |Net: \i_chip_core.core0.b.gen_square[23].s 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 3     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.gen_square[8].sq 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
                                           |                                           
Net: net20130                              |Net: net20130                              
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
                                           |                                           
Net: net18829                              |Net: net18829                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: net16773                              |Net: net16773                              
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |                                           
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.arb_data_out\[0\] |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[47\]. |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
                                           |                                           
Net: net7980                               |Net: net7980                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
                                           |                                           
Net: net12016                              |Net: net12016                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 3  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |                                           
                                           |                                           
Net: net13390                              |Net: net13390                              
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
                                           |                                           
Net: net18486                              |Net: net18486                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |                                           
Net: net20435                              |Net: net20435                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
Net: net13669                              |Net: net13669                              
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 6  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[41\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[59\]. |Net: \i_chip_core.core7.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B2 = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/ZN = 1   |                                           
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 2    |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai31_4/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
                                           |                                           
Net: net14832                              |Net: net14832                              
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 2    
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
                                           |                                           
Net: net18123                              |Net: net18123                              
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[34\]. |Net: \i_chip_core.core5.b.gen_square[25].s 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__antenna/I = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
                                           |                                           
Net: net20307                              |Net: net20307                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
Net: net22277                              |Net: net22277                              
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |                                           
Net: net14772                              |Net: net14772                              
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__inv_4/ZN = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A2 = 1  |                                           
                                           |                                           
Net: net15493                              |Net: net15493                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |                                           
                                           |                                           
Net: net18994                              |Net: net18994                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[6\].s |Net: \i_chip_core.core6.b.gen_square[55].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
                                           |                                           
Net: net18012                              |Net: net18012                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[49\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[15\]. |Net: \i_chip_core.core5.b.gen_square[1].sq 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 2    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[37\]. |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 4  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 4   |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |                                           
Net: net10523                              |Net: net10523                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: net12852                              |Net: net12852                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core6.b.arb_data_out\[1\] |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
                                           |                                           
Net: net10868                              |Net: net10868                              
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[32\]. |Net: \i_chip_core.core4.b.gen_square[1].sq 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
                                           |                                           
Net: net19699                              |Net: net19699                              
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.gen_square[6].sq 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: net12636                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 3    |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: net8000                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: net12873                              |Net: net12873                              
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: net12854                              
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
                                           |                                           
Net: net18663                              |Net: net18663                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
                                           |                                           
Net: net18473                              |Net: net18473                              
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[14\]. |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
                                           |                                           
Net: net14737                              |Net: net14737                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core0.b.arb_data_out\[0\] |Net: net12499                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 4  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |                                           
                                           |                                           
Net: net20983                              |Net: net20983                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[29\]. |Net: \i_chip_core.core6.b.gen_square[43].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[56\]. |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_4/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[7\].s |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
                                           |                                           
Net: net22253                              |Net: net22253                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
                                           |                                           
Net: net8452                               |Net: net8452                               
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[4\].s |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
                                           |                                           
Net: net10108                              |Net: net10108                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
                                           |                                           
Net: net18552                              |Net: net18552                              
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: net21729                              |Net: net21729                              
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 4  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_2/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[40\]. |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 2  |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
                                           |                                           
Net: i_chip_core.core2.b.arb_data_out\[1\] |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: net5431                               
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
                                           |                                           
Net: net18805                              |Net: net18805                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
Net: i_chip_core.core4.b.arb_data_out\[0\] |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[36\]. |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
                                           |                                           
Net: net18171                              |Net: net18171                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 5  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 4   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 6  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 15  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 5   |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 2    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 6   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 4    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 8  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__inv_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_4/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_4/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_4/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_4/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_3/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.gen_square[55].s 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 2 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |                                           
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[0\].s |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.arb_data_out[6]_ 
  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: net15703                              
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[57\]. |Net: \i_chip_core.core3.b.gen_square[16].s 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
                                           |                                           
Net: i_chip_core.core4.b.arb_data_out\[0\] |Net: net14168                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_4/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
                                           |                                           
Net: net18515                              |Net: net18515                              
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |                                           
Net: net12482                              |Net: net12482                              
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
                                           |                                           
Net: net9539                               |Net: net9539                               
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
                                           |                                           
Net: i_chip_core.core2.b.arb_data_out\[0\] |Net: net12521                              
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 3 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |                                           
                                           |                                           
Net: net18152                              |Net: net18152                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.gen_square[1].sq 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[23\]. |Net: net7560                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
                                           |                                           
Net: net17150                              |Net: net17150                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |                                           
Net: net16082                              |Net: net16082                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
                                           |                                           
Net: net13142                              |Net: net13142                              
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
                                           |                                           
Net: net18445                              |Net: net18445                              
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[26\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[31\]. |Net: net12962                              
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |                                           
                                           |                                           
Net: net22090                              |Net: net22090                              
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |                                           
Net: net6949                               |Net: net6949                               
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
                                           |                                           
Net: i_chip_core.core6.b.arb_data_out\[6\] |Net: net14430                              
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[7\].s |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |                                           
                                           |                                           
Net: net16543                              |Net: net16543                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[33\]. |Net: \i_chip_core.core6.b.gen_square[46].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A4 = 1   |                                           
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 5     |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |                                           
Net: net12325                              |Net: net12325                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core1.b.arb_data_out\[0\] |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |                                           
                                           |                                           
Net: net14706                              |Net: net14706                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
                                           |                                           
Net: net18127                              |Net: net18127                              
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: net16059                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: net16728                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.gen_square[57].s 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core0.b.arb_data_out\[1\] |Net: net15586                              
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
                                           |                                           
Net: net14593                              |Net: net14593                              
  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 3  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |                                           
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[24\]. |Net: \i_chip_core.core3.b.gen_square[27].s 
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
                                           |                                           
Net: net22315                              |Net: net22315                              
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[60\]. |Net: net14571                              
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 2  |                                           
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.gen_square[29].s 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[4\].s |Net: \i_chip_core.core6.b.gen_square[29].s 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
                                           |                                           
Net: net17359                              |Net: net17359                              
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |                                           
Net: net8489                               |Net: net8489                               
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
                                           |                                           
Net: net14277                              |Net: net14277                              
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.gen_square[30].s 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: net17151                              |Net: net17151                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
                                           |                                           
Net: net8362                               |Net: net8362                               
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
Net: i_chip_core.core4.b.arb_data_out\[1\] |Net: \i_chip_core.core6.b.gen_square[46].s 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
                                           |                                           
Net: net9242                               |Net: net9242                               
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
                                           |                                           
Net: net10473                              |Net: net10473                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C1 = 1 |                                           
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[9\].s |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |                                           
                                           |                                           
Net: net11822                              |Net: net11822                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.gen_square[8].sq 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_4/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
                                           |                                           
Net: net4415                               |Net: net4415                               
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: net12178                              
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[41\]. |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    |                                           
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
                                           |                                           
Net: net5639                               |Net: net5639                               
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[33\]. |Net: \i_chip_core.core4.b.gen_square[7].sq 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
                                           |                                           
Net: net16780                              |Net: net16780                              
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
Net: net3247                               |Net: net3247                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__inv_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
                                           |                                           
Net: net12503                              |Net: net12503                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[49\]. |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: net16294                              
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.gen_square[40].s 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
                                           |                                           
Net: net18461                              |Net: net18461                              
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[37\]. |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
                                           |                                           
Net: net14073                              |Net: net14073                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[3\].s |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: net21090                              |Net: net21090                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A3 = 1  |                                           
                                           |                                           
Net: i_chip_core.core4.b.arb_data_out\[0\] |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
                                           |                                           
Net: net17221                              |Net: net17221                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.gen_square[61].s 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 2    
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 2    
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
                                           |                                           
Net: net15739                              |Net: net15739                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
                                           |                                           
Net: net20041                              |Net: net20041                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[23\]. |Net: \i_chip_core.core2.b.gen_square[3].sq 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  |                                           
                                           |                                           
Net: net6684                               |Net: net6684                               
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |                                           
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: net16411                              
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[33\]. |Net: net13964                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 2  |                                           
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[15\]. |Net: \i_chip_core.core5.b.gen_square[59].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
                                           |                                           
Net: net22779                              |Net: net22779                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_12/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__buf_12/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[25\]. |Net: net4826                               
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core1.b.gen_square\[59\]. |Net: net11131                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
                                           |                                           
Net: net20437                              |Net: net20437                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
Net: net10307                              |Net: net10307                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
                                           |                                           
Net: net19198                              |Net: net19198                              
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[60\]. |Net: \i_chip_core.core4.b.gen_square[6].sq 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
                                           |                                           
Net: net16929                              |Net: net16929                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
                                           |                                           
Net: net13766                              |Net: net13766                              
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[4\].s |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
                                           |                                           
Net: net11456                              |Net: net11456                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
                                           |                                           
Net: net17369                              |Net: net17369                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
                                           |                                           
Net: net9591                               |Net: net9591                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[49\]. |Net: net16525                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A1 = 1   |                                           
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[6\].s |Net: \i_chip_core.core6.b.gen_square[37].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
                                           |                                           
Net: i_chip_core.core2.b.arb_data_out\[0\] |Net: \i_chip_core.core4.b.gen_square[29].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
                                           |                                           
Net: net15136                              |Net: net15136                              
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: net11812                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |                                           
                                           |                                           
Net: net15014                              |Net: net15014                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[33\]. |Net: \i_chip_core.core5.b.gen_square[3].sq 
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 2   |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.gen_square[31].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |                                           
                                           |                                           
Net: i_chip_core.core5.b.arb_data_out\[0\] |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[40\]. |Net: net11376                              
  gf180mcu_fd_sc_mcu9t5v0__or2_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
                                           |                                           
Net: net716                                |Net: net716                                
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.gen_square[16].s 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    |                                           
                                           |                                           
Net: net20636                              |Net: net20636                              
  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
                                           |                                           
Net: net20275                              |Net: net20275                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[37\]. |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_2/A4 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[45\]. |Net: net16058                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
                                           |                                           
Net: net17557                              |Net: net17557                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |                                           
Net: net9761                               |Net: net9761                               
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[23\]. |Net: net16451                              
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
                                           |                                           
Net: net21959                              |Net: net21959                              
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[48\]. |Net: \i_chip_core.core4.b.gen_square[6].sq 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 2   |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[55\]. |Net: \i_chip_core.core5.b.gen_square[8].sq 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__inv_1/ZN = 1    |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
                                           |                                           
Net: net1970                               |Net: net1970                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.gen_square[33].s 
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: net14273                              |Net: net14273                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
                                           |                                           
Net: net16721                              |Net: net16721                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_4/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_4/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
Net: net9070                               |Net: net9070                               
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
                                           |                                           
Net: net16826                              |Net: net16826                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor4_4/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_4/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: net16426                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 2 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
                                           |                                           
Net: net9554                               |Net: net9554                               
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    |                                           
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: net13896                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core4.b.arb_data_out\[0\] |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
                                           |                                           
Net: net10798                              |Net: net10798                              
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 4 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 4 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 4 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[6\].s |Net: net15898                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__antenna/I = 1   |                                           
                                           |                                           
Net: net17456                              |Net: net17456                              
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_4/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_4/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |                                           
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.gen_square[23].s 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
                                           |                                           
Net: net15735                              |Net: net15735                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
                                           |                                           
Net: net9037                               |Net: net9037                               
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: net14214                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[37\]. |Net: \i_chip_core.core2.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
                                           |                                           
Net: net17389                              |Net: net17389                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[1\].s |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
                                           |                                           
Net: net17309                              |Net: net17309                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 2    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
                                           |                                           
Net: net9728                               |Net: net9728                               
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.gen_square[59].s 
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[1\].s |Net: net14443                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 |                                           
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.gen_square[35].s 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
                                           |                                           
Net: net5670                               |Net: net5670                               
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |                                           
                                           |                                           
Net: net17266                              |Net: net17266                              
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
                                           |                                           
Net: net19645                              |Net: net19645                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.gen_square[12].s 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[2\].s |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
                                           |                                           
Net: net5392                               |Net: net5392                               
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |                                           
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_8/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[60\]. |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 4     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
                                           |                                           
Net: net16840                              |Net: net16840                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
                                           |                                           
Net: net18741                              |Net: net18741                              
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    |                                           
                                           |                                           
Net: net10744                              |Net: net10744                              
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
                                           |                                           
Net: net15912                              |Net: net15912                              
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 |                                           
                                           |                                           
Net: i_chip_core.core6.b.arb_data_out\[1\] |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 3   |  gf180mcu_fd_sc_mcu9t5v0__buf_3/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
                                           |                                           
Net: net17172                              |Net: net17172                              
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: net16972                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai32_2/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_2/Z = 1     |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[43\]. |Net: net16061                              
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
                                           |                                           
Net: net14939                              |Net: net14939                              
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 4 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 4 
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 |                                           
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[7\].s |Net: net17548                              
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     |                                           
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.gen_square[52].s 
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[52\]. |Net: \i_chip_core.core2.b.gen_square[30].s 
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
                                           |                                           
Net: net9911                               |Net: net9911                               
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_2/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/A1 = 1  |                                           
                                           |                                           
Net: net20097                              |Net: net20097                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  |                                           
                                           |                                           
Net: net20646                              |Net: net20646                              
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |                                           
Net: net18656                              |Net: net18656                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
                                           |                                           
Net: net17832                              |Net: net17832                              
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 3  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 3   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
                                           |                                           
Net: i_chip_core.core1.b.gen_square\[26\]. |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
                                           |                                           
Net: i_chip_core.core1.b.gen_square\[27\]. |Net: net13579                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[6\].s |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
                                           |                                           
Net: net6154                               |Net: net6154                               
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    |                                           
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[44\]. |Net: net15071                              
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 3     |                                           
                                           |                                           
Net: net8156                               |Net: net8156                               
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |                                           
                                           |                                           
Net: net9694                               |Net: net9694                               
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_4/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     |                                           
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[31\]. |Net: net13369                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
                                           |                                           
Net: net16881                              |Net: net16881                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[19\]. |Net: \i_chip_core.core0.b.gen_square[10].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[9\].s |Net: \i_chip_core.core0.b.gen_square[10].s 
  gf180mcu_fd_sc_mcu9t5v0__oai211_4/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
                                           |                                           
Net: net21408                              |Net: net21408                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[36\]. |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
                                           |                                           
Net: net22278                              |Net: net22278                              
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |                                           
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[56\]. |Net: net11347                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
                                           |                                           
Net: net14285                              |Net: net14285                              
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 3 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 4 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
                                           |                                           
Net: net19321                              |Net: net19321                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A3 = 1  
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[32\]. |Net: net13534                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_4/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
                                           |                                           
Net: net12671                              |Net: net12671                              
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
                                           |                                           
Net: net11377                              |Net: net11377                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    |                                           
                                           |                                           
Net: net9730                               |Net: net9730                               
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
                                           |                                           
Net: net20778                              |Net: net20778                              
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
Net: net15589                              |Net: net15589                              
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
                                           |                                           
Net: net10505                              |Net: net10505                              
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.gen_square[23].s 
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
                                           |                                           
Net: net15961                              |Net: net15961                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
                                           |                                           
Net: net19240                              |Net: net19240                              
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[0\].s |Net: \i_chip_core.core0.b.gen_square[29].s 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__and4_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |                                           
                                           |                                           
Net: net6432                               |Net: net6432                               
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[48\]. |Net: \i_chip_core.core0.b.gen_square[29].s 
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
                                           |                                           
Net: net8427                               |Net: net8427                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[8\].s |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: net16770                              |Net: net16770                              
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 3     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  |                                           
                                           |                                           
Net: net5814                               |Net: net5814                               
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[28\]. |Net: \i_chip_core.core0.b.gen_square[30].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 2   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |                                           
                                           |                                           
Net: net5802                               |Net: net5802                               
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 2  |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.gen_square[33].s 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 2   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
                                           |                                           
Net: net13037                              |Net: net13037                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[22\]. |Net: net14910                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  |                                           
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[28\]. |Net: \i_chip_core.core0.b.gen_square[3].sq 
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |                                           
                                           |                                           
Net: net8808                               |Net: net8808                               
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
                                           |                                           
Net: net11426                              |Net: net11426                              
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
                                           |                                           
Net: net9171                               |Net: net9171                               
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[0\].s |Net: net15269                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
                                           |                                           
Net: net2068                               |Net: net2068                               
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
                                           |                                           
Net: net925                                |Net: net925                                
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[12\]. |Net: net11297                              
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[21\]. |Net: \i_chip_core.core0.b.gen_square[4].sq 
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 2    |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core2.b.arb_data_out\[1\] |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
                                           |                                           
Net: net13346                              |Net: net13346                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.gen_square[59].s 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
                                           |                                           
Net: net14912                              |Net: net14912                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
                                           |                                           
Net: net19799                              |Net: net19799                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[43\]. |Net: net15984                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
                                           |                                           
Net: net5727                               |Net: net5727                               
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.gen_square[59].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai22_2/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: net16936                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[13\]. |Net: net16610                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: i_chip_core.core0.b.arb_data_out\[1\] |Net: net16399                              
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: net16163                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.gen_square[5].sq 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
Net: net11166                              |Net: net11166                              
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |                                           
Net: net10432                              |Net: net10432                              
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[16\]. |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[8\].s |Net: \i_chip_core.core0.b.gen_square[5].sq 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.gen_square[6].sq 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 2  
                                           |                                           
Net: net6481                               |Net: net6481                               
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
Net: net17064                              |Net: net17064                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[12\]. |Net: net11472                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
Net: i_chip_core.core1.b.gen_square\[62\]. |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
Net: net15282                              |Net: net15282                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_4/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[28\]. |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
Net: i_chip_core.core3.b.arb_data_out\[0\] |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[37\]. |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: net16912                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[13\]. |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[8\].s |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[40\]. |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[12\]. |Net: net9179                               
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/ZN = 1 
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[29\]. |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
Net: i_chip_core.core3.b.arb_data_out\[0\] |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
                                           |                                           
Net: net12037                              |Net: net12037                              
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
Net: net17513                              |Net: net17513                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |                                           
Net: i_chip_core.core0.b.arb_data_out\[1\] |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[55\]. |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 3  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
Net: i_chip_core.core2.b.arb_data_out\[6\] |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
Net: i_chip_core.core7.b.arb_data_out\[1\] |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[45\]. |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
Net: net8915                               |Net: net8915                               
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |                                           
Net: net14052                              |Net: net14052                              
  gf180mcu_fd_sc_mcu9t5v0__oai32_2/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.gen_square[26].s 
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
Net: i_chip_core.core6.b.arb_data_out\[1\] |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[28\]. |Net: net16878                              
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[25\]. |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[23\]. |Net: net13282                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.gen_square[55].s 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: net13250                              
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__and4_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
Net: i_chip_core.core3.b.arb_data_out\[1\] |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[44\]. |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[60\]. |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[20\]. |Net: \i_chip_core.core1.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |                                           
Net: net14331                              |Net: net14331                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_4/A2 = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
Net: net6428                               |Net: net6428                               
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.gen_square[55].s 
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: net16866                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
Net: i_chip_core.core1.b.gen_square\[26\]. |Net: \i_chip_core.core1.b.gen_square[26].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_2/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 2  
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[9\].s |Net: \i_chip_core.core1.b.gen_square[26].s 
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
Net: net8366                               |Net: net8366                               
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.gen_square[27].s 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |                                           
Net: net14932                              |Net: net14932                              
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
Net: net14428                              |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: net15287                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: net16555                              
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[43\]. |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[12\]. |Net: \i_chip_core.core1.b.gen_square[3].sq 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |                                           
Net: i_chip_core.core4.b.arb_data_out\[1\] |Net: net14795                              
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[8\].s |Net: \i_chip_core.core1.b.gen_square[50].s 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: net11038                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[57\]. |Net: \i_chip_core.core1.b.gen_square[59].s 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.gen_square[62].s 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: net12752                              |Net: net12752                              
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[37\]. |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[21\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[12\]. |Net: net13287                              
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[13\]. |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A3 = 2  
                                           |                                           
Net: net16129                              |Net: net16129                              
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |                                           
Net: i_chip_core.core1.b.gen_square\[59\]. |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
                                           |                                           
Net: i_chip_core.core3.b.arb_data_out\[0\] |Net: net14770                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[59\]. |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: net15208                              |Net: net15208                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
Net: net14244                              |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
Net: net15736                              |Net: net15736                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: net13043                              
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: net8966                               |Net: net8966                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |                                           
Net: i_chip_core.core1.b.gen_square\[27\]. |Net: \i_chip_core.core7.b.gen_square[16].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: net11674                              |Net: net11674                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[5\].s |Net: \i_chip_core.core0.b.gen_square[33].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[55\]. |Net: net14780                              
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: i_chip_core.core4.b.arb_data_out\[0\] |Net: net16752                              
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
Net: net8198                               |Net: net8198                               
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[23\]. |Net: \i_chip_core.core2.b.gen_square[11].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
Net: net17563                              |Net: net17563                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |                                           
Net: i_chip_core.core3.b.arb_data_out\[0\] |Net: \i_chip_core.core2.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[55\]. |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__and4_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
Net: net14126                              |Net: net14126                              
  gf180mcu_fd_sc_mcu9t5v0__dlyb_2/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyb_2/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
Net: net15360                              |Net: net15360                              
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
                                           |                                           
Net: i_chip_core.core2.b.arb_data_out\[1\] |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
Net: net12531                              |Net: net12531                              
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 3 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: net4797                               |Net: net4797                               
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[13\]. |Net: net14635                              
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
Net: net15531                              |Net: net15531                              
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
Net: i_chip_core.core6.b.arb_data_out\[1\] |Net: \i_chip_core.core2.b.gen_square[11].s 
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: net14591                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[7\].s |Net: \i_chip_core.core2.b.gen_square[11].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.gen_square[21].s 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
Net: net8695                               |Net: net8695                               
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[62\]. |Net: \i_chip_core.core2.b.gen_square[30].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
Net: net6383                               |Net: net6383                               
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai32_2/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
Net: net12665                              |Net: net12665                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.gen_square[2].sq 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: net10733                              
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
Net: net15751                              |Net: net15751                              
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: net15600                              |Net: net15600                              
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai211_4/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.gen_square[30].s 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
Net: net3254                               |Net: net3254                               
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: net16712                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: i_chip_core.core6.b.arb_data_out\[0\] |Net: net12945                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
Net: net12203                              |Net: net12203                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlyc_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyc_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[4\].s |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: net14540                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[30\]. |Net: \i_chip_core.core2.b.gen_square[34].s 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__and4_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
Net: net13915                              |Net: net13915                              
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai32_4/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_4/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/A3 = 1  
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[38\]. |Net: \i_chip_core.core2.b.gen_square[34].s 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.gen_square[34].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.gen_square[40].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: net13944                              |Net: net13944                              
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_12/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__buf_12/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai33_4/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B1 = 1  
                                           |                                           
Net: net12528                              |Net: net12528                              
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
Net: net8168                               |Net: net8168                               
  gf180mcu_fd_sc_mcu9t5v0__dlyc_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
                                           |                                           
Net: i_chip_core.core5.b.arb_data_out\[0\] |Net: \i_chip_core.core2.b.gen_square[3].sq 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/C = 1  
                                           |                                           
Net: net1797                               |Net: net1797                               
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[2\].s |Net: net14670                              
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: net14592                              |Net: net14592                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
                                           |                                           
Net: i_chip_core.core2.b.arb_data_out\[1\] |Net: \i_chip_core.core2.b.gen_square[43].s 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[5\].s |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_3/I = 1     
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: net10732                              
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[56\]. |Net: \i_chip_core.core4.b.gen_square[62].s 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
                                           |                                           
Net: i_chip_core.core3.b.arb_data_out\[0\] |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[59\]. |Net: \i_chip_core.core2.b.gen_square[4].sq 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[56\]. |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: net3287                               |Net: net3287                               
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: net19415                              
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: net14240                              |Net: net14240                              
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[59\]. |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[45\]. |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
Net: net988                                |Net: net988                                
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
Net: net12638                              |Net: net12638                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: net16694                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
Net: net15281                              |Net: net15281                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_4/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B1 = 1  
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: net12783                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 2    
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
                                           |                                           
Net: net10270                              |Net: net10270                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A2 = 1  
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[4\].s |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
                                           |                                           
Net: net8239                               |Net: net8239                               
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[29\]. |Net: net10753                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
Net: net12943                              |Net: net12943                              
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.gen_square[49].s 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[56\]. |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
Net: i_chip_core.core2.b.arb_data_out\[0\] |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  nfet_05v0/(1|3) = 1                      
                                           |  pfet_05v0/(1|3) = 1                      
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: net14488                              |Net: net14488                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai32_2/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
                                           |                                           
Net: net14246                              |Net: net14246                              
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[21\]. |Net: net10618                              
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
                                           |                                           
Net: net15038                              |Net: net15038                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: net8333                               
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: net11346                              |Net: net11346                              
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[31\]. |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: net8398                               
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
Net: net14032                              |Net: net14032                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |                                           
Net: net14906                              |Net: net14906                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[6\].s |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: net8451                               
  gf180mcu_fd_sc_mcu9t5v0__nor4_4/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
Net: i_chip_core.core1.b.arb_data_out\[1\] |Net: net14438                              
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[3\].s |Net: \i_chip_core.core1.b.gen_square[55].s 
  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__and2_2/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai33_4/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
Net: i_chip_core.core0.b.arb_data_out\[1\] |Net: \i_chip_core.core3.b.gen_square[29].s 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
Net: net7590                               |Net: net7590                               
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 2 
                                           |                                           
Net: net17227                              |Net: net17227                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
Net: net12628                              |Net: net12628                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
Net: i_chip_core.core6.b.arb_data_out\[1\] |Net: \i_chip_core.core3.b.gen_square[9].sq 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[9\].s |Net: \i_chip_core.core3.b.gen_square[9].sq 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: net12753                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.gen_square[29].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A2 = 1 
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[1\].s |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |                                           
Net: net15603                              |Net: net15603                              
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[27\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |                                           
Net: net15602                              |Net: net15602                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
Net: i_chip_core.core7.b.arb_data_out\[0\] |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[19\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[11\]. |Net: \i_chip_core.core3.b.gen_square[33].s 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[62\]. |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: net15988                              |Net: net15988                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[7\].s |Net: \i_chip_core.core3.b.gen_square[13].s 
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.gen_square[13].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.gen_square[46].s 
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[48\]. |Net: \i_chip_core.core3.b.gen_square[13].s 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 |                                           
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 3   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.gen_square[13].s 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__and3_2/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[55\]. |Net: net15596                              
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 3 |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_2/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.gen_square[1].sq 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[29\]. |Net: \i_chip_core.core3.b.gen_square[25].s 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 2    |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: net21929                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__and2_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_4/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__inv_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[59\]. |Net: \i_chip_core.core7.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
                                           |                                           
Net: i_chip_core.core5.b.arb_data_out\[0\] |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
                                           |                                           
Net: i_chip_core.core7.b.arb_data_out\[1\] |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |                                           
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.gen_square[29].s 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: net14402                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_4/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__and2_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
                                           |                                           
Net: net8904                               |Net: net8904                               
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
                                           |                                           
Net: net15217                              |Net: net15217                              
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[63\]. |Net: net14406                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
                                           |                                           
Net: net12926                              |Net: net12926                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |                                           
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: net12758                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
                                           |                                           
Net: net17396                              |Net: net17396                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |                                           
Net: net12669                              |Net: net12669                              
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 2  |                                           
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[45\]. |Net: \i_chip_core.core6.b.gen_square[55].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or4_2/A3 = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
                                           |                                           
Net: net8637                               |Net: net8637                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: net19947                              |Net: net19947                              
  gf180mcu_fd_sc_mcu9t5v0__antenna/I = 1   |  gf180mcu_fd_sc_mcu9t5v0__antenna/I = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
                                           |                                           
Net: net1359                               |Net: net1359                               
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: net20429                              |Net: net20429                              
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |                                           
Net: i_chip_core.core4.b.arb_data_out\[0\] |Net: net10549                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_4/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    |                                           
                                           |                                           
Net: i_chip_core.core6.b.arb_data_out\[0\] |Net: net20516                              
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[42\]. |Net: \i_chip_core.core3.b.gen_square[44].s 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.gen_square[45].s 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_2/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B3 = 1  |                                           
                                           |                                           
Net: net16744                              |Net: net16744                              
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_2/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[3\].s |Net: net16141                              
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 3     |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
Net: net14487                              |Net: net14487                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 4  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: net17502                              |Net: net17502                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |                                           
Net: i_chip_core.core1.b.gen_square\[60\]. |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: net6367                               |Net: net6367                               
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
                                           |                                           
Net: net9323                               |Net: net9323                               
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: i_chip_core.core6.b.arb_data_out\[0\] |Net: net12587                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
                                           |                                           
Net: i_chip_core.core0.b.arb_data_out\[0\] |Net: \i_chip_core.core3.b.gen_square[9].sq 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: net15587                              
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
Net: net2394                               |Net: net2394                               
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[46\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__or4_2/A3 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
                                           |                                           
Net: net16197                              |Net: net16197                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  |                                           
                                           |                                           
Net: net15696                              |Net: net15696                              
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
                                           |                                           
Net: i_chip_core.core6.b.arb_data_out\[0\] |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai33_4/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[16\]. |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
                                           |                                           
Net: net17135                              |Net: net17135                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[11\]. |Net: net12657                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
Net: net17116                              |Net: net17116                              
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_4/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_4/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A3 = 1   
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[44\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__or4_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
Net: net16253                              |Net: net16253                              
  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A2 = 1  
                                           |                                           
Net: net16908                              |Net: net16908                              
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[33\]. |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
                                           |                                           
Net: i_chip_core.core4.b.arb_data_out\[2\] |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: net15624                              
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[55\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[33\]. |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[2\].s |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[47\]. |Net: net16564                              
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__antenna/I = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[46\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |                                           
                                           |                                           
Net: net16050                              |Net: net16050                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 5  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[1\].s |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_4/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[1\].s |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 |                                           
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[34\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: net14564                              |Net: net14564                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai32_2/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: net16073                              |Net: net16073                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[31\]. |Net: net14536                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |                                           
                                           |                                           
Net: net14776                              |Net: net14776                              
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 3  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
                                           |                                           
Net: net8103                               |Net: net8103                               
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 3 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |                                           
Net: net8334                               |Net: net8334                               
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 4 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
Net: net10508                              |Net: net10508                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
                                           |                                           
Net: i_chip_core.core2.b.arb_data_out\[1\] |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[56\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_12/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 1   |                                           
                                           |                                           
Net: net10750                              |Net: net10750                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
                                           |                                           
Net: net4556                               |Net: net4556                               
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[13\]. |Net: net12647                              
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_3/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.gen_square[12].s 
  gf180mcu_fd_sc_mcu9t5v0__or4_2/A4 = 2    |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[12\]. |Net: net13755                              
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
                                           |                                           
Net: i_chip_core.core2.b.arb_data_out\[1\] |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
                                           |                                           
Net: i_chip_core.core2.b.arb_data_out\[0\] |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
                                           |                                           
Net: net14248                              |Net: net14248                              
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
                                           |                                           
Net: i_chip_core.core1.b.arb_data_out\[0\] |Net: net12634                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |                                           
                                           |                                           
Net: i_chip_core.core0.b.arb_data_out\[0\] |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__and2_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/I = 1  
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: net10616                              
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: net12537                              |Net: net12537                              
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |                                           
                                           |                                           
Net: net16855                              |Net: net16855                              
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |                                           
Net: net15336                              |Net: net15336                              
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[29\]. |Net: net10514                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[34\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor3_4/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_4/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: net4848                               
  gf180mcu_fd_sc_mcu9t5v0__oai211_4/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[31\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: net10509                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
Net: net10559                              |Net: net10559                              
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[42\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |                                           
                                           |                                           
Net: net12640                              |Net: net12640                              
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |                                           
                                           |                                           
Net: net8510                               |Net: net8510                               
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     |                                           
                                           |                                           
Net: net10936                              |Net: net10936                              
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/B1 = 1 
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/B = 1  |                                           
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: net20515                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_4/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
                                           |                                           
Net: net987                                |Net: net987                                
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
                                           |                                           
Net: i_chip_core.core4.b.arb_data_out\[0\] |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 3     |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[38\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_2/A3 = 1   |                                           
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[58\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
                                           |                                           
Net: net10743                              |Net: net10743                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[55\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
                                           |                                           
Net: i_chip_core.core2.b.arb_data_out\[0\] |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
Net: net16394                              |Net: net16394                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.gen_square[31].s 
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
                                           |                                           
Net: net16549                              |Net: net16549                              
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[38\]. |Net: net1471                               
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
                                           |                                           
Net: net11222                              |Net: net11222                              
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: i_chip_core.core1.b.gen_square\[12\]. |Net: net12579                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi22_4/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[9\].s |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[21\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: net15569                              
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
                                           |                                           
Net: net16150                              |Net: net16150                              
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[31\]. |Net: net12560                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
Net: net8955                               |Net: net8955                               
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[30\]. |Net: net12559                              
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__dlyc_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
                                           |                                           
Net: net15010                              |Net: net15010                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
                                           |                                           
Net: net14373                              |Net: net14373                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
                                           |                                           
Net: net14249                              |Net: net14249                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[27\]. |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: net15494                              
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai221_2/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
Net: i_chip_core.core4.b.arb_data_out\[0\] |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.gen_square[1].sq 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: net8141                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
Net: net22406                              |Net: net22406                              
  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__inv_3/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__inv_3/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_4/A3 = 1   
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[16\]. |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: i_chip_core.core7.b.arb_data_out\[1\] |Net: net14316                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 |                                           
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[45\]. |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[7\].s |Net: net12551                              
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: net12549                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[25\]. |Net: net12548                              
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
                                           |                                           
Net: net11187                              |Net: net11187                              
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
Net: i_chip_core.core3.b.arb_data_out\[1\] |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |                                           
                                           |                                           
Net: i_chip_core.core6.b.arb_data_out\[1\] |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
                                           |                                           
Net: net4649                               |Net: net4649                               
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai22_2/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_2/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[43\]. |Net: net12493                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
Net: net17187                              |Net: net17187                              
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |                                           
Net: net9986                               |Net: net9986                               
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 23    |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 4  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 60  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 11 |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 40  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 40 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 22  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 12 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 10 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 15 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 50  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 7  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 56 |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 8   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 20 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_4/A3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 28   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 8  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 33 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 15 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 72 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 20    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 9   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 26    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 5 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 6 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 8   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 9   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 10  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 8   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 10 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 12   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 4     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/ZN = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 25    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 33    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 10 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 20 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 6 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 16 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 14 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 8  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 12 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 6 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 4 |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 5    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 15 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 8 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 6 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 17  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 15 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 15 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 11 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 24 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 22    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 11 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 10  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 6   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_4/B1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 9   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 12  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 9  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 9  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 8  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 29  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 12 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 4 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 4 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_2/A1 = 3    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_2/A3 = 3    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_2/Z = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 8  |                                           
  gf180mcu_fd_sc_mcu9t5v0__inv_2/ZN = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 3    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 5    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 4    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_4/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 10 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 21  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 10   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 4    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 11  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 4    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 9  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 5   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_4/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 5   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_4/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 9  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 13  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 8    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_4/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_2/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_2/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_2/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_2/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 3    |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 3    |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 4    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_4/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 3    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_2/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_4/B3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_2/A4 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_4/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyc_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_2/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_2/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_8/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_2/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_4/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_2/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    |                                           
                                           |                                           
Net: net7657                               |Net: net7657                               
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 12  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 8  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 6     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 4     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 8   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 5   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
                                           |                                           
Net: net9854                               |Net: net9854                               
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
                                           |                                           
Net: net20196                              |Net: net20196                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 3 |                                           
                                           |                                           
Net: net12384                              |Net: net12384                              
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
                                           |                                           
Net: net13181                              |Net: net13181                              
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 3 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |                                           
                                           |                                           
Net: net9116                               |Net: net9116                               
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   |                                           
                                           |                                           
Net: net12498                              |Net: net12498                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[54\]. |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: net12416                              
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
                                           |                                           
Net: net9259                               |Net: net9259                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: net16454                              
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 2   |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
                                           |                                           
Net: net19815                              |Net: net19815                              
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  |                                           
                                           |                                           
Net: net20425                              |Net: net20425                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[46\]. |Net: \i_chip_core.core4.b.gen_square[56].s 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[52\]. |Net: \i_chip_core.core4.b.gen_square[19].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 3 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 3     |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
                                           |                                           
Net: net8482                               |Net: net8482                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_2/A3 = 1    |                                           
                                           |                                           
Net: i_chip_core.core6.b.arb_data_out\[1\] |Net: net14357                              
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 |                                           
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[37\]. |Net: net15491                              
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 3   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
                                           |                                           
Net: net21438                              |Net: net21438                              
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
                                           |                                           
Net: net13331                              |Net: net13331                              
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
                                           |                                           
Net: net17829                              |Net: net17829                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
                                           |                                           
Net: net15655                              |Net: net15655                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/Z = 1     |                                           
                                           |                                           
Net: net18564                              |Net: net18564                              
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_4/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_4/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[23\]. |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_4/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
                                           |                                           
Net: net17443                              |Net: net17443                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
                                           |                                           
Net: net12540                              |Net: net12540                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
                                           |                                           
Net: net21267                              |Net: net21267                              
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[37\]. |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_2/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[31\]. |Net: net10316                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
                                           |                                           
Net: net17611                              |Net: net17611                              
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: net8745                               |Net: net8745                               
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
Net: net20877                              |Net: net20877                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
                                           |                                           
Net: net8872                               |Net: net8872                               
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: net10448                              
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |                                           
                                           |                                           
Net: net7946                               |Net: net7946                               
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
                                           |                                           
Net: net14160                              |Net: net14160                              
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 2 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
                                           |                                           
Net: net16887                              |Net: net16887                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[37\]. |Net: \i_chip_core.core4.b.gen_square[6].sq 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core6.b.arb_data_out\[0\] |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |                                           
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.gen_square[48].s 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
                                           |                                           
Net: net19235                              |Net: net19235                              
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
                                           |                                           
Net: net17379                              |Net: net17379                              
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |                                           
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: net6234                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
                                           |                                           
Net: net13018                              |Net: net13018                              
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
                                           |                                           
Net: net20873                              |Net: net20873                              
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
                                           |                                           
Net: net14774                              |Net: net14774                              
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
                                           |                                           
Net: net8047                               |Net: net8047                               
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[16\]. |Net: net10390                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
                                           |                                           
Net: net15337                              |Net: net15337                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_4/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
                                           |                                           
Net: net19810                              |Net: net19810                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__antenna/I = 1   |  gf180mcu_fd_sc_mcu9t5v0__antenna/I = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
                                           |                                           
Net: net12201                              |Net: net12201                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
                                           |                                           
Net: net10682                              |Net: net10682                              
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
                                           |                                           
Net: net16724                              |Net: net16724                              
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: net19177                              |Net: net19177                              
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |                                           
                                           |                                           
Net: net20933                              |Net: net20933                              
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
                                           |                                           
Net: net18198                              |Net: net18198                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_3/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
                                           |                                           
Net: net20229                              |Net: net20229                              
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[15\]. |Net: \i_chip_core.core2.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 3   |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
                                           |                                           
Net: net19093                              |Net: net19093                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
                                           |                                           
Net: net17880                              |Net: net17880                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
                                           |                                           
Net: net17143                              |Net: net17143                              
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_4/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
                                           |                                           
Net: net11794                              |Net: net11794                              
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
                                           |                                           
Net: net18758                              |Net: net18758                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
                                           |                                           
Net: i_chip_core.core1.b.gen_square\[40\]. |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
                                           |                                           
Net: net22209                              |Net: net22209                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_2/Z = 1    |                                           
                                           |                                           
Net: net18482                              |Net: net18482                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__inv_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__inv_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |                                           
                                           |                                           
Net: net18648                              |Net: net18648                              
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[1\].s |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
                                           |                                           
Net: net20244                              |Net: net20244                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
                                           |                                           
Net: net8054                               |Net: net8054                               
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai22_2/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_2/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 3  |                                           
                                           |                                           
Net: i_chip_core.core2.b.arb_data_out\[6\] |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/ZN = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
                                           |                                           
Net: net15580                              |Net: net15580                              
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 4 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 4 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
                                           |                                           
Net: net19769                              |Net: net19769                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  |                                           
                                           |                                           
Net: net13311                              |Net: net13311                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
                                           |                                           
Net: net20753                              |Net: net20753                              
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
                                           |                                           
Net: net19776                              |Net: net19776                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 1 |                                           
                                           |                                           
Net: net20624                              |Net: net20624                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__inv_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__inv_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 4    |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or4_2/A4 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A4 = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
                                           |                                           
Net: net20715                              |Net: net20715                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
                                           |                                           
Net: net17447                              |Net: net17447                              
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 2  |                                           
                                           |                                           
Net: net19684                              |Net: net19684                              
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_4/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |                                           
                                           |                                           
Net: net20790                              |Net: net20790                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    |                                           
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[60\]. |Net: net12358                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 |                                           
                                           |                                           
Net: net17916                              |Net: net17916                              
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
                                           |                                           
Net: net16585                              |Net: net16585                              
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
                                           |                                           
Net: net13556                              |Net: net13556                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
                                           |                                           
Net: net18560                              |Net: net18560                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
                                           |                                           
Net: net19525                              |Net: net19525                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
                                           |                                           
Net: net22310                              |Net: net22310                              
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
                                           |                                           
Net: net17522                              |Net: net17522                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 3  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 3  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |                                           
                                           |                                           
Net: net14515                              |Net: net14515                              
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
                                           |                                           
Net: net17566                              |Net: net17566                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
                                           |                                           
Net: net19774                              |Net: net19774                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 3  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
                                           |                                           
Net: net20728                              |Net: net20728                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 |                                           
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[14\]. |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[4\].s |Net: net10129                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
                                           |                                           
Net: net18474                              |Net: net18474                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  |                                           
                                           |                                           
Net: net11316                              |Net: net11316                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[23\]. |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 3 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.gen_square[56].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |                                           
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[8\].s |Net: \i_chip_core.core5.b.gen_square[59].s 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |                                           
                                           |                                           
Net: net20822                              |Net: net20822                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
                                           |                                           
Net: net10233                              |Net: net10233                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
                                           |                                           
Net: net18757                              |Net: net18757                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_4/B3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    |                                           
                                           |                                           
Net: net19288                              |Net: net19288                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
                                           |                                           
Net: net13939                              |Net: net13939                              
  gf180mcu_fd_sc_mcu9t5v0__oai222_2/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_2/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 7 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 5     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_2/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_4/B1 = 1 |                                           
                                           |                                           
Net: net10150                              |Net: net10150                              
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
                                           |                                           
Net: net16715                              |Net: net16715                              
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 3  |                                           
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[49\]. |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 4 |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 6     |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
                                           |                                           
Net: net17871                              |Net: net17871                              
  gf180mcu_fd_sc_mcu9t5v0__clkinv_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_4/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_4/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__inv_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_2/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 3  |                                           
                                           |                                           
Net: net21994                              |Net: net21994                              
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[23\]. |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
                                           |                                           
Net: net19572                              |Net: net19572                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: net2161                               |Net: net2161                               
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 9  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 10 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand4_4/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_4/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_4/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  |                                           
                                           |                                           
Net: net20406                              |Net: net20406                              
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 4   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 2    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
                                           |                                           
Net: net20871                              |Net: net20871                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  |                                           
                                           |                                           
Net: net9613                               |Net: net9613                               
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
                                           |                                           
Net: net20723                              |Net: net20723                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 5   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
                                           |                                           
Net: net14773                              |Net: net14773                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai31_4/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_4/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_2/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_2/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[19\]. |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 5  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
                                           |                                           
Net: net19754                              |Net: net19754                              
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
                                           |                                           
Net: net10103                              |Net: net10103                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[37\]. |Net: net12259                              
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 2    
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[3\].s |Net: net12251                              
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 3  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__and2_2/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[41\]. |Net: \i_chip_core.core0.b.gen_square[1].sq 
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__or4_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
                                           |                                           
Net: net15444                              |Net: net15444                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    |                                           
                                           |                                           
Net: net20206                              |Net: net20206                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
Net: net16612                              |Net: net16612                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    |                                           
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[63\]. |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_4/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
                                           |                                           
Net: net15978                              |Net: net15978                              
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[30\]. |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
                                           |                                           
Net: net14399                              |Net: net14399                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
                                           |                                           
Net: net12147                              |Net: net12147                              
  gf180mcu_fd_sc_mcu9t5v0__oai221_2/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 |                                           
                                           |                                           
Net: i_chip_core.core2.b.arb_data_out\[2\] |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
                                           |                                           
Net: net6081                               |Net: net6081                               
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[45\]. |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[45\]. |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
                                           |                                           
Net: net13045                              |Net: net13045                              
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__or3_2/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or3_2/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or4_2/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/ZN = 1  |                                           
                                           |                                           
Net: net20743                              |Net: net20743                              
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[13\]. |Net: net12102                              
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
                                           |                                           
Net: net19634                              |Net: net19634                              
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_2/A1 = 1  |                                           
                                           |                                           
Net: net18467                              |Net: net18467                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: net14856                              |Net: net14856                              
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
                                           |                                           
Net: net15581                              |Net: net15581                              
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 3 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 4 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[1\].s |Net: net15258                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_8/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[55\]. |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |                                           
                                           |                                           
Net: net6358                               |Net: net6358                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    |                                           
                                           |                                           
Net: net6489                               |Net: net6489                               
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |                                           
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |                                           
                                           |                                           
Net: net10706                              |Net: net10706                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
                                           |                                           
Net: net14574                              |Net: net14574                              
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |                                           
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai21_4/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_12/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.arb_data_out\[1\] |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[5\].s |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai211_4/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
                                           |                                           
Net: net22214                              |Net: net22214                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
                                           |                                           
Net: net21452                              |Net: net21452                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core6.b.arb_data_out\[1\] |Net: \i_chip_core.core6.b.gen_square[55].s 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[41\]. |Net: \i_chip_core.core6.b.gen_square[8].sq 
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[56\]. |Net: \i_chip_core.core6.b.gen_square[57].s 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[30\]. |Net: net7607                               
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
                                           |                                           
Net: net10262                              |Net: net10262                              
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/ZN = 1  |                                           
                                           |                                           
Net: net12502                              |Net: net12502                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  |                                           
                                           |                                           
Net: net4799                               |Net: net4799                               
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |                                           
                                           |                                           
Net: net7270                               |Net: net7270                               
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[11\]. |Net: \i_chip_core.core4.b.gen_square[9].sq 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    |                                           
                                           |                                           
Net: i_chip_core.core4.b.arb_data_out\[0\] |Net: net18877                              
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor3_4/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_4/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[54\]. |Net: net13902                              
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
                                           |                                           
Net: net10480                              |Net: net10480                              
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    |                                           
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[30\]. |Net: \i_chip_core.core6.b.gen_square[12].s 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[32\]. |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
                                           |                                           
Net: net13120                              |Net: net13120                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: net9744                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[11\]. |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
                                           |                                           
Net: net8774                               |Net: net8774                               
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
                                           |                                           
Net: net15981                              |Net: net15981                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 4  
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[8\].s |Net: net13908                              
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai222_2/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 2  |                                           
                                           |                                           
Net: i_chip_core.core2.b.arb_data_out\[0\] |Net: net16287                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
                                           |                                           
Net: net17259                              |Net: net17259                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  |                                           
                                           |                                           
Net: net16882                              |Net: net16882                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 5  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[29\]. |Net: net13996                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
                                           |                                           
Net: net14680                              |Net: net14680                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |                                           
Net: net20285                              |Net: net20285                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
Net: net16203                              |Net: net16203                              
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
                                           |                                           
Net: net18765                              |Net: net18765                              
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[21\]. |Net: \i_chip_core.core6.b.gen_square[21].s 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_4/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
                                           |                                           
Net: net7747                               |Net: net7747                               
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 2 |                                           
                                           |                                           
Net: net20777                              |Net: net20777                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: net2933                               
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
                                           |                                           
Net: net9840                               |Net: net9840                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
                                           |                                           
Net: net8327                               |Net: net8327                               
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 2 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |                                           
Net: net14187                              |Net: net14187                              
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or4_4/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.gen_square[40].s 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__or4_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   |                                           
                                           |                                           
Net: net22069                              |Net: net22069                              
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
Net: net16291                              |Net: net16291                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_4/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 2    |                                           
                                           |                                           
Net: i_chip_core.core3.b.arb_data_out\[0\] |Net: net13909                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai222_2/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
                                           |                                           
Net: net13397                              |Net: net13397                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[17\]. |Net: \i_chip_core.core6.b.gen_square[6].sq 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
                                           |                                           
Net: net10760                              |Net: net10760                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
Net: net19852                              |Net: net19852                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[9\].s |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
                                           |                                           
Net: net18485                              |Net: net18485                              
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_2/C2 = 1 |                                           
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: net16268                              
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_8/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |                                           
                                           |                                           
Net: net18148                              |Net: net18148                              
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: net10018                              
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__or3_2/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
                                           |                                           
Net: net13898                              |Net: net13898                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
                                           |                                           
Net: i_chip_core.core3.b.arb_data_out\[1\] |Net: net7652                               
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_4/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.gen_square[21].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai222_2/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
                                           |                                           
Net: net19316                              |Net: net19316                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[10\]. |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  |                                           
                                           |                                           
Net: net12729                              |Net: net12729                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[40\]. |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  |                                           
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.gen_square[46].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__or4_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__antenna/I = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
                                           |                                           
Net: net19047                              |Net: net19047                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: net12114                              |Net: net12114                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[4\].s |Net: \i_chip_core.core6.b.gen_square[53].s 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
                                           |                                           
Net: net12646                              |Net: net12646                              
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
                                           |                                           
Net: net6790                               |Net: net6790                               
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
                                           |                                           
Net: net21644                              |Net: net21644                              
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
Net: net15389                              |Net: net15389                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
                                           |                                           
Net: net18505                              |Net: net18505                              
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |                                           
Net: net13368                              |Net: net13368                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |                                           
                                           |                                           
Net: net18510                              |Net: net18510                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |                                           
Net: net17422                              |Net: net17422                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__or4_2/A4 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A4 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |                                           
Net: net19603                              |Net: net19603                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
Net: net20992                              |Net: net20992                              
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: net9305                               |Net: net9305                               
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
                                           |                                           
Net: net9330                               |Net: net9330                               
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[8\].s |Net: \i_chip_core.core6.b.gen_square[57].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 4  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[29\]. |Net: net13919                              
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: net15286                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A3 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__dlyc_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.gen_square[57].s 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
                                           |                                           
Net: net10897                              |Net: net10897                              
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
                                           |                                           
Net: net12629                              |Net: net12629                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_4/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
                                           |                                           
Net: net20065                              |Net: net20065                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.gen_square[60].s 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 2  |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
                                           |                                           
Net: net12642                              |Net: net12642                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
                                           |                                           
Net: net7294                               |Net: net7294                               
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
                                           |                                           
Net: i_chip_core.core3.b.arb_data_out\[0\] |Net: net12025                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
                                           |                                           
Net: net12507                              |Net: net12507                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: net17095                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 2   |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
                                           |                                           
Net: net14401                              |Net: net14401                              
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: net8728                               |Net: net8728                               
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_2/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
                                           |                                           
Net: net13283                              |Net: net13283                              
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: net13953                              
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |                                           
                                           |                                           
Net: i_chip_core.core1.b.arb_data_out\[0\] |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_4/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
                                           |                                           
Net: net13560                              |Net: net13560                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[31\]. |Net: net15285                              
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__buf_8/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
                                           |                                           
Net: net20359                              |Net: net20359                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
Net: i_chip_core.core7.b.arb_data_out\[1\] |Net: net16302                              
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
                                           |                                           
Net: net8127                               |Net: net8127                               
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |                                           
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[41\]. |Net: net10040                              
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
                                           |                                           
Net: i_chip_core.core1.b.gen_square\[55\]. |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
                                           |                                           
Net: net14049                              |Net: net14049                              
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
                                           |                                           
Net: net12679                              |Net: net12679                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/Z = 1     |                                           
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
Net: i_chip_core.core2.b.arb_data_out\[0\] |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_4/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
                                           |                                           
Net: net18754                              |Net: net18754                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
                                           |                                           
Net: net9456                               |Net: net9456                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
                                           |                                           
Net: net21603                              |Net: net21603                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
                                           |                                           
Net: net20440                              |Net: net20440                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
                                           |                                           
Net: net19624                              |Net: net19624                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 1 |                                           
                                           |                                           
Net: net14003                              |Net: net14003                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   |                                           
                                           |                                           
Net: i_chip_core.core1.b.gen_square\[60\]. |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_2/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[4\].s |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
                                           |                                           
Net: net16476                              |Net: net16476                              
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 5     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__inv_2/ZN = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
                                           |                                           
Net: net16607                              |Net: net16607                              
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
                                           |                                           
Net: net19569                              |Net: net19569                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 2  |                                           
                                           |                                           
Net: net20243                              |Net: net20243                              
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/ZN = 1 |                                           
                                           |                                           
Net: net18606                              |Net: net18606                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_12/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
                                           |                                           
Net: net17974                              |Net: net17974                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
                                           |                                           
Net: net18776                              |Net: net18776                              
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
                                           |                                           
Net: net8242                               |Net: net8242                               
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
                                           |                                           
Net: net22250                              |Net: net22250                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  |                                           
                                           |                                           
Net: net18646                              |Net: net18646                              
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: net18814                              |Net: net18814                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 2    |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
                                           |                                           
Net: net6598                               |Net: net6598                               
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 9  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 9  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__inv_3/ZN = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_4/A3 = 1  |                                           
                                           |                                           
Net: net20615                              |Net: net20615                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or4_2/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 8  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
                                           |                                           
Net: net21957                              |Net: net21957                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |                                           
                                           |                                           
Net: net21352                              |Net: net21352                              
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 3   |                                           
                                           |                                           
Net: net20879                              |Net: net20879                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |                                           
                                           |                                           
Net: net18068                              |Net: net18068                              
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: net11991                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
                                           |                                           
Net: net19072                              |Net: net19072                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  |                                           
                                           |                                           
Net: net18128                              |Net: net18128                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
                                           |                                           
Net: net18619                              |Net: net18619                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_4/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: i_chip_core.core7.b.arb_data_out\[0\] |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__inv_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__inv_2/ZN = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
                                           |                                           
Net: net16677                              |Net: net16677                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 4   |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
                                           |                                           
Net: net21527                              |Net: net21527                              
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
                                           |                                           
Net: net5945                               |Net: net5945                               
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 5   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
                                           |                                           
Net: net8903                               |Net: net8903                               
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
                                           |                                           
Net: net17523                              |Net: net17523                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_4/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_4/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 3  |                                           
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[60\]. |Net: \i_chip_core.core7.b.gen_square[37].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
                                           |                                           
Net: net19610                              |Net: net19610                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 3  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
                                           |                                           
Net: net17957                              |Net: net17957                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
                                           |                                           
Net: net18959                              |Net: net18959                              
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
                                           |                                           
Net: net8526                               |Net: net8526                               
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
                                           |                                           
Net: net5674                               |Net: net5674                               
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
                                           |                                           
Net: net20687                              |Net: net20687                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__antenna/I = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
                                           |                                           
Net: net10117                              |Net: net10117                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
                                           |                                           
Net: net17942                              |Net: net17942                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
                                           |                                           
Net: net21606                              |Net: net21606                              
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |                                           
                                           |                                           
Net: net9326                               |Net: net9326                               
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_2/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
                                           |                                           
Net: net20188                              |Net: net20188                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__antenna/I = 1   |  gf180mcu_fd_sc_mcu9t5v0__antenna/I = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
                                           |                                           
Net: net8194                               |Net: net8194                               
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 3     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
                                           |                                           
Net: net19420                              |Net: net19420                              
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__and4_2/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 2    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 6   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
                                           |                                           
Net: net16480                              |Net: net16480                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 3     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 8  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 8  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 6     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
                                           |                                           
Net: net20679                              |Net: net20679                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
                                           |                                           
Net: net19623                              |Net: net19623                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 6  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 3   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 2   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |                                           
                                           |                                           
Net: net9945                               |Net: net9945                               
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_2/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_2/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
                                           |                                           
Net: net19687                              |Net: net19687                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 5   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  |                                           
                                           |                                           
Net: net18768                              |Net: net18768                              
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  |                                           
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[17\]. |Net: \i_chip_core.core7.b.gen_square[31].s 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
                                           |                                           
Net: net20043                              |Net: net20043                              
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  |                                           
                                           |                                           
Net: net2347                               |Net: net2347                               
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__inv_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[59\]. |Net: \i_chip_core.core7.b.gen_square[38].s 
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__and3_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
                                           |                                           
Net: net5014                               |Net: net5014                               
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
                                           |                                           
Net: i_chip_core.core1.b.gen_square\[18\]. |Net: net13107                              
  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   |                                           
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
                                           |                                           
Net: net14048                              |Net: net14048                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 4  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__antenna/I = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
                                           |                                           
Net: net17382                              |Net: net17382                              
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
                                           |                                           
Net: net20702                              |Net: net20702                              
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
                                           |                                           
Net: net19079                              |Net: net19079                              
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 3  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |                                           
                                           |                                           
Net: net22208                              |Net: net22208                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |                                           
                                           |                                           
Net: i_chip_core.core0.b.arb_data_out\[1\] |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
                                           |                                           
Net: net20177                              |Net: net20177                              
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: net17017                              
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
                                           |                                           
Net: net18122                              |Net: net18122                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
                                           |                                           
Net: net18812                              |Net: net18812                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
                                           |                                           
Net: i_chip_core.core6.b.arb_data_out\[1\] |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
                                           |                                           
Net: net20989                              |Net: net20989                              
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 2   |                                           
                                           |                                           
Net: net19613                              |Net: net19613                              
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
                                           |                                           
Net: net20391                              |Net: net20391                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |                                           
                                           |                                           
Net: net20266                              |Net: net20266                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__mux2_2/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[30\]. |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
                                           |                                           
Net: net9721                               |Net: net9721                               
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_2/A4 = 1    |                                           
                                           |                                           
Net: net18524                              |Net: net18524                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 3  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_8/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_4/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 3    |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
                                           |                                           
Net: net16112                              |Net: net16112                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
                                           |                                           
Net: net20407                              |Net: net20407                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
                                           |                                           
Net: net12971                              |Net: net12971                              
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |                                           
                                           |                                           
Net: net22034                              |Net: net22034                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 |                                           
                                           |                                           
Net: net20787                              |Net: net20787                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_4/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[61\]. |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 3     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[39\]. |Net: net17089                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  |                                           
                                           |                                           
Net: net12700                              |Net: net12700                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/B = 1   |                                           
                                           |                                           
Net: net22248                              |Net: net22248                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
                                           |                                           
Net: net17433                              |Net: net17433                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[57\]. |Net: \i_chip_core.core2.b.gen_square[5].sq 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
                                           |                                           
Net: net20364                              |Net: net20364                              
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
                                           |                                           
Net: net20166                              |Net: net20166                              
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[27\]. |Net: \i_chip_core.core1.b.gen_square[27].s 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
                                           |                                           
Net: net21626                              |Net: net21626                              
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
                                           |                                           
Net: net4863                               |Net: net4863                               
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
                                           |                                           
Net: net16339                              |Net: net16339                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 3  |                                           
                                           |                                           
Net: net15904                              |Net: net15904                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_4/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |                                           
                                           |                                           
Net: net9451                               |Net: net9451                               
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 6   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
                                           |                                           
Net: net20681                              |Net: net20681                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
                                           |                                           
Net: net3256                               |Net: net3256                               
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
                                           |                                           
Net: net18742                              |Net: net18742                              
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai222_2/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_4/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
                                           |                                           
Net: net14648                              |Net: net14648                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 5  |                                           
                                           |                                           
Net: net22008                              |Net: net22008                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 4   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 3  |                                           
                                           |                                           
Net: net18520                              |Net: net18520                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
                                           |                                           
Net: net5726                               |Net: net5726                               
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |                                           
                                           |                                           
Net: i_chip_core.core0.b.arb_data_out\[1\] |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
                                           |                                           
Net: net19195                              |Net: net19195                              
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.gen_square[35].s 
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.gen_square[37].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 2  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
                                           |                                           
Net: net13246                              |Net: net13246                              
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[58\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |                                           
                                           |                                           
Net: net18766                              |Net: net18766                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_4/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |                                           
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.gen_square[37].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 6  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_4/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
                                           |                                           
Net: net17451                              |Net: net17451                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
                                           |                                           
Net: net19482                              |Net: net19482                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_4/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_4/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and4_2/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and4_2/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_2/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |                                           
                                           |                                           
Net: net14278                              |Net: net14278                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[22\]. |Net: \i_chip_core.core6.b.gen_square[14].s 
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
                                           |                                           
Net: net2280                               |Net: net2280                               
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[52\]. |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
                                           |                                           
Net: net10669                              |Net: net10669                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
                                           |                                           
Net: net7326                               |Net: net7326                               
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
                                           |                                           
Net: net8401                               |Net: net8401                               
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
                                           |                                           
Net: net16774                              |Net: net16774                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   |                                           
                                           |                                           
Net: net8237                               |Net: net8237                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[57\]. |Net: \i_chip_core.core0.b.gen_square[6].sq 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
                                           |                                           
Net: net16473                              |Net: net16473                              
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |                                           
                                           |                                           
Net: net9794                               |Net: net9794                               
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_2/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
                                           |                                           
Net: net8153                               |Net: net8153                               
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[49\]. |Net: \i_chip_core.core7.b.gen_square[11].s 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
                                           |                                           
Net: net5847                               |Net: net5847                               
  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_2/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[18\]. |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
                                           |                                           
Net: net6441                               |Net: net6441                               
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
                                           |                                           
Net: net14484                              |Net: net14484                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__antenna/I = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[18\]. |Net: \i_chip_core.core6.b.gen_square[59].s 
  gf180mcu_fd_sc_mcu9t5v0__or2_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core0.b.arb_data_out\[6\] |Net: \i_chip_core.core6.b.gen_square[55].s 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[58\]. |Net: \i_chip_core.core6.b.gen_square[8].sq 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
                                           |                                           
Net: net12075                              |Net: net12075                              
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_2/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
                                           |                                           
Net: net22435                              |Net: net22435                              
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
                                           |                                           
Net: net17586                              |Net: net17586                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  |                                           
                                           |                                           
Net: net15785                              |Net: net15785                              
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 2    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
                                           |                                           
Net: net4727                               |Net: net4727                               
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
                                           |                                           
Net: net9792                               |Net: net9792                               
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__antenna/I = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
                                           |                                           
Net: net18172                              |Net: net18172                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 5  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_4/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |                                           
                                           |                                           
Net: net20611                              |Net: net20611                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand4_4/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_4/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or4_2/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 6   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
                                           |                                           
Net: net19779                              |Net: net19779                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 3  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 3     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 3  |                                           
                                           |                                           
Net: net19643                              |Net: net19643                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 2    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/I = 1  |                                           
                                           |                                           
Net: net9270                               |Net: net9270                               
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 3  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 5   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
                                           |                                           
Net: net21225                              |Net: net21225                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |                                           
                                           |                                           
Net: net11143                              |Net: net11143                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_2/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_4/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |                                           
                                           |                                           
Net: net5480                               |Net: net5480                               
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 5  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
                                           |                                           
Net: net21461                              |Net: net21461                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 2    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
                                           |                                           
Net: net20439                              |Net: net20439                              
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 4   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 5   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
                                           |                                           
Net: net17983                              |Net: net17983                              
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 4   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 2    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 2    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
                                           |                                           
Net: net20643                              |Net: net20643                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
                                           |                                           
Net: net20850                              |Net: net20850                              
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 5   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 2    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |                                           
                                           |                                           
Net: net8411                               |Net: net8411                               
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 5  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 6 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 3    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 5   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
                                           |                                           
Net: net20789                              |Net: net20789                              
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 5   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 8   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 3  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 4     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 7  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_4/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_4/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_4/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_4/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_2/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
                                           |                                           
Net: net8036                               |Net: \i_chip_core.core2.b.gen_square[43].s 
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 9  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 7  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 10  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 6 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 12 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 9  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 8  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_4/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_4/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 10  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_2/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 4     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 4 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.gen_square[52].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |                                           
                                           |                                           
Net: net18665                              |Net: net18665                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
                                           |                                           
Net: net15095                              |Net: net15095                              
  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 2    |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_4/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_4/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_4/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
                                           |                                           
Net: net21941                              |Net: net21941                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_2/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_2/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor4_4/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_4/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
                                           |                                           
Net: net19439                              |Net: net19439                              
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_4/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |                                           
                                           |                                           
Net: net18756                              |Net: net18756                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 2 |                                           
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.gen_square[48].s 
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |                                           
                                           |                                           
Net: net16981                              |Net: net16981                              
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
                                           |                                           
Net: net20279                              |Net: net20279                              
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
                                           |                                           
Net: net16706                              |Net: net16706                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    |                                           
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_4/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__inv_1/ZN = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
                                           |                                           
Net: net13092                              |Net: net13092                              
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
                                           |                                           
Net: net10898                              |Net: net10898                              
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   |                                           
                                           |                                           
Net: net22229                              |Net: net22229                              
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 4   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
                                           |                                           
Net: net19251                              |Net: net19251                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: net17991                              |Net: net17991                              
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 3  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
                                           |                                           
Net: net21011                              |Net: net21011                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[3\].s |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
                                           |                                           
Net: net6375                               |Net: net6375                               
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
                                           |                                           
Net: net16868                              |Net: net16868                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
                                           |                                           
Net: net16018                              |Net: net16018                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 4 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 3     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
                                           |                                           
Net: net19674                              |Net: net19674                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.gen_square[52].s 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
                                           |                                           
Net: net19091                              |Net: net19091                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
                                           |                                           
Net: net20361                              |Net: net20361                              
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
                                           |                                           
Net: net15480                              |Net: net15480                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 4 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
                                           |                                           
Net: net9770                               |Net: net9770                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 4   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
                                           |                                           
Net: net21372                              |Net: net21372                              
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__and3_4/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 3  |                                           
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 3    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_4/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
                                           |                                           
Net: net18533                              |Net: net18533                              
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: net20776                              |Net: net20776                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 3 |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
                                           |                                           
Net: net14236                              |Net: net14236                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 3    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
                                           |                                           
Net: net6304                               |Net: net6304                               
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
                                           |                                           
Net: net11304                              |Net: net11304                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[57\]. |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
                                           |                                           
Net: net7011                               |Net: net7011                               
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__antenna/I = 1   |  gf180mcu_fd_sc_mcu9t5v0__antenna/I = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
                                           |                                           
Net: net9523                               |Net: net9523                               
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 4 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 4 
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 3 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
                                           |                                           
Net: net21131                              |Net: net21131                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |                                           
                                           |                                           
Net: net22036                              |Net: net22036                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 2    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[29\]. |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |                                           
                                           |                                           
Net: net19571                              |Net: net19571                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 9   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 5     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
                                           |                                           
Net: net21933                              |Net: net21933                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 3   
  gf180mcu_fd_sc_mcu9t5v0__and2_2/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_2/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 5  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 4 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
                                           |                                           
Net: net20669                              |Net: net20669                              
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 3   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 3    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_2/C2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
                                           |                                           
Net: net21008                              |Net: net21008                              
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[53\]. |Net: \i_chip_core.core5.b.gen_square[6].sq 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
                                           |                                           
Net: net14781                              |Net: net14781                              
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B2 = 1 |                                           
                                           |                                           
Net: net9362                               |Net: net9362                               
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 2 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
                                           |                                           
Net: net10645                              |Net: net10645                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
                                           |                                           
Net: net17884                              |Net: net17884                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 3  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
                                           |                                           
Net: net18943                              |Net: net18943                              
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 3   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 3   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 4  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 5   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
                                           |                                           
Net: net19812                              |Net: net19812                              
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |                                           
                                           |                                           
Net: net20881                              |Net: net20881                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
                                           |                                           
Net: net18992                              |Net: net18992                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_4/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
                                           |                                           
Net: net1480                               |Net: net1480                               
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
                                           |                                           
Net: net21370                              |Net: net21370                              
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
                                           |                                           
Net: net20068                              |Net: net20068                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
                                           |                                           
Net: net22272                              |Net: net22272                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.arb_data_out[6]_ 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 3    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
                                           |                                           
Net: net9053                               |Net: net9053                               
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: net16575                              |Net: net16575                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   |                                           
                                           |                                           
Net: net15226                              |Net: net15226                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 4  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
                                           |                                           
Net: net18664                              |Net: net18664                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   |                                           
                                           |                                           
Net: net22255                              |Net: net22255                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
                                           |                                           
Net: net22256                              |Net: net22256                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
                                           |                                           
Net: net21497                              |Net: net21497                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |                                           
                                           |                                           
Net: net15798                              |Net: net15798                              
  gf180mcu_fd_sc_mcu9t5v0__oai221_2/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_3/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_3/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     |                                           
                                           |                                           
Net: net20131                              |Net: net20131                              
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 4 |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
                                           |                                           
Net: net7676                               |Net: net7676                               
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[21\]. |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
                                           |                                           
Net: net21132                              |Net: net21132                              
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
                                           |                                           
Net: net6181                               |Net: net6181                               
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 3     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
                                           |                                           
Net: net17977                              |Net: net17977                              
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core0.b.arb_data_out\[1\] |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
                                           |                                           
Net: net20306                              |Net: net20306                              
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[35\]. |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
                                           |                                           
Net: net9781                               |Net: net9781                               
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[57\]. |Net: \i_chip_core.core3.b.gen_square[27].s 
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__inv_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
                                           |                                           
Net: net10625                              |Net: net10625                              
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_4/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[24\]. |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[34\]. |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
                                           |                                           
Net: net11780                              |Net: net11780                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
                                           |                                           
Net: net19598                              |Net: net19598                              
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |                                           
                                           |                                           
Net: net19227                              |Net: net19227                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
                                           |                                           
Net: net8336                               |Net: net8336                               
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 3 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
                                           |                                           
Net: net16515                              |Net: net16515                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
                                           |                                           
Net: net21555                              |Net: net21555                              
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 4 |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
                                           |                                           
Net: net570                                |Net: net570                                
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
                                           |                                           
Net: net9231                               |Net: net9231                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 5  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 4 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 4 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 5   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
                                           |                                           
Net: net19605                              |Net: net19605                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |                                           
                                           |                                           
Net: net16609                              |Net: net16609                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 4   |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
                                           |                                           
Net: net20890                              |Net: net20890                              
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 2    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
                                           |                                           
Net: net9139                               |Net: net9139                               
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 6  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 4  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__and2_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 |                                           
                                           |                                           
Net: net9176                               |Net: net9176                               
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 5   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 6   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[48\]. |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 9  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 5  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 7   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 4    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
                                           |                                           
Net: net17931                              |Net: net17931                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 5  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 5  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
                                           |                                           
Net: net19822                              |Net: net19822                              
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A2 = 1  |                                           
                                           |                                           
Net: net8551                               |Net: net8551                               
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 14 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 3     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 6   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 14  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 6   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 4    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 7   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_4/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__antenna/I = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
                                           |                                           
Net: net20824                              |Net: net20824                              
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
                                           |                                           
Net: net22323                              |Net: net22323                              
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 4   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
                                           |                                           
Net: net22240                              |Net: net22240                              
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
                                           |                                           
Net: net13334                              |Net: net13334                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  |                                           
                                           |                                           
Net: net18774                              |Net: net18774                              
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
                                           |                                           
Net: net17973                              |Net: net17973                              
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 4   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
                                           |                                           
Net: net4442                               |Net: net4442                               
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 3  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 7  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 8  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 10  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 10  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 6 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 10  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 6   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 4     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 10 |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 3    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 10 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 8  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 4     |                                           
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: i_chip_core.core4.b.arb_data_out\[1\] |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: i_chip_core.core1.b.gen_square\[27\]. |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.gen_square[37].s 
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.gen_square[40].s 
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[53\]. |Net: \i_chip_core.core6.b.gen_square[37].s 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.gen_square[44].s 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__or4_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[15\]. |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.gen_square[57].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[15\]. |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[15\]. |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
Net: net16051                              |Net: net16051                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 2  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[40\]. |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[4\].s |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.gen_square[12].s 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.gen_square[25].s 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
Net: net12766                              |Net: net12766                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
Net: net11174                              |Net: net11174                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[27\]. |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[40\]. |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[29\]. |Net: \i_chip_core.core4.b.gen_square[40].s 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.gen_square[8].sq 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.gen_square[31].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[62\]. |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.arb_data_out[6]_ 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |                                           
Net: i_chip_core.core0.b.arb_data_out\[0\] |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |                                           
Net: i_chip_core.core6.b.arb_data_out\[0\] |Net: \i_chip_core.core0.b.arb_data_out[6]_ 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.gen_square[55].s 
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.gen_square[9].sq 
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[38\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[38\]. |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[55\]. |Net: \i_chip_core.core5.b.gen_square[12].s 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[15\]. |Net: \i_chip_core.core5.b.gen_square[8].sq 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[29\]. |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
Net: i_chip_core.core4.b.arb_data_out\[0\] |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.gen_square[46].s 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[23\]. |Net: \i_chip_core.core4.b.gen_square[37].s 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |                                           
Net: i_chip_core.core3.b.arb_data_out\[0\] |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[8\].s |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[56\]. |Net: \i_chip_core.core3.b.gen_square[1].sq 
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: net14436                              |Net: net14436                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A4 = 1    
                                           |                                           
Net: net16124                              |Net: net16124                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_2/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B2 = 1 
                                           |                                           
Net: i_chip_core.core1.b.arb_data_out\[1\] |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core1.b.gen_square\[60\]. |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.gen_square[59].s 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[6\].s |Net: \i_chip_core.core2.b.gen_square[45].s 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[52\]. |Net: \i_chip_core.core1.b.gen_square[31].s 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core1.b.arb_data_out\[1\] |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[46\]. |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: net3428                               |Net: net3428                               
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A3 = 1  
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.gen_square[4].sq 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core6.b.gen_square\[37\]. |Net: \i_chip_core.core4.b.gen_square[37].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[29\]. |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[4\].s |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[43\]. |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[12\]. |Net: \i_chip_core.core3.b.gen_square[27].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[11\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core3.b.arb_data_out\[1\] |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core4.b.arb_data_out\[1\] |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[10\]. |Net: \i_chip_core.core7.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.gen_square[29].s 
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[43\]. |Net: \i_chip_core.core0.b.gen_square[39].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
Net: net8769                               |Net: net8769                               
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 37  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 4     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 11    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 7     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 14    |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 14  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 22  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 5   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 21 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 9   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 15 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 36 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 8  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 12 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 10 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 5   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 7  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 4 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 8   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 17 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_8/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_2/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 3    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 15 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 8     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 5   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 5    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 7  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 6     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 32 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 17  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 8   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 4 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 9  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 15  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 10 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 9  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 10 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 10  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 8  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 15  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 5 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 10 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 4    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 3    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 3    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 4 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 3    |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_2/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_2/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 4    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 1   |                                           
                                           |                                           
Net: net8308                               |Net: net8308                               
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 7  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 5 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 6   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 4    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 6   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
                                           |                                           
Net: net18475                              |Net: net18475                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 4   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
                                           |                                           
Net: net20161                              |Net: net20161                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_4/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_4/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_4/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
                                           |                                           
Net: net6585                               |Net: net6585                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 5  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 5 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_4/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
                                           |                                           
Net: net22401                              |Net: net22401                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 7  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 2    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 2    
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_4/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__inv_2/I = 1     |                                           
                                           |                                           
Net: net8568                               |Net: net8568                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 8 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 56  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 11 |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 17  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 11    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 8 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 14 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 18 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 8   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 24  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 10  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 15    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 11 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 27 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 19    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 4 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 49 |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 8    |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 5    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 16 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 4 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 31 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 7  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 17    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 13 |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 35 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 23   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 10   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_2/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 6 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 10    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 14 |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 5    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 9  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 7   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 6     |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 5    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 5 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 7  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 7 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 12    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 4 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 7  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 9  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 12 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 14  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 3    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 9 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 19  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_2/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 30  |                                           
  gf180mcu_fd_sc_mcu9t5v0__inv_3/ZN = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_3/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 6 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 5   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 7  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 7   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 7  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 18 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 7  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 5    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 3    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_4/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_4/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 11 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 5   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 6   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_4/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_4/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 9   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_2/A4 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_4/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_4/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_4/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/B = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_4/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
                                           |                                           
Net: net21371                              |Net: net21371                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor2_4/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
                                           |                                           
Net: net18598                              |Net: net18598                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai221_2/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
                                           |                                           
Net: net21306                              |Net: net21306                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |                                           
                                           |                                           
Net: net2697                               |Net: net2697                               
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
                                           |                                           
Net: net20189                              |Net: net20189                              
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__inv_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |                                           
                                           |                                           
Net: net7472                               |Net: net7472                               
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core3.b.gen_square\[8\].s |Net: \i_chip_core.core2.b.gen_square[6].sq 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |                                           
                                           |                                           
Net: net19677                              |Net: net19677                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 3  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |                                           
                                           |                                           
Net: net17496                              |Net: net17496                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_2/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  |                                           
                                           |                                           
Net: net12011                              |Net: net12011                              
  gf180mcu_fd_sc_mcu9t5v0__or4_4/A4 = 1    |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_4/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
                                           |                                           
Net: net10529                              |Net: net10529                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_2/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
                                           |                                           
Net: net9185                               |Net: net9185                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
                                           |                                           
Net: net19562                              |Net: net19562                              
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__or4_2/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_2/A3 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[20\]. |Net: \i_chip_core.core0.b.gen_square[57].s 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
                                           |                                           
Net: net19591                              |Net: net19591                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
                                           |                                           
Net: net18933                              |Net: net18933                              
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 4  
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 3   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 3   
  gf180mcu_fd_sc_mcu9t5v0__nor2_4/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_4/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
                                           |                                           
Net: net20355                              |Net: net20355                              
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |                                           
                                           |                                           
Net: net13363                              |Net: net13363                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    |                                           
                                           |                                           
Net: net18027                              |Net: net18027                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
                                           |                                           
Net: net9819                               |Net: net9819                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 5   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_4/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[12\]. |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
                                           |                                           
Net: net12359                              |Net: net12359                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |                                           
                                           |                                           
Net: net22223                              |Net: net22223                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 2    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A2 = 1  |                                           
                                           |                                           
Net: net8542                               |Net: net8542                               
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 10 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 4   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 9     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 14  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 5    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 10    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 19  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 4     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 7  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 5   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 5     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 4     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 6   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 7  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 7   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 5     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 3    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 5 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_8/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_4/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 5  |                                           
                                           |                                           
Net: net18073                              |Net: net18073                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 8  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 6   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 4   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 4  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
                                           |                                           
Net: net21543                              |Net: net21543                              
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_2/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |                                           
                                           |                                           
Net: net9130                               |Net: net9130                               
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_4/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: net19207                              |Net: net19207                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 2    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |                                           
                                           |                                           
Net: net19587                              |Net: net19587                              
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
                                           |                                           
Net: net15467                              |Net: net15467                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 3    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
                                           |                                           
Net: net21592                              |Net: net21592                              
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
                                           |                                           
Net: net21542                              |Net: net21542                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__antenna/I = 1   |  gf180mcu_fd_sc_mcu9t5v0__antenna/I = 1   
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
                                           |                                           
Net: net14820                              |Net: net14820                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 6  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
                                           |                                           
Net: net21001                              |Net: net21001                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 5   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_2/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    |                                           
                                           |                                           
Net: net8607                               |Net: net8607                               
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 3   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 3   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_4/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_4/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     |                                           
                                           |                                           
Net: net9946                               |Net: net9946                               
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   |                                           
                                           |                                           
Net: net22239                              |Net: net22239                              
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
                                           |                                           
Net: net19706                              |Net: net19706                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   |                                           
                                           |                                           
Net: net19222                              |Net: net19222                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
                                           |                                           
Net: net22053                              |Net: net22053                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  |                                           
                                           |                                           
Net: net21937                              |Net: net21937                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__inv_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__inv_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_4/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_2/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |                                           
                                           |                                           
Net: net19192                              |Net: net19192                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 10 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 6   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 10 |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 7   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 11  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 3    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__and3_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 5    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 15 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 18  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 4 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 3    |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 4     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 4 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_2/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A2 = 1 |                                           
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[6\].s |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 11  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 11 |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 4    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
                                           |                                           
Net: net19837                              |Net: net19837                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
                                           |                                           
Net: net19516                              |Net: net19516                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 2    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[28\]. |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
                                           |                                           
Net: net7063                               |Net: net7063                               
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
                                           |                                           
Net: i_chip_core.core1.b.gen_square\[42\]. |Net: \i_chip_core.core6.b.gen_square[57].s 
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
                                           |                                           
Net: net19129                              |Net: net19129                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
                                           |                                           
Net: net21353                              |Net: net21353                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 2   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 2   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 2    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
                                           |                                           
Net: net12686                              |Net: net12686                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
                                           |                                           
Net: net9131                               |Net: net9131                               
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 5  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  |                                           
                                           |                                           
Net: net17400                              |Net: net17400                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_2/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_4/C = 1  |                                           
                                           |                                           
Net: net8402                               |Net: net8402                               
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai31_4/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_2/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_2/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_4/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
                                           |                                           
Net: net8941                               |Net: net8941                               
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 6  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 4  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 3    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 3    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 8  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 5     |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 5   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 5     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  |                                           
                                           |                                           
Net: net20963                              |Net: net20963                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 13  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 7  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 7  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 8   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 11 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 4 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 9   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 6   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 9  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 8  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 4     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 6     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |                                           
                                           |                                           
Net: net9757                               |Net: net9757                               
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 4     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 12 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 8   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 7   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_8/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 6   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 6     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 4    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_4/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_4/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 4     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 1    |                                           
                                           |                                           
Net: net9741                               |Net: net9741                               
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 9   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 4   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_4/A3 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_4/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
                                           |                                           
Net: net6179                               |Net: net6179                               
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 5    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 3  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 28 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 8  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 16  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 6 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 12   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 8   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 4     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 12 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 25  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 5     |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 6   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 4     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 7  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 7  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 4     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 7  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 7  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 6 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 7   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 13 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 4 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_12/Z = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 7  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_2/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 7  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 5     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_2/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |                                           
                                           |                                           
Net: net20299                              |Net: net20299                              
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 5   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 6  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 5   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 4  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 10 |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/ZN = 1  |                                           
                                           |                                           
Net: net22087                              |Net: net22087                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 6  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 5   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 4  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 2    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 11  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_4/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 4     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__inv_2/ZN = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_4/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__inv_2/I = 1     |                                           
                                           |                                           
Net: net22017                              |Net: net22017                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
                                           |                                           
Net: net18538                              |Net: net18538                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_2/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
                                           |                                           
Net: net7316                               |Net: net7316                               
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_2/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 2  |                                           
                                           |                                           
Net: net21448                              |Net: net21448                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 4   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 2    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[50\]. |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
                                           |                                           
Net: net19578                              |Net: net19578                              
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 2    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
                                           |                                           
Net: net22030                              |Net: net22030                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    |                                           
                                           |                                           
Net: net19080                              |Net: net19080                              
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |                                           
                                           |                                           
Net: net14697                              |Net: net14697                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
                                           |                                           
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  |                                           
                                           |                                           
Net: net15698                              |Net: net15698                              
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
                                           |                                           
Net: i_chip_core.core4.b.gen_square\[37\]. |Net: \i_chip_core.core7.b.gen_square[33].s 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_4/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[13\]. |Net: \i_chip_core.core2.b.arb_data_out[6]_ 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 10 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_4/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
                                           |                                           
Net: net19758                              |Net: net19758                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
                                           |                                           
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
                                           |                                           
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
                                           |                                           
Net: i_chip_core.core5.b.gen_square\[38\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
                                           |                                           
Net: net22113                              |Net: net22113                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 2    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
                                           |                                           
Net: net21609                              |Net: net21609                              
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 2    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[51\]. |Net: \i_chip_core.core2.b.arb_data_out[6]_ 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
                                           |                                           
Net: net9733                               |Net: net9733                               
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
                                           |                                           
Net: net16087                              |Net: net16087                              
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 3 |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
                                           |                                           
Net: net11054                              |Net: net11054                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  |                                           
                                           |                                           
Net: net19576                              |Net: net19576                              
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   |                                           
                                           |                                           
Net: net19724                              |Net: net19724                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 4   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
                                           |                                           
Net: net9465                               |Net: net9465                               
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 4   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 8   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 4     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_2/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   |                                           
                                           |                                           
Net: net19885                              |Net: net19885                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 2    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 7   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 4    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyc_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyc_1/Z = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 5     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |                                           
                                           |                                           
Net: net22276                              |Net: net22276                              
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 8   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 4   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 5 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 3    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 10 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
                                           |                                           
Net: net8481                               |Net: net8481                               
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 8  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 4  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 4   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_4/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
                                           |                                           
Net: net22047                              |Net: net22047                              
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 2    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
                                           |                                           
Net: net21459                              |Net: net21459                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 3    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
                                           |                                           
Net: net19320                              |Net: net19320                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 7   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
                                           |                                           
Net: i_chip_core.core7.b.gen_square\[34\]. |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
                                           |                                           
Net: net19865                              |Net: net19865                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 3  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
                                           |                                           
Net: net8365                               |Net: net8365                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 11 |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 4   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 6   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 9  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 4     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 5   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
                                           |                                           
Net: net22149                              |Net: net22149                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 2  |                                           
                                           |                                           
Net: net14270                              |Net: net14270                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__antenna/I = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
                                           |                                           
Net: net22334                              |Net: net22334                              
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
                                           |                                           
Net: net8466                               |Net: net8466                               
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
                                           |                                           
Net: net1669                               |Net: net1669                               
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
                                           |                                           
Net: net20302                              |Net: net20302                              
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    |                                           
                                           |                                           
Net: net16797                              |Net: net16797                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__inv_1/ZN = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   |                                           
                                           |                                           
Net: net9334                               |Net: net9334                               
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 4   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 5  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 13  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 25 |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 6 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 7  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 43 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 18    |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 30  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 6   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 17 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 10  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 10  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 10    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 23 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 9  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 7  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 8  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 11   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 5    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 16    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 16    |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 6   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 14 |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 16  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 5   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 9  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 9  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 6   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 22 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 26 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 5   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 11 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_4/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/B = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 11    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 7 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 8  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 5 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 8  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 7  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 4     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 4 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__inv_2/ZN = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
                                           |                                           
Net: net19543                              |Net: net19543                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 9   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 3  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
                                           |                                           
Net: net20116                              |Net: net20116                              
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 6  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 3     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 5 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A2 = 1 |                                           
                                           |                                           
Net: net20990                              |Net: net20990                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 4   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 5  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_2/A2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 4     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 4 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_12/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
                                           |                                           
Net: net22161                              |Net: net22161                              
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 3  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 6   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 2    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__inv_1/ZN = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
                                           |                                           
Net: net18738                              |Net: net18738                              
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 8  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 8   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 5   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_4/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
                                           |                                           
Net: net8219                               |Net: net8219                               
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 10 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 5  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 4   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 7  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 7   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 5    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 7   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 6   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 12  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 4    |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |                                           
                                           |                                           
Net: net935                                |Net: net935                                
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 41 |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 5     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 27  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 5 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 16  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 7  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 19    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 16 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 11 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 5   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 14 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 9  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 8   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 3    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 14 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 14 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 10  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 5     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 11   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 3    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 13  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_4/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 7 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 13 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 9  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 11    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 13 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 9  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 7    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 5   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 5   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_4/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_4/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_4/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_4/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 5     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 |                                           
                                           |                                           
Net: net9848                               |Net: net9848                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 7  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 5   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 6  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 11  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 8   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 7  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_4/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_4/ZN = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 5    |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 19 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 12 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 22  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 4    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 4     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 4     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 7     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 6   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 7  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 10 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 4 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 25 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_4/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 6    |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_8/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 4 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 11    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_2/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_2/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__inv_2/ZN = 1    |                                           
                                           |                                           
Net: net18114                              |Net: net18114                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 4  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 5  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 3    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 3     |                                           
                                           |                                           
Net: net7743                               |Net: net7743                               
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 4 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 3 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 4     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 8  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 6   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 3    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
                                           |                                           
Net: net19839                              |Net: net19839                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 6  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
                                           |                                           
Net: net13206                              |Net: net13206                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_4/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
                                           |                                           
Net: net17875                              |Net: net17875                              
  gf180mcu_fd_sc_mcu9t5v0__inv_3/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__inv_3/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__and2_4/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_4/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A4 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__inv_3/ZN = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_4/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 8  |                                           
                                           |                                           
Net: net9773                               |Net: net9773                               
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 3     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__or4_4/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_2/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_2/A3 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_2/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
                                           |                                           
Net: net22321                              |Net: net22321                              
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
                                           |                                           
Net: net21560                              |Net: net21560                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 3   |                                           
                                           |                                           
Net: net8356                               |Net: net8356                               
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 4     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 3     
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_4/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_4/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |                                           
                                           |                                           
Net: net19583                              |Net: net19583                              
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 4   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
                                           |                                           
Net: net10993                              |Net: net10993                              
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/ZN = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
                                           |                                           
Net: net3243                               |Net: net3243                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |                                           
                                           |                                           
Net: net4067                               |Net: net4067                               
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 3  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 5 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 7  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 6   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/Z = 1     |                                           
                                           |                                           
Net: net9365                               |Net: net9365                               
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 6   |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__inv_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__inv_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 5   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_4/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
                                           |                                           
Net: net21753                              |Net: net21753                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
                                           |                                           
Net: net9814                               |Net: net9814                               
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 4 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 4     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/B1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
                                           |                                           
Net: net22054                              |Net: net22054                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 2    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
                                           |                                           
Net: net20925                              |Net: net20925                              
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 4 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
                                           |                                           
Net: net8020                               |Net: net8020                               
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 7  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
                                           |                                           
Net: net8351                               |Net: net8351                               
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_3/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_2/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
                                           |                                           
Net: net4908                               |Net: net4908                               
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 2 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 7   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_4/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_4/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 4    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
                                           |                                           
Net: net8715                               |Net: net8715                               
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 4 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 3 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |                                           
                                           |                                           
Net: net16795                              |Net: net16795                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
                                           |                                           
Net: net20750                              |Net: net20750                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
                                           |                                           
Net: net19777                              |Net: net19777                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 3  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyc_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyc_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
                                           |                                           
Net: net8278                               |Net: net8278                               
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
                                           |                                           
Net: net20317                              |Net: net20317                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
                                           |                                           
Net: net19513                              |Net: net19513                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
                                           |                                           
Net: i_chip_core.core0.b.gen_square\[60\]. |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
                                           |                                           
Net: net9343                               |Net: net9343                               
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 5  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 6     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 11  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 8   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 7  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 10 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 4    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 3    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 10    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 3    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 6 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 4     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 6   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
                                           |                                           
Net: net8207                               |Net: net8207                               
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 6  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 4 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 7     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 5   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 16 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_4/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 7  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 8 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 7  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 6     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |                                           
                                           |                                           
Net: net8778                               |Net: net8778                               
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 7   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 8  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 7  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 10 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 15  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 4 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 9  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 13  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 5   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 5   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_4/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 8  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 7  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 3    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__antenna/I = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_4/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 5     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_2/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_4/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_4/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
                                           |                                           
Net: net21919                              |Net: net21919                              
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_2/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_2/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 3  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_4/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_2/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
                                           |                                           
Net: net19737                              |Net: net19737                              
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_4/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 8   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 7   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 2    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyc_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyc_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
                                           |                                           
Net: net8130                               |Net: net8130                               
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyc_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
                                           |                                           
Net: net9846                               |Net: net9846                               
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 6   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 3  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 3  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 7  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 6     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 8   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 5 |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 10  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 7  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 4 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 18 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 4     |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 4 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 10    |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 6   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 7  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_2/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_4/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_2/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_4/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_2/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_2/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_2/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_2/A3 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/ZN = 1  |                                           
                                           |                                           
Net: net8010                               |Net: net8010                               
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 3 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 5  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 5  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 9  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 6 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 6   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyc_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   |                                           
                                           |                                           
Net: net9739                               |Net: net9739                               
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 4   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 3     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 8   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 5   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 6  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 5 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 6   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
                                           |                                           
Net: net9797                               |Net: net9797                               
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 7   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_4/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
                                           |                                           
Net: net9477                               |Net: net9477                               
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 4    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 6   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
                                           |                                           
Net: net16880                              |Net: net16880                              
  gf180mcu_fd_sc_mcu9t5v0__oai222_2/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A4 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
                                           |                                           
Net: net5891                               |Net: net5891                               
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 3    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 5   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |                                           
                                           |                                           
Net: net9447                               |Net: net9447                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 5   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
                                           |                                           
Net: net8543                               |Net: net8543                               
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 4 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
                                           |                                           
Net: net8422                               |Net: net8422                               
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 8   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
                                           |                                           
Net: net22314                              |Net: net22314                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 5  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 6   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 6   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_2/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
                                           |                                           
Net: net6508                               |Net: net6508                               
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 5  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 9  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 8  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
                                           |                                           
Net: net17295                              |Net: net17295                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 7  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 8  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 7   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 6     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
                                           |                                           
Net: net22142                              |Net: net22142                              
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 3   |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 7  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_2/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    |                                           
                                           |                                           
Net: net20139                              |Net: net20139                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 6  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
                                           |                                           
Net: net22091                              |Net: net22091                              
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 4  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 2    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 3     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 3 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B3 = 1  |                                           
                                           |                                           
Net: net18149                              |Net: net18149                              
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 5   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
                                           |                                           
Net: i_chip_core.core2.b.gen_square\[14\]. |Net: \i_chip_core.core3.b.gen_square[27].s 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 3    |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  |                                           
                                           |                                           
Net: net21270                              |Net: net21270                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
                                           |                                           
Net: net22178                              |Net: net22178                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
                                           |                                           
Net: net9460                               |Net: net9460                               
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 9  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_4/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 4     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_2/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_2/A3 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  |                                           
                                           |                                           
Net: net20433                              |Net: net20433                              
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 3  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 3  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 6   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 5  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 2     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 4 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
                                           |                                           
Net: net19726                              |Net: net19726                              
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 3  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 6  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__inv_2/ZN = 1    |                                           
                                           |                                           
Net: net19515                              |Net: net19515                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 2  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |                                           
                                           |                                           
Net: net20381                              |Net: net20381                              
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 3  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 2    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 2   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 2 |                                           
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 4   |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  |                                           
  gf180mcu_fd_sc_mcu9t5v0__or4_1/Z = 1     |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |                                           
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 |                                           
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[44].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[3].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[15].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[52].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[33].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[34].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[16].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[15].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[15].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[30].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[30].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[6]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[48].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net13291                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[38].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[34].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[45].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[34].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[15].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[7].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[35].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[35].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net10938                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: net7490                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[15].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[6]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[38].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[11].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[3].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net12919                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[45].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[53].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[16].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[60].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[60].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[2]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[48].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[5].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[60].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[7].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[44].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[52].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[52].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[5].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[52].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[33].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[21].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[7].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[62].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[25].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[25].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[41].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[15].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[21].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[44].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[45].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[16].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[6]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[42].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[45].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[25].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[7].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[45].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: net4841                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[5].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[6]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[42].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[61].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[2]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[21].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[10].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[43].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[35].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[33].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[25].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[22].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[41].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[34].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[6]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[38].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[5].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[62].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[34].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[61].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[15].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[43].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[26].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[52].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[15].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[7].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[38].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[2].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[30].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[43].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: net10405                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net10046                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: net6204                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[52].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[43].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[60].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: net10459                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |                                           
(no matching net)                          |Net: net12814                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: net15424                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[33].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[35].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net11686                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: net2753                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net18592                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_2/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_2/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[16].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_2/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net16999                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[34].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: net6760                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: net12588                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: net12258                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_4/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net13001                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: net21305                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net20209                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[2].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_4/B2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_4/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_4/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: net18628                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_4/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: net10578                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_4/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_4/B1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: net12472                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 1  
                                           |                                           
(no matching net)                          |Net: net11975                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: net15091                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_4/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_2/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_2/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_2/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: net2888                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_2/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |                                           
(no matching net)                          |Net: net13895                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: net14018                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: net15657                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 5 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_2/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[44].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_2/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_2/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[44].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_2/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
                                           |                                           
(no matching net)                          |Net: net16656                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net10801                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[48].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B3 = 1  
                                           |                                           
(no matching net)                          |Net: net15465                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 5  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net15630                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[44].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_2/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_4/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_2/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_4/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: net9711                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[16].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[10].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |                                           
(no matching net)                          |Net: net22212                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net17591                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: net17580                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
                                           |                                           
(no matching net)                          |Net: net10855                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[10].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_4/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[44].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: net15994                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: net22386                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_4/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__inv_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_4/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net16885                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_3/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net17596                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: net16038                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[6]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net15068                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[49].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[21].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[21].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net22221                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net15982                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net16968                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net15527                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[6]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: net13362                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net13307                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_4/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: net12613                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: net11260                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: net16909                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 3     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: net16970                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[32].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 2    
                                           |                                           
(no matching net)                          |Net: net13527                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[30].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[30].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[32].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: net14905                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[33].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[33].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net16937                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: net16884                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[47].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__antenna/I = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[48].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net16029                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: net13407                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[52].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[42].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: net16023                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[5].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: net16089                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net13878                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[5].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[62].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: net13478                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_4/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: net13378                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: net11253                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |                                           
(no matching net)                          |Net: net13559                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[6]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_4/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[15].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: net17534                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_4/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 2 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__inv_1/ZN = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: net15379                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net21558                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[26].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__inv_4/ZN = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_4/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[60].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[11].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 
                                           |                                           
(no matching net)                          |Net: net16723                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net16370                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[45].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net14588                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[7].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[34].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[2]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net15778                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net16648                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[11].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/B = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[25].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[15].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[15].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[45].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[17].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: net9126                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: net4791                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[25].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[34].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: net10832                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: net4980                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: net10742                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: net16145                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[26].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[28].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[2].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[2].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net8764                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: net15706                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[34].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net12803                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: net15772                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |                                           
(no matching net)                          |Net: net17437                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: net10834                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[60].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: net14552                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[45].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[45].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: net13952                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[16].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net15757                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net15711                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[33].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[33].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net12609                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net17432                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: net9522                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: net14424                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[44].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: net14426                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net17381                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_2/Z = 1    
                                           |                                           
(no matching net)                          |Net: net4868                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: net14442                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 2 
                                           |                                           
(no matching net)                          |Net: net17416                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_4/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net14440                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |                                           
(no matching net)                          |Net: net15584                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[44].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_4/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_4/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net14483                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 3   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: net20405                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[7].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: net20686                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: net14490                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_4/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: net8270                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[49].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[35].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[44].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net15585                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net20142                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_4/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[42].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: net12586                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: net16596                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_3/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[44].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: net10560                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_2/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net14510                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: net8453                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: net16638                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: net10494                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: net15526                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[22].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[7].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net17317                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_4/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |                                           
(no matching net)                          |Net: net17312                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[45].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net14239                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net14255                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
                                           |                                           
(no matching net)                          |Net: net12483                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[58].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net15496                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[16].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: net17267                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/B = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[30].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net16522                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net16439                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[47].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net17297                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[62].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: net17282                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: net17306                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[16].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 2 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[3].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[60].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[62].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[21].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net15513                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net12397                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: net16540                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: net19705                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[62].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A4 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A3 = 1    
                                           |                                           
(no matching net)                          |Net: net15523                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net16240                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_12/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[41].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net12479                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 2 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[50].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[60].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net14301                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 4 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[58].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net14423                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[62].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__inv_2/ZN = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[62].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[7].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[7].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: net4753                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_4/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B2 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[38].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: net15403                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net16239                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[62].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: net15280                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: net19384                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_4/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_4/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net10214                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: net16379                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |                                           
(no matching net)                          |Net: net15381                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net19206                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[30].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[35].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[35].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: net15359                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[45].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[52].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: net14045                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net12246                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_2/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[16].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  
                                           |                                           
(no matching net)                          |Net: net10159                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net12279                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_2/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[43].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[33].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: net16414                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 3     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_4/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_4/ZN = 1   
                                           |                                           
(no matching net)                          |Net: net16348                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 4     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_2/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: net15341                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: net13889                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net13937                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 2  
                                           |                                           
(no matching net)                          |Net: net4250                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[26].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: net12648                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_4/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[19].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: net11271                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[38].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net12184                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net9743                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[6]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net17132                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[58].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B2 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[6]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net18668                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: net17123                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[14].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_2/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: net10006                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: net9725                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net17147                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: net18813                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[19].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[21].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: net12018                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[6]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net16250                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_12/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[26].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[28].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[44].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__inv_1/ZN = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |                                           
(no matching net)                          |Net: net9768                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net16231                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[30].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: net15305                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[42].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 2 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net7662                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A3 = 2    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A4 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |                                           
(no matching net)                          |Net: net15268                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net15249                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[52].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_2/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[63].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 4   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__inv_2/ZN = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_12/I = 1    
                                           |                                           
(no matching net)                          |Net: net13963                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: net9791                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net12043                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__inv_1/ZN = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[7].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: net18799                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net16238                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_2/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: net12095                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: net9793                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__antenna/I = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[53].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[17].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__inv_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[11].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: net11730                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[16].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: net7832                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[32].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[48].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[16].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net13745                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[19].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net15225                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net15184                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[52].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net17054                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net11703                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net16116                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: net17981                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[53].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net15170                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_2/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net11972                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 4   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: net13416                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 4   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[36].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[60].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[60].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net11314                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[48].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[18].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[26].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[36].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[17].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[3].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net15478                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: net9150                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net22312                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[60].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[43].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[11].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net13235                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 4   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net20889                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net13686                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[63].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |                                           
(no matching net)                          |Net: net20736                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[54].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[14].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net20817                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[28].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[62].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__inv_3/ZN = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_4/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[18].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[26].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[26].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[28].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[45].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[11].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: net20699                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: net20774                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[54].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[52].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net20208                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__antenna/I = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net20524                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[28].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[62].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net10683                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[61].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_4/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__inv_3/ZN = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_4/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[43].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[36].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[51].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[52].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[7].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__antenna/I = 1   
                                           |                                           
(no matching net)                          |Net: net19682                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[45].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |                                           
(no matching net)                          |Net: net19720                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: net19792                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_12/Z = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[43].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: net19730                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
                                           |                                           
(no matching net)                          |Net: net17351                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
                                           |                                           
(no matching net)                          |Net: net19795                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[54].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: net19831                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net10343                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[28].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[54].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 3    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: net19863                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[14].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[22].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[15].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[18].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net17199                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
                                           |                                           
(no matching net)                          |Net: net14117                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[7].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_4/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 1 
                                           |                                           
(no matching net)                          |Net: net19418                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_4/ZN = 1   
                                           |                                           
(no matching net)                          |Net: net18495                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[58].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[58].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A4 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[34].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[35].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_4/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net12111                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: net7641                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net18651                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[2].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[32].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_4/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_4/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[42].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |                                           
(no matching net)                          |Net: net17862                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_4/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__inv_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_4/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_3/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[11].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_4/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_4/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[20].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net7449                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[34].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[48].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[53].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net13685                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[49].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 5    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[52].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 5    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   
                                           |                                           
(no matching net)                          |Net: net19245                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[36].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: net16441                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net20171                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: net20210                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: net22107                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[54].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[2].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |                                           
(no matching net)                          |Net: net18721                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net19803                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net9361                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_4/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__inv_1/ZN = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_4/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: net13356                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 4 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[49].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: net1360                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[28].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[7].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[25].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net17617                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: net15971                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: net22205                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 1 
                                           |                                           
(no matching net)                          |Net: net15985                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 5  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net14437                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: net13330                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: net11280                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net15039                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[5].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[50].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_4/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/B = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |                                           
(no matching net)                          |Net: net11437                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[21].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: net13337                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: net16922                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[47].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[3].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[3].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: net11478                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
                                           |                                           
(no matching net)                          |Net: net11378                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net11218                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 4   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: net22058                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[52].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net16420                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net11308                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 4 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[61].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net22313                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net17612                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[50].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[32].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net10525                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: net17861                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_4/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     
                                           |                                           
(no matching net)                          |Net: net21731                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
                                           |                                           
(no matching net)                          |Net: net17491                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 5  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_4/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net15891                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[62].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net17476                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[18].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[50].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_4/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A4 = 1  
                                           |                                           
(no matching net)                          |Net: net13195                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[0].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 5  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[48].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: net11313                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_4/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[62].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[21].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |                                           
(no matching net)                          |Net: net15963                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_4/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_4/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[35].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net15733                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[43].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_4/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: net12931                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[35].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_4/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net16735                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[16].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[6]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[2]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net6574                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net15705                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[54].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[11].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net8679                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: net14584                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[21].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[26].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[45].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net8744                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_4/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_4/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_4/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[30].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: net15770                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net20734                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 3    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[62].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_2/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[45].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[45].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/C = 1  
                                           |                                           
(no matching net)                          |Net: net15707                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[53].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net14612                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net20815                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net14417                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net6445                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     
                                           |                                           
(no matching net)                          |Net: net15623                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net8545                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: net10635                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net20095                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net10656                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net10653                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net15629                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_4/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[44].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net20215                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[28].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[0].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: net22246                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 5   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A4 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[18].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: net20301                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[25].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |                                           
(no matching net)                          |Net: net10614                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_4/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_4/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_4/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[35].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_4/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net10562                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_4/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: net15638                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |                                           
(no matching net)                          |Net: net12689                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[43].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[35].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_4/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: net17371                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: net10524                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: net20137                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[14].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net16433                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 5  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net10304                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
                                           |                                           
(no matching net)                          |Net: net15510                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net19806                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: net14320                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[45].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: net16910                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[43].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[22].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: net19775                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net19760                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net19757                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net19734                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net17325                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[62].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: net19472                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[11].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_4/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: net19874                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net17337                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[18].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[19].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[10].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net12501                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: net8105                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net16453                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 5   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net18806                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: net16463                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net19763                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[44].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[43].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: net6208                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net10327                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[60].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[62].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.arb_data_out[6]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: net17249                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: net17250                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net10134                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |                                           
(no matching net)                          |Net: net14304                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net15314                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net16412                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net16363                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net10157                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: net19318                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[22].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net12406                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_4/A3 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_2/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |                                           
(no matching net)                          |Net: net10169                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net15347                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 4   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_4/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net19378                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_4/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_4/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net17236                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A3 = 1   
                                           |                                           
(no matching net)                          |Net: net12094                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_4/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[61].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |                                           
(no matching net)                          |Net: net12135                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 4 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net17113                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 2 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: net18661                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[44].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: net17129                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[43].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[58].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[6]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: net15302                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |                                           
(no matching net)                          |Net: net18825                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |                                           
(no matching net)                          |Net: net17096                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: net17167                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net18716                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net18816                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: net18811                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[14].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[15].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[19].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A2 = 1    
                                           |                                           
(no matching net)                          |Net: net18804                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: net12031                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__inv_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[2].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 4   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net17154                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[35].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/B1 = 1  
                                           |  nfet_05v0/(1|3) = 1                      
                                           |  pfet_05v0/(1|3) = 1                      
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net13972                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A3 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net17127                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[48].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net9804                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[53].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: net18413                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__antenna/I = 1   
                                           |                                           
(no matching net)                          |Net: net13986                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/B1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net18800                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[38].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__inv_2/ZN = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[17].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: net18211                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[11].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net11855                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net11853                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_2/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[41].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[22].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net4048                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[16].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__inv_3/ZN = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net17867                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net13736                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net17979                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[24].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net18111                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[28].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: net11252                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[41].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[2].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[41].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[43].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[24].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[33].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__inv_1/ZN = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net16022                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[34].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net22238                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net13580                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net22206                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[15].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__inv_2/ZN = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_2/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[3].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_2/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net22408                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net17133                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net16990                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: net11438                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: net9229                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net9211                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 2    
                                           |                                           
(no matching net)                          |Net: net13285                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[10].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[50].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_4/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[24].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: net21926                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_4/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[26].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net16907                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[47].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net11477                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net22004                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net21634                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net8983                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: net21263                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[44].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: net15307                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_4/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net11142                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[21].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_4/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[30].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[41].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: net14026                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net20878                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[25].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_4/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[45].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[45].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[3].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: net12069                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[2]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: net6666                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net20677                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net8688                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net20962                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[19].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: net12427                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[26].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: net10833                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[25].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[43].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net20796                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net12818                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_4/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
                                           |                                           
(no matching net)                          |Net: net12392                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: net16650                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: net9813                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net20315                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
                                           |                                           
(no matching net)                          |Net: net10696                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net20274                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: net20260                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[48].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: net20135                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net20117                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 3  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_4/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[41].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |                                           
(no matching net)                          |Net: net20144                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net20147                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[19].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: net20431                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[50].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[49].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[35].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: net20262                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net18633                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net20088                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |                                           
(no matching net)                          |Net: net15660                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 5 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[50].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net20120                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net20300                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net15481                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_4/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net20438                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net20138                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net11690                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: net12070                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[21].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net14637                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[53].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[53].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[16].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: net19762                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[6]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[38].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net22018                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[44].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net19474                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[16].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__inv_2/ZN = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[19].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net6164                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[7].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_4/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |                                           
(no matching net)                          |Net: net10427                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[52].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net19542                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[63].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net8019                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[0].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_2/A4 = 1   
                                           |                                           
(no matching net)                          |Net: net13906                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net19291                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[7].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[30].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: net12188                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[43].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: net18670                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net18677                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net18680                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net18490                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |                                           
(no matching net)                          |Net: net18542                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net7559                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: net18502                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: net18899                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_4/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[16].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: net18828                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 2 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[39].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net18655                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net18652                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[45].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net17130                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |                                           
(no matching net)                          |Net: net18630                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net18626                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net18617                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net18614                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net18621                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[58].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: net12104                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_2/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net18546                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |                                           
(no matching net)                          |Net: net18550                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net18596                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[17].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |                                           
(no matching net)                          |Net: net18429                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_4/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_4/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[39].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_4/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__inv_2/ZN = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: net9735                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[28].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net7706                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: net7646                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net13933                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: net18604                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net18717                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net18591                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net18580                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net7576                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net4717                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: net18549                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[53].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net18522                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net5893                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_4/A4 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net17929                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net18213                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[10].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[11].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[34].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: net11781                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[54].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net18071                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: net12179                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[33].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_4/A4 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[38].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[45].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[28].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[30].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[16].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[7].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[6]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[14].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[38].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[52].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net13535                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: net14492                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
                                           |                                           
(no matching net)                          |Net: net15278                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[48].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[43].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: net5142                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[25].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[2].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[14].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[16].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[28].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
                                           |                                           
(no matching net)                          |Net: net14457                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[49].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[34].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[38].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[48].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net14275                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: net13400                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[61].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[11].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: net5859                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[7].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[44].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[30].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[45].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[41].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[48].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[41].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[25].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[39].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[25].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[34].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[22].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net7059                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[3].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net5671                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[6]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: net15288                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: net12027                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |                                           
(no matching net)                          |Net: net15046                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: net14892                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[38].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net12635                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[60].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[34].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[26].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[38].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[16].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: net10910                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net1013                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net11963                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[3].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[30].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[52].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net5890                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[34].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[21].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net12148                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net13950                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[34].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[6]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[28].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[28].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[16].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: net7722                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[5].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[35].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[32].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[33].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[41].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[3].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[38].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 2 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[30].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[6]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[60].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
                                           |                                           
(no matching net)                          |Net: net14547                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 2  
                                           |                                           
(no matching net)                          |Net: net10921                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: net11978                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[44].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[16].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[34].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_2/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 2  
                                           |                                           
(no matching net)                          |Net: net14830                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[25].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[52].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |                                           
(no matching net)                          |Net: net13248                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[6]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[53].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[43].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[38].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: net17356                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[2].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: net15070                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: net10736                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[17].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[3].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: net6752                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[45].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: net16020                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[7].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[33].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[34].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[11].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net10680                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: net12552                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: net7970                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[25].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[33].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[3].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[5].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[48].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[0].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: net10430                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[5].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net16731                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[2]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[6]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[11].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[44].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: net9268                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: net16719                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_2/C1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[16].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_2/C1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: net7567                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: net12176                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: net16194                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[62].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.arb_data_out[6]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[2].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[38].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: net12695                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: net15564                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[44].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[48].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[61].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[26].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: net9843                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: net15425                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[44].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[62].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[43].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |                                           
(no matching net)                          |Net: net3449                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net15074                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net14896                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: net13247                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: net12019                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[7].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[61].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net11248                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: net8732                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: net10123                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[2].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[5].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[11].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[30].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__inv_3/ZN = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_4/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net14014                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: net14907                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: net14350                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: net13997                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net11984                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: net12898                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[6]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net4209                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: net7510                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: net14456                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: net19883                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net20232                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: net20212                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[16].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: net2804                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[33].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[51].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net15200                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[43].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[16].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: net12592                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net10526                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: net12730                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: net8006                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |                                           
(no matching net)                          |Net: net14012                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net13949                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net12064                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net10319                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: net10752                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[26].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[19].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net12036                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: net11467                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[22].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[15].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: net7000                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[62].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[14].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[6]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: net19167                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[10].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net14888                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[43].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: net12182                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[2].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[5].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[5].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[5].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[5].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A4 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_4/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net14893                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[3].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_4/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[52].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: net11167                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_2/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_2/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[19].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: net17377                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: net8961                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_2/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[32].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[58].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[58].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: net13183                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net5219                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net10917                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 2  
                                           |                                           
(no matching net)                          |Net: net5170                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: net21302                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[30].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |                                           
(no matching net)                          |Net: net12961                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[25].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[6]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[6]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[11].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: net15744                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net5080                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[2].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[35].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_4/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net5074                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_4/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[44].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_4/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[2].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_4/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__inv_12/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[34].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[34].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[34].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[34].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[34].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: net10729                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: net12790                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_4/ZN = 1   
                                           |                                           
(no matching net)                          |Net: net14581                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_4/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: net12815                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_3/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net503                                
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net16668                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: net14013                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A4 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: net12899                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_2/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: net15688                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_4/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[33].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net12583                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_4/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net10701                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: net10659                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net14570                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_4/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: net18568                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: net14360                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/B1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: net12585                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[42].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: net15626                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_4/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net15691                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_4/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 2    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: net15627                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: net10538                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net12615                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__inv_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_4/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: net12763                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net14418                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: net20236                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[25].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_3/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: net12751                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net20087                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net12576                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: net14397                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyc_1/I = 1    
                                           |                                           
(no matching net)                          |Net: net16117                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_4/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net12399                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: net12398                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyc_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__inv_1/ZN = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[48].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[43].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyc_1/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: net12544                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyc_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |                                           
(no matching net)                          |Net: net14375                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_3/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyc_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[2].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 1  
                                           |                                           
(no matching net)                          |Net: net14346                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: net12402                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyc_1/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: net12455                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyc_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: net14251                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net14281                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[62].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net19286                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyc_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[7].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_4/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_4/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 
                                           |                                           
(no matching net)                          |Net: net10413                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[60].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net6172                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |                                           
(no matching net)                          |Net: net3161                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: net1131                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net1129                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_4/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |                                           
(no matching net)                          |Net: net12291                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 7  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A2 = 1    
                                           |                                           
(no matching net)                          |Net: net14100                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: net14202                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: net12212                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net14008                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 4   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net20216                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: net14010                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_4/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_4/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net16300                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[6]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_4/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[10].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_12/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 3    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 5   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[48].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net19189                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: net9838                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
                                           |                                           
(no matching net)                          |Net: net19190                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[21].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[21].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A3 = 1  
                                           |                                           
(no matching net)                          |Net: net19493                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net13914                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net19159                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |                                           
(no matching net)                          |Net: net7658                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_2/C1 = 1 
                                           |                                           
(no matching net)                          |Net: net16267                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_2/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: net13968                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_4/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[7].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: net13951                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: net16242                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net16258                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net15283                              
                                           |  nfet_05v0/2 = 1                          
                                           |  pfet_05v0/2 = 1                          
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/B1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: net5904                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: net13930                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_2/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_2/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: net7623                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: net16241                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[28].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: net12015                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net12154                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_4/A1 = 1    
                                           |                                           
(no matching net)                          |Net: net13897                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: net11990                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: net12068                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: net12151                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net5829                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: net18597                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[42].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: net18594                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net9748                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[52].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[17].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net16193                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[17].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[52].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: net11793                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__inv_1/ZN = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net16110                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 4    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[49].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 4    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 4    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[33].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[30].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[45].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 2    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[41].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net13328                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[41].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[28].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[3].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[16].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: net15393                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[10].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[43].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: net15272                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[34].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 2 
                                           |                                           
(no matching net)                          |Net: net12488                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[33].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 2 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[7].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net13737                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[44].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[44].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net16557                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[41].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[17].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net16351                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[49].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net19450                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[22].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net16435                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[5].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: net11288                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[50].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[11].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[52].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net16255                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: net16224                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[22].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net11961                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: net10409                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[58].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: net16983                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net16973                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[11].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[38].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[63].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[11].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[17].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[30].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[5].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net16932                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net15632                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[48].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 2 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 2 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net15377                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[54].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[58].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: net6211                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: net16725                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net6372                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[44].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net14122                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net20821                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: net8126                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net12795                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[11].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[16].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[33].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[15].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_2/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_4/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_4/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net15980                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: net16998                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net13576                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: net14848                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: net17584                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: net11481                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[28].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net9222                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[3].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[2]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A4 = 1   
                                           |                                           
(no matching net)                          |Net: net16015                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[0].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_2/C1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[0].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[0].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[0].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net13533                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net13279                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[10].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net16967                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: net11451                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[19].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[38].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[32].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[5].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 2 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: net15992                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[30].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[30].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[30].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[32].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net15977                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[39].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net13567                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: net13442                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[61].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/B1 = 1 
                                           |                                           
(no matching net)                          |Net: net11473                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C1 = 1 
                                           |                                           
(no matching net)                          |Net: net9267                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: net7075                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: net5365                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net21802                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[52].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[52].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[52].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[54].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[54].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: net13441                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net16007                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[35].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 3 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net7134                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net7064                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |                                           
(no matching net)                          |Net: net11237                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[54].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net11362                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net14844                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: net14908                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: net14729                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net13203                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[0].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__inv_4/ZN = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: net16823                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: net10948                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: net15929                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[38].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net5327                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 2 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[15].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 4   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |                                           
(no matching net)                          |Net: net10935                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[26].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[26].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[26].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 2 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[58].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: net13072                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[54].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 5  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[2]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 4   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[25].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 5  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: net13095                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_4/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: net14835                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[19].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[32].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[32].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[43].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_4/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[58].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: net11129                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net10971                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[58].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: net15831                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[5].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[41].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net15872                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__inv_1/ZN = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[34].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: net14709                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: net11130                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[30].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net11176                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: net22172                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: net13064                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net10900                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: net3493                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: net14629                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__antenna/I = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net12942                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_12/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: net16659                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[3].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[15].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_4/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__inv_2/ZN = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[19].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net16736                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: net13660                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: net10841                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[6]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[6]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[25].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[11].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[33].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |                                           
(no matching net)                          |Net: net15702                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_4/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[45].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_2/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[34].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: net12844                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[30].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[15].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[25].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[18].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[25].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_4/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net16726                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net16738                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net16578                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net15792                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net10831                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[2].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[2].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net14555                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_4/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[30].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_4/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_4/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_2/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[30].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: net12794                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[34].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[34].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net15741                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_2/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: net10797                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 2  
                                           |                                           
(no matching net)                          |Net: net14589                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[2].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_4/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A3 = 1    
                                           |                                           
(no matching net)                          |Net: net12791                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[5].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: net14607                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_2/B2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net20606                              
                                           |  nfet_05v0/2 = 1                          
                                           |  pfet_05v0/2 = 1                          
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net15690                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[28].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_2/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: net10697                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[42].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net10636                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[43].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: net3373                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: net15578                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net15573                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net12761                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_4/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 2 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[38].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[35].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_4/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net14459                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: net10555                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C1 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_2/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net12668                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net15622                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: net20101                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |                                           
(no matching net)                          |Net: net15620                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net10686                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: net16576                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net14427                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net19128                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[20].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[36].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[38].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[15].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[41].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net12590                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net10541                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_4/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net15601                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: net8323                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 5  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[42].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[25].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[6]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: net15591                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |                                           
(no matching net)                          |Net: net6416                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[18].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |                                           
(no matching net)                          |Net: net22046                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: net20508                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_4/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__inv_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net16592                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net16581                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[26].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__antenna/I = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[26].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net10642                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[44].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net15588                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[44].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[28].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[34].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[35].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net12704                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net3290                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[42].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[42].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net16613                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net14425                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[44].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net17358                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net16262                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net12685                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
                                           |                                           
(no matching net)                          |Net: net15594                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: net16634                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 4 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net14422                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net8355                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net14439                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[9].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_4/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[20].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net15673                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net10586                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_4/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net8397                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B2 = 2 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net15567                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: net16554                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: net15593                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[44].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_4/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: net14400                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: net14537                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: net10533                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net12688                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[62].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: net15477                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net14252                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: net16479                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |                                           
(no matching net)                          |Net: net15546                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net3182                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net6248                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: net12924                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net15464                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: net6354                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[48].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[45].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: net15466                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net10399                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  
                                           |                                           
(no matching net)                          |Net: net14321                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[58].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[58].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net17331                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net16467                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[30].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: net15499                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net20913                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net12506                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[47].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: net10470                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[44].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |                                           
(no matching net)                          |Net: net6284                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[62].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[60].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net6169                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[17].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[19].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: net12435                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[19].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[25].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net10447                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 3    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[22].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: net10419                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |                                           
(no matching net)                          |Net: net12863                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_2/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: net14267                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[6]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: net10482                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[62].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: net12468                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
                                           |                                           
(no matching net)                          |Net: net16710                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[47].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |                                           
(no matching net)                          |Net: net16494                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[48].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[48].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[48].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: net10344                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: net22176                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[53].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |                                           
(no matching net)                          |Net: net8005                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: net14231                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: net10283                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[41].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[7].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_4/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[28].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net8013                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 3  
                                           |                                           
(no matching net)                          |Net: net15254                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_4/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_2/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C1 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: net15550                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net6180                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: net11876                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: net16352                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net16373                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: net10118                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: net20070                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[10].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_4/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: net16417                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[14].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[16].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_4/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[22].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[7].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[41].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net15210                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net13744                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_4/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: net16390                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[26].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[30].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[63].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[38].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[20].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[52].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[52].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[25].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: net15422                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[59].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[33].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net14091                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_4/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net16360                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net14162                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net12240                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: net16345                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net6079                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_4/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: net13877                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_4/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net13904                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_4/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net13934                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_4/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net13911                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: net20788                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[3].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/B3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[15].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[44].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_4/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net21129                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: net5928                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[44].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net15257                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
                                           |                                           
(no matching net)                          |Net: net16237                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: net9712                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_2/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[6]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[21].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: net20379                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |                                           
(no matching net)                          |Net: net12181                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[6]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[6]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[6]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net17097                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 2 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: net16280                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[14].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net13912                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[15].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net14000                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[19].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 5   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: net15284                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_12/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net18885                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_4/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_4/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_4/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[21].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[24].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[31].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 2   
                                           |                                           
(no matching net)                          |Net: net9790                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: net13892                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A4 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net12010                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_4/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net11877                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[54].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: net11998                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[41].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[44].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: net12063                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net13753                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: net17128                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: net15309                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[52].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |                                           
(no matching net)                          |Net: net22086                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: net11242                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: net14004                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |                                           
(no matching net)                          |Net: net12136                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: net12169                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: net12180                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 3    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |                                           
(no matching net)                          |Net: net20916                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: net5944                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_2/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net15277                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net10027                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net13931                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net17142                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_4/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_4/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  
                                           |                                           
(no matching net)                          |Net: net7593                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_2/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: net12187                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: net5815                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net4248                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: net18684                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: net11995                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: net7534                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 2    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_2/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: net11965                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[49].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
                                           |                                           
(no matching net)                          |Net: net13742                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[19].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[17].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net15197                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[20].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[60].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net15195                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net13672                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net11702                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[41].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[11].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[17].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net15220                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[47].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[32].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: net13741                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net16188                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_3/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[24].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[28].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[52].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[38].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[38].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[38].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[38].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net14909                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |                                           
(no matching net)                          |Net: net16126                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[41].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[41].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: net11728                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[60].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: net5710                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_2/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_4/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_4/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net11282                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: net20854                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__antenna/I = 1   
                                           |                                           
(no matching net)                          |Net: net14256                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net20098                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[3].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[50].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_4/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[50].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net22322                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[6]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[49].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net18070                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net13309                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: net15192                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net11240                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net21993                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net21996                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net22148                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net15973                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 4 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net22390                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__inv_3/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net11676                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: net15974                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net22245                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net15976                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[6].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[3].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[0].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[42].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A2 = 1 
                                           |                                           
(no matching net)                          |Net: net22265                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net11358                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[7].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net14352                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
                                           |                                           
(no matching net)                          |Net: net17601                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net9180                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net14895                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
                                           |                                           
(no matching net)                          |Net: net11197                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net11254                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[32].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[5].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net11239                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: net22051                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net13336                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: net11188                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net21749                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
                                           |                                           
(no matching net)                          |Net: net14700                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.gen_square[18].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: net11700                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 4 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: net14718                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net10955                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: net21158                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 4   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B3 = 1  
                                           |                                           
(no matching net)                          |Net: net20849                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net20685                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net20795                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[45].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: net16691                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 2     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[28].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[28].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[28].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[49].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A3 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_4/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[35].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[25].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[25].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[26].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: net15724                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 4   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net12817                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: net12884                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: net10860                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net20737                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net20852                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[48].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: net10558                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net20271                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net10660                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net12726                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B2 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_2/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_4/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net10531                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 6 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net18112                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[19].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net19997                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net20114                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A3 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_3/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
                                           |                                           
(no matching net)                          |Net: net15607                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net15259                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net20380                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net10552                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net20272                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 6  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: net20297                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net19709                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net8358                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: net20270                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_4/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_4/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net20233                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[44].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_4/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_4/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: net4867                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |                                           
(no matching net)                          |Net: net19884                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net17353                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net19807                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net12412                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_4/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: net19680                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[45].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net14322                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: net19642                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net14250                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 5  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[56].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[50].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[52].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: net19732                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_8/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[60].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[11].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: net10285                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: net19797                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net8200                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net19824                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net17307                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_4/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net19817                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[19].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[1].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: net10355                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[23].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[29].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_2/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[40].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net17264                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[11].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core4.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net19006                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[20].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[15].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net18990                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net18989                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net19295                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net19298                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: net10135                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: net19034                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net15447                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[3].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[44].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net18945                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: net19166                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[27].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: net18106                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[43].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net19078                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[58].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: net8319                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net14955                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: net13929                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net12034                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 4 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net12065                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 4 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net17117                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[46].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net15409                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[34].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[45].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: net5887                               
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: net18615                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__or3_2/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[1]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/B3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net18551                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_4/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.arb_data_out[6]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_4/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[3].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/B1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: net18659                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core3.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: net15319                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[16].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
                                           |                                           
(no matching net)                          |Net: net18753                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
                                           |                                           
(no matching net)                          |Net: net17173                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_2/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 2  
                                           |                                           
(no matching net)                          |Net: net17120                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 2    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |                                           
(no matching net)                          |Net: net18555                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net18719                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net18409                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[52].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[55].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_2/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |                                           
(no matching net)                          |Net: net18528                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: net18523                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_2/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_2/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_4/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[37].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core6.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: net12000                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.arb_data_out[0]_ 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core1.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[13].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: net18210                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
                                           |                                           
(no matching net)                          |Net: net16152                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A1 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net15149                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 3 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 2 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A2 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 4  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[11].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core0.b.gen_square[57].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[4].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[12].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_4/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |                                           
(no matching net)                          |Net: net18190                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.gen_square[8].sq 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[41].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
                                           |                                           
(no matching net)                          |Net: net17849                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__inv_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 3  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_2/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: net17020                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
(no matching net)                          |Net: net18155                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
                                           |                                           
(no matching net)                          |Net: net13729                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 5  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core5.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.gen_square[28].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core7.b.illegal_gf180mcu 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__aoi21_4/ZN = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
                                           |                                           
(no matching net)                          |Net: \i_chip_core.core2.b.gen_square[52].s 
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 6  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
                                           |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
                                           |                                           
(no matching net)                          |Net: net12905                              
                                           |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
                                           |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
                                           |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
                                           |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core3.b.arb_data_out\[1\] |Net: \i_chip_core.core4.b.gen_square[6].sq 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core3.b.arb_data_out\[1\] |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core7.b.gen_square\[29\]. |Net: \i_chip_core.core7.b.gen_square[29].s 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 2 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net13781                              |Net: net13781                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 6  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 6  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core6.b.gen_square\[60\]. |Net: \i_chip_core.core6.b.gen_square[60].s 
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net9486                               |Net: net9486                               
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 3 
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 3 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core6.b.gen_square\[38\]. |Net: \i_chip_core.core6.b.gen_square[38].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net17350                              |Net: net17350                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net15463                              |Net: net15463                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net14029                              |Net: net14029                              
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core3.b.gen_square\[16\]. |Net: \i_chip_core.core3.b.gen_square[16].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.arb_data_out\[0\] |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net15473                              |Net: net15473                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net4824                               |Net: net4824                               
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A2 = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net10800                              |Net: net10800                              
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 2 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net16512                              |Net: net16512                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core6.b.gen_square\[40\]. |Net: \i_chip_core.core6.b.gen_square[40].s 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net14253                              |Net: net14253                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_2/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_2/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net17041                              |Net: net17041                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.gen_square\[60\]. |Net: \i_chip_core.core4.b.gen_square[60].s 
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net14191                              |Net: net14191                              
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.gen_square\[43\]. |Net: \i_chip_core.core4.b.gen_square[43].s 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core2.b.gen_square\[34\]. |Net: \i_chip_core.core2.b.gen_square[34].s 
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B2 = 2 
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net13738                              |Net: net13738                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net17088                              |Net: net17088                              
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core7.b.gen_square\[60\]. |Net: \i_chip_core.core7.b.gen_square[60].s 
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 3 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net18587                              |Net: net18587                              
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net14980                              |Net: net14980                              
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net8073                               |Net: net8073                               
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core2.b.gen_square\[45\]. |Net: \i_chip_core.core2.b.gen_square[45].s 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core3.b.arb_data_out\[0\] |Net: \i_chip_core.core7.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net14911                              |Net: net14911                              
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net14624                              |Net: net14624                              
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 2 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core3.b.gen_square\[45\]. |Net: \i_chip_core.core3.b.gen_square[45].s 
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net9522                               |Net: net10407                              
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core6.b.gen_square\[46\]. |Net: \i_chip_core.core6.b.gen_square[46].s 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai33_4/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_4/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core7.b.gen_square\[60\]. |Net: \i_chip_core.core7.b.gen_square[60].s 
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 3 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core5.b.gen_square\[15\]. |Net: \i_chip_core.core5.b.gen_square[15].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net10263                              |Net: net10263                              
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.gen_square\[2\].s |Net: \i_chip_core.core4.b.gen_square[2].sq 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
  gf180mcu_fd_sc_mcu9t5v0__oai22_2/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_2/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net9525                               |Net: net9525                               
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 2 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net9527                               |Net: net9527                               
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 2 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net15605                              |Net: net15605                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net18363                              |Net: net18363                              
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net15989                              |Net: net15989                              
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 2    |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 2    
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 2   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net12568                              |Net: net12568                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 2  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net10619                              |Net: net10619                              
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net19510                              |Net: net19510                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core7.b.gen_square\[15\]. |Net: \i_chip_core.core7.b.gen_square[15].s 
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net15215                              |Net: net15215                              
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net15359                              |Net: net15214                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.gen_square\[60\]. |Net: \i_chip_core.core4.b.gen_square[60].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net14315                              |Net: net14315                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core7.b.arb_data_out\[1\] |Net: \i_chip_core.core7.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core5.b.arb_data_out\[0\] |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net14019                              |Net: net14019                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core3.b.arb_data_out\[0\] |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net17142                              |Net: net9987                               
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.gen_square\[7\].s |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core3.b.arb_data_out\[0\] |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core6.b.gen_square\[46\]. |Net: \i_chip_core.core6.b.gen_square[46].s 
  gf180mcu_fd_sc_mcu9t5v0__or2_2/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core7.b.gen_square\[4\].s |Net: \i_chip_core.core7.b.gen_square[4].sq 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net7476                               |Net: net7476                               
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net12044                              |Net: net12044                              
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net12792                              |Net: net12792                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net10933                              |Net: net10933                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.gen_square\[62\]. |Net: \i_chip_core.core4.b.gen_square[62].s 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net2321                               |Net: net2321                               
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core7.b.gen_square\[60\]. |Net: \i_chip_core.core7.b.gen_square[60].s 
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.gen_square\[23\]. |Net: \i_chip_core.core4.b.gen_square[23].s 
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core3.b.gen_square\[9\].s |Net: \i_chip_core.core3.b.gen_square[9].sq 
  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__or3_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 2   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core7.b.gen_square\[13\]. |Net: \i_chip_core.core7.b.gen_square[13].s 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core3.b.arb_data_out\[0\] |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C1 = 2 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net17089                              |Net: net11269                              
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core0.b.gen_square\[39\]. |Net: \i_chip_core.core0.b.gen_square[39].s 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net15398                              |Net: net15398                              
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/A2 = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core6.b.gen_square\[40\]. |Net: \i_chip_core.core6.b.gen_square[40].s 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.gen_square\[22\]. |Net: \i_chip_core.core4.b.gen_square[22].s 
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net15192                              |Net: net18503                              
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core0.b.gen_square\[39\]. |Net: \i_chip_core.core0.b.gen_square[39].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core3.b.gen_square\[35\]. |Net: \i_chip_core.core6.b.gen_square[44].s 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core6.b.gen_square\[8\].s |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net9966                               |Net: net9966                               
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.gen_square\[7\].s |Net: \i_chip_core.core4.b.gen_square[7].sq 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.gen_square\[37\]. |Net: \i_chip_core.core4.b.gen_square[37].s 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net16426                              |Net: net16913                              
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core2.b.arb_data_out\[6\] |Net: \i_chip_core.core2.b.arb_data_out[6]_ 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net8200                               |Net: net12458                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
                                           |                                           
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core7.b.gen_square\[19\]. |Net: \i_chip_core.core7.b.gen_square[19].s 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net12945                              |Net: net10749                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net16442                              |Net: net16442                              
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_2/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core0.b.arb_data_out\[6\] |Net: \i_chip_core.core0.b.arb_data_out[6]_ 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.gen_square\[40\]. |Net: \i_chip_core.core4.b.gen_square[58].s 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core5.b.arb_data_out\[0\] |Net: \i_chip_core.core5.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core6.b.gen_square\[59\]. |Net: \i_chip_core.core6.b.gen_square[59].s 
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  |  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core5.b.arb_data_out\[6\] |Net: \i_chip_core.core5.b.arb_data_out[6]_ 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core3.b.gen_square\[60\]. |Net: \i_chip_core.core3.b.gen_square[60].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and4_2/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and4_2/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net21110                              |Net: net21110                              
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 4  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net21557                              |Net: net21557                              
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net9487                               |Net: net9487                               
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 3 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A2 = 3 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net20160                              |Net: net20160                              
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.gen_square\[23\]. |Net: \i_chip_core.core4.b.gen_square[23].s 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core7.b.gen_square\[55\]. |Net: \i_chip_core.core7.b.gen_square[55].s 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core1.b.gen_square\[32\]. |Net: \i_chip_core.core1.b.gen_square[32].s 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net12444                              |Net: net12444                              
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 3 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 3 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core3.b.gen_square\[6\].s |Net: \i_chip_core.core3.b.gen_square[6].sq 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net17062                              |Net: net17062                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net19642                              |Net: net20214                              
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core6.b.arb_data_out\[6\] |Net: \i_chip_core.core6.b.arb_data_out[6]_ 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_4/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_4/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net17411                              |Net: net17411                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net16413                              |Net: net16413                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 3  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.gen_square\[29\]. |Net: \i_chip_core.core4.b.gen_square[29].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net17375                              |Net: net17375                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 3   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core7.b.gen_square\[33\]. |Net: \i_chip_core.core7.b.gen_square[33].s 
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core7.b.gen_square\[20\]. |Net: \i_chip_core.core7.b.gen_square[20].s 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core0.b.gen_square\[55\]. |Net: \i_chip_core.core0.b.gen_square[55].s 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.gen_square\[23\]. |Net: \i_chip_core.core4.b.gen_square[23].s 
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net12040                              |Net: net12040                              
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 3 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 3 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi222_2/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_2/B1 = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net14271                              |Net: net14271                              
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_2/A1 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 2     
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 2  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core7.b.gen_square\[13\]. |Net: \i_chip_core.core7.b.gen_square[13].s 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net16136                              |Net: net16136                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net12443                              |Net: net12443                              
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net15726                              |Net: net15726                              
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net19509                              |Net: net19509                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_2/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net15140                              |Net: net15140                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.gen_square\[51\]. |Net: \i_chip_core.core4.b.gen_square[51].s 
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net17251                              |Net: net17251                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net10408                              |Net: net10408                              
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 3 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net12268                              |Net: net12268                              
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_2/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_2/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net12270                              |Net: net12270                              
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 3  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 3  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_2/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_2/A2 = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net13479                              |Net: net13479                              
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 3 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 3 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net16655                              |Net: net16655                              
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core5.b.gen_square\[6\].s |Net: \i_chip_core.core5.b.gen_square[6].sq 
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net15167                              |Net: net15167                              
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/A1 = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/Z = 1    
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core7.b.gen_square\[38\]. |Net: \i_chip_core.core7.b.gen_square[38].s 
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A3 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 2 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net19437                              |Net: net19437                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/I = 1    
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net11871                              |Net: net11871                              
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 2  
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A1 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core6.b.gen_square\[56\]. |Net: \i_chip_core.core6.b.gen_square[56].s 
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net15521                              |Net: net15521                              
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 4 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 4 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net15530                              |Net: net15530                              
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 4 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 4 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net6254                               |Net: net6254                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net17248                              |Net: net17248                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B2 = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core3.b.arb_data_out\[0\] |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_2/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core0.b.gen_square\[57\]. |Net: \i_chip_core.core0.b.gen_square[57].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_4/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_4/ZN = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core7.b.gen_square\[29\]. |Net: \i_chip_core.core7.b.gen_square[29].s 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.gen_square\[6\].s |Net: \i_chip_core.core4.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyc_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyc_1/I = 1    
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net12763                              |Net: net1759                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core6.b.gen_square\[46\]. |Net: \i_chip_core.core6.b.gen_square[46].s 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core6.b.gen_square\[46\]. |Net: \i_chip_core.core6.b.gen_square[40].s 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.gen_square[8].sq 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core1.b.gen_square\[58\]. |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core6.b.arb_data_out\[0\] |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net7658                               |Net: net8036                               
  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_2/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net16423                              |Net: net16423                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net11467                              |Net: net14480                              
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core1.b.gen_square\[26\]. |Net: \i_chip_core.core3.b.gen_square[27].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A3 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core1.b.gen_square\[26\]. |Net: \i_chip_core.core1.b.gen_square[26].s 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core1.b.gen_square\[26\]. |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core0.b.arb_data_out\[6\] |Net: \i_chip_core.core3.b.gen_square[6].sq 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.gen_square[11].s 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
                                           |                                           
Net: i_chip_core.core3.b.arb_data_out\[0\] |Net: \i_chip_core.core3.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.arb_data_out\[0\] |Net: \i_chip_core.core2.b.gen_square[55].s 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/B = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core1.b.gen_square\[58\]. |Net: \i_chip_core.core1.b.gen_square[58].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core6.b.arb_data_out\[1\] |Net: \i_chip_core.core6.b.gen_square[46].s 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.gen_square\[43\]. |Net: \i_chip_core.core4.b.gen_square[43].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 2 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core7.b.gen_square\[29\]. |Net: \i_chip_core.core7.b.gen_square[29].s 
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.arb_data_out\[0\] |Net: \i_chip_core.core4.b.arb_data_out[0]_ 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net16184                              |Net: net16184                              
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net9177                               |Net: net9177                               
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net6252                               |Net: net6252                               
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core6.b.gen_square\[12\]. |Net: \i_chip_core.core6.b.gen_square[12].s 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/C2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net14709                              |Net: net13651                              
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net12764                              |Net: net12764                              
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyb_1/I = 1    
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/B = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core7.b.arb_data_out\[1\] |Net: \i_chip_core.core7.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C2 = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core7.b.arb_data_out\[1\] |Net: \i_chip_core.core7.b.arb_data_out[1]_ 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__or2_1/Z = 1     
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core1.b.gen_square\[26\]. |Net: \i_chip_core.core1.b.gen_square[26].s 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/B1 = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core7.b.gen_square\[4\].s |Net: \i_chip_core.core7.b.gen_square[4].sq 
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_1/ZN = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.gen_square\[60\]. |Net: \i_chip_core.core4.b.gen_square[60].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai222_1/C1 = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net15511                              |Net: net15511                              
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.gen_square\[29\]. |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/ZN = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.gen_square[34].s 
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_2/A2 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core7.b.gen_square\[13\]. |Net: \i_chip_core.core7.b.gen_square[13].s 
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net13737                              |Net: net14244                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/B1 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net13744                              |Net: net14428                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 3  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core7.b.gen_square\[15\]. |Net: \i_chip_core.core7.b.gen_square[15].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__and2_1/Z = 1    
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net16191                              |Net: net16191                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net12871                              |Net: net12871                              
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A4 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A4 = 1    
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core1.b.gen_square\[26\]. |Net: \i_chip_core.core1.b.gen_square[26].s 
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net2559                               |Net: net2559                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.gen_square\[43\]. |Net: \i_chip_core.core4.b.gen_square[43].s 
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core7.b.gen_square\[19\]. |Net: \i_chip_core.core7.b.gen_square[19].s 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net15683                              |Net: net15683                              
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
                                           |                                           
Net: net15879                              |Net: net15879                              
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core0.b.illegal_gf180mcu_ |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/B2 = 2 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/B2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/C = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.gen_square[9].sq 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net16914                              |Net: net16914                              
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/Z = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net11268                              |Net: net11268                              
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_4/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core7.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net13932                              |Net: net13932                              
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 2 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/A2 = 2 
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A2 = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core3.b.illegal_gf180mcu_ |Net: \i_chip_core.core3.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/A1 = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core3.b.gen_square\[44\]. |Net: \i_chip_core.core3.b.gen_square[44].s 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 2     
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlya_1/I = 1    
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core3.b.gen_square\[23\]. |Net: \i_chip_core.core3.b.gen_square[23].s 
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A3 = 1    
  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net4662                               |Net: net4662                               
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core2.b.gen_square\[11\]. |Net: \i_chip_core.core2.b.gen_square[11].s 
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A2 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/ZN = 1 
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core6.b.gen_square\[44\]. |Net: \i_chip_core.core6.b.gen_square[44].s 
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net15203                              |Net: net15203                              
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_4/Z = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core7.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.gen_square[4].sq 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/ZN = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core0.b.gen_square\[57\]. |Net: \i_chip_core.core0.b.gen_square[57].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_3/I = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/ZN = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi222_1/B1 = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net15354                              |Net: net15354                              
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_2/B1 = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core2.b.illegal_gf180mcu_ |Net: \i_chip_core.core2.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/B1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/ZN = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core0.b.gen_square\[39\]. |Net: \i_chip_core.core0.b.gen_square[39].s 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi221_1/C = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.gen_square\[23\]. |Net: \i_chip_core.core4.b.gen_square[23].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A4 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.illegal_gf180mcu_ |Net: \i_chip_core.core4.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core6.b.arb_data_out\[1\] |Net: \i_chip_core.core0.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net15172                              |Net: net15172                              
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
                                           |                                           
Net: net16897                              |Net: net16897                              
  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 |  gf180mcu_fd_sc_mcu9t5v0__oai221_1/A1 = 2 
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net16180                              |Net: net16180                              
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core5.b.illegal_gf180mcu_ |Net: \i_chip_core.core5.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai33_2/B3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net15194                              |Net: net15194                              
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
                                           |                                           
Net: net16234                              |Net: net16234                              
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 2  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net14710                              |Net: net14710                              
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_1/I = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net16552                              |Net: net16552                              
  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/I = 1     
  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_4/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core3.b.gen_square\[45\]. |Net: \i_chip_core.core3.b.gen_square[45].s 
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  |  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.gen_square\[43\]. |Net: \i_chip_core.core4.b.gen_square[43].s 
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I0 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  |  gf180mcu_fd_sc_mcu9t5v0__dffrnq_1/Q = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_8/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core5.b.arb_data_out\[6\] |Net: \i_chip_core.core5.b.arb_data_out[6]_ 
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/ZN = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net1968                               |Net: net1968                               
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_2/A3 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core6.b.illegal_gf180mcu_ |Net: \i_chip_core.core6.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/B = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/ZN = 1  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core1.b.gen_square\[48\]. |Net: \i_chip_core.core1.b.gen_square[48].s 
  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or2_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A3 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A3 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  |  gf180mcu_fd_sc_mcu9t5v0__dffsnq_1/Q = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__oai211_1/A1 = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net21392                              |Net: net21392                              
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkbuf_2/Z = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/B = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net21391                              |Net: net21391                              
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A1 = 2  
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core1.b.illegal_gf180mcu_ |Net: \i_chip_core.core1.b.illegal_gf180mcu 
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    |  gf180mcu_fd_sc_mcu9t5v0__or4_1/A2 = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_1/Z = 1     
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net18535                              |Net: net18535                              
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 4  
  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__xnor2_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__xor2_2/A1 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.gen_square\[40\]. |Net: \i_chip_core.core4.b.gen_square[40].s 
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 2   
  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_1/A1 = 3  
  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi21_2/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/S = 1    
  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand3_1/A2 = 2  
  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 |  gf180mcu_fd_sc_mcu9t5v0__aoi211_1/A1 = 1 
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: i_chip_core.core4.b.gen_square\[29\]. |Net: \i_chip_core.core4.b.gen_square[29].s 
  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai21_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor4_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 2  |  gf180mcu_fd_sc_mcu9t5v0__oai21_2/A1 = 2  
  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    |  gf180mcu_fd_sc_mcu9t5v0__or3_1/A1 = 2    
  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     |  gf180mcu_fd_sc_mcu9t5v0__buf_2/Z = 1     
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net17995                              |Net: net17995                              
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A3 = 2  
  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  |  gf180mcu_fd_sc_mcu9t5v0__clkinv_1/I = 1  
  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A2 = 1   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A2 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A3 = 1   
  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai31_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net17994                              |Net: net17994                              
  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__mux2_1/I1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__oai32_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__aoi22_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__and2_1/A1 = 1   
  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    |  gf180mcu_fd_sc_mcu9t5v0__dlyd_1/Z = 1    
  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   |  gf180mcu_fd_sc_mcu9t5v0__nor2_1/A1 = 2   
  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand2_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  |  gf180mcu_fd_sc_mcu9t5v0__nand4_1/A1 = 1  
  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   |  gf180mcu_fd_sc_mcu9t5v0__nor3_1/A1 = 1   
---------------------------------------------------------------------------------------
DEVICE mismatches: Class fragments follow (with node fanout counts):
Circuit 1: chip_top                        |Circuit 2: chip_top                        

---------------------------------------------------------------------------------------
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.arb_data_ou 
  A1 = 18                                  |  A1 = 4                                   
  A2 = 13                                  |  A2 = 5                                   
  B = 1014                                 |  B = 8                                    
  ZN = 13                                  |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.arb_data_ou 
  A1 = 1463                                |  A1 = 8                                   
  A2 = 1463                                |  A2 = 5                                   
  B = 14                                   |  B = 6                                    
  ZN = 14                                  |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.arb_data_ou 
  A1 = 11                                  |  A1 = 4                                   
  A2 = 6                                   |  A2 = 9                                   
  B = 13                                   |  B = 10                                   
  ZN = 13                                  |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 393                                 |  A1 = 4                                   
  A2 = 393                                 |  A2 = 11                                  
  B = 393                                  |  B = 6                                    
  ZN = 393                                 |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 2                                   |  A1 = 8                                   
  A2 = 11                                  |  A2 = 7                                   
  B = 10                                   |  B = 8                                    
  ZN = 7                                   |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 38                                  |  A1 = 11                                  
  A2 = 19                                  |  A2 = 5                                   
  B = 393                                  |  B = 5                                    
  ZN = 19                                  |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 22                                  |  A1 = 3                                   
  A2 = 2                                   |  A2 = 4                                   
  B = 14                                   |  B = 5                                    
  ZN = 7                                   |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 44                                  |  A1 = 3                                   
  A2 = 28                                  |  A2 = 4                                   
  B = 11                                   |  B = 7                                    
  ZN = 44                                  |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 43                                  |  A1 = 11                                  
  A2 = 43                                  |  A2 = 3                                   
  B = 31                                   |  B = 6                                    
  ZN = 31                                  |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 392                                 |  A1 = 9                                   
  A2 = 18                                  |  A2 = 5                                   
  B = 392                                  |  B = 3                                    
  ZN = 392                                 |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 699                                 |  A1 = 11                                  
  A2 = 6                                   |  A2 = 3                                   
  B = 14                                   |  B = 3                                    
  ZN = 4                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 699                                 |  A1 = 9                                   
  A2 = 699                                 |  A2 = 11                                  
  B = 5                                    |  B = 7                                    
  ZN = 5                                   |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 41                                  |  A1 = 11                                  
  A2 = 7                                   |  A2 = 3                                   
  B = 108                                  |  B = 4                                    
  ZN = 7                                   |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 15                                  |  A1 = 11                                  
  A2 = 15                                  |  A2 = 3                                   
  B = 15                                   |  B = 6                                    
  ZN = 15                                  |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 113                                 |  A1 = 11                                  
  A2 = 113                                 |  A2 = 4                                   
  B = 10                                   |  B = 8                                    
  ZN = 113                                 |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 23                                  |  A1 = 11                                  
  A2 = 7                                   |  A2 = 5                                   
  B = 5                                    |  B = 4                                    
  ZN = 3                                   |  ZN = 6                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 192                                 |  A1 = 3                                   
  A2 = 192                                 |  A2 = 11                                  
  B = 26                                   |  B = 9                                    
  ZN = 192                                 |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 100                                 |  A1 = 11                                  
  A2 = 100                                 |  A2 = 4                                   
  B = 10                                   |  B = 5                                    
  ZN = 100                                 |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 654                                 |  A1 = 3                                   
  A2 = 654                                 |  A2 = 3                                   
  B = 23                                   |  B = 6                                    
  ZN = 23                                  |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 63                                  |  A1 = 5                                   
  A2 = 63                                  |  A2 = 11                                  
  B = 63                                   |  B = 6                                    
  ZN = 63                                  |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 38                                  |  A1 = 11                                  
  A2 = 7                                   |  A2 = 3                                   
  B = 11                                   |  B = 9                                    
  ZN = 7                                   |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 164                                 |  A1 = 3                                   
  A2 = 164                                 |  A2 = 11                                  
  B = 164                                  |  B = 2                                    
  ZN = 164                                 |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 100                                 |  A1 = 11                                  
  A2 = 9                                   |  A2 = 4                                   
  B = 59                                   |  B = 5                                    
  ZN = 59                                  |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 21                                  |  A1 = 11                                  
  A2 = 18                                  |  A2 = 11                                  
  B = 14                                   |  B = 10                                   
  ZN = 18                                  |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 194                                 |  A1 = 4                                   
  A2 = 8                                   |  A2 = 3                                   
  B = 11                                   |  B = 7                                    
  ZN = 8                                   |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 116                                 |  A1 = 6                                   
  A2 = 116                                 |  A2 = 5                                   
  B = 3                                    |  B = 2                                    
  ZN = 6                                   |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 40                                  |  A1 = 6                                   
  A2 = 2                                   |  A2 = 4                                   
  B = 187                                  |  B = 6                                    
  ZN = 5                                   |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 117                                 |  A1 = 8                                   
  A2 = 117                                 |  A2 = 5                                   
  B = 24                                   |  B = 10                                   
  ZN = 12                                  |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 96                                  |  A1 = 5                                   
  A2 = 108                                 |  A2 = 3                                   
  B = 9                                    |  B = 8                                    
  ZN = 108                                 |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 172                                 |  A1 = 4                                   
  A2 = 8                                   |  A2 = 5                                   
  B = 172                                  |  B = 4                                    
  ZN = 3                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 13                                  |  A1 = 3                                   
  A2 = 7                                   |  A2 = 7                                   
  B = 10                                   |  B = 6                                    
  ZN = 8                                   |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 19                                  |  A1 = 7                                   
  A2 = 13                                  |  A2 = 6                                   
  B = 13                                   |  B = 4                                    
  ZN = 13                                  |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 5                                   |  A1 = 2                                   
  A2 = 5                                   |  A2 = 2                                   
  B = 15                                   |  B = 7                                    
  ZN = 15                                  |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 6                                   |  A1 = 6                                   
  A2 = 2                                   |  A2 = 2                                   
  B = 187                                  |  B = 7                                    
  ZN = 3                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 10                                  |  A1 = 4                                   
  A2 = 4                                   |  A2 = 2                                   
  B = 13                                   |  B = 11                                   
  ZN = 4                                   |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 194                                 |  A1 = 6                                   
  A2 = 2                                   |  A2 = 4                                   
  B = 11                                   |  B = 7                                    
  ZN = 7                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 112                                 |  A1 = 9                                   
  A2 = 112                                 |  A2 = 8                                   
  B = 112                                  |  B = 2                                    
  ZN = 112                                 |  ZN = 6                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 393                                 |  A1 = 6                                   
  A2 = 393                                 |  A2 = 3                                   
  B = 4                                    |  B = 5                                    
  ZN = 3                                   |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 1463                                |  A1 = 9                                   
  A2 = 250                                 |  A2 = 5                                   
  B = 1463                                 |  B = 4                                    
  ZN = 1463                                |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 26                                  |  A1 = 5                                   
  A2 = 7                                   |  A2 = 3                                   
  B = 26                                   |  B = 5                                    
  ZN = 26                                  |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 393                                 |  A1 = 9                                   
  A2 = 393                                 |  A2 = 4                                   
  B = 1463                                 |  B = 5                                    
  ZN = 393                                 |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 61                                  |  A1 = 11                                  
  A2 = 8                                   |  A2 = 3                                   
  B = 19                                   |  B = 3                                    
  ZN = 9                                   |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 172                                 |  A1 = 11                                  
  A2 = 6                                   |  A2 = 2                                   
  B = 172                                  |  B = 3                                    
  ZN = 4                                   |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 111                                 |  A1 = 8                                   
  A2 = 27                                  |  A2 = 11                                  
  B = 27                                   |  B = 4                                    
  ZN = 27                                  |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 193                                 |  A1 = 7                                   
  A2 = 393                                 |  A2 = 4                                   
  B = 193                                  |  B = 5                                    
  ZN = 193                                 |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 122                                 |  A1 = 11                                  
  A2 = 3                                   |  A2 = 3                                   
  B = 11                                   |  B = 5                                    
  ZN = 8                                   |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 8                                   |  A1 = 11                                  
  A2 = 2                                   |  A2 = 3                                   
  B = 12                                   |  B = 7                                    
  ZN = 8                                   |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 11                                  |  A1 = 9                                   
  A2 = 5                                   |  A2 = 5                                   
  B = 10                                   |  B = 4                                    
  ZN = 5                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 5                                   |  A1 = 4                                   
  A2 = 9                                   |  A2 = 11                                  
  B = 9                                    |  B = 7                                    
  ZN = 9                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 1014                                |  A1 = 6                                   
  A2 = 1014                                |  A2 = 3                                   
  B = 1014                                 |  B = 7                                    
  ZN = 1014                                |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 148                                 |  A1 = 5                                   
  A2 = 148                                 |  A2 = 3                                   
  B = 148                                  |  B = 6                                    
  ZN = 148                                 |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 16                                  |  A1 = 3                                   
  A2 = 16                                  |  A2 = 6                                   
  B = 142                                  |  B = 9                                    
  ZN = 16                                  |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 1463                                |  A1 = 6                                   
  A2 = 1463                                |  A2 = 3                                   
  B = 1463                                 |  B = 4                                    
  ZN = 1463                                |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 23                                  |  A1 = 5                                   
  A2 = 13                                  |  A2 = 11                                  
  B = 61                                   |  B = 9                                    
  ZN = 7                                   |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core1.b.arb_data_ou 
  A1 = 8                                   |  A1 = 7                                   
  A2 = 1463                                |  A2 = 5                                   
  B = 13                                   |  B = 11                                   
  ZN = 2                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core1.b.arb_data_ou 
  A1 = 3                                   |  A1 = 11                                  
  A2 = 113                                 |  A2 = 10                                  
  B = 4                                    |  B = 6                                    
  ZN = 4                                   |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core1.b.arb_data_ou 
  A1 = 8                                   |  A1 = 11                                  
  A2 = 48                                  |  A2 = 3                                   
  B = 10                                   |  B = 4                                    
  ZN = 48                                  |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core1.b.arb_data_ou 
  A1 = 63                                  |  A1 = 11                                  
  A2 = 63                                  |  A2 = 3                                   
  B = 7                                    |  B = 11                                   
  ZN = 63                                  |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core1.b.arb_data_ou 
  A1 = 8                                   |  A1 = 11                                  
  A2 = 17                                  |  A2 = 3                                   
  B = 41                                   |  B = 8                                    
  ZN = 17                                  |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core1.b.gen_square[ 
  A1 = 1014                                |  A1 = 9                                   
  A2 = 200                                 |  A2 = 3                                   
  B = 4                                    |  B = 8                                    
  ZN = 4                                   |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core1.b.gen_square[ 
  A1 = 148                                 |  A1 = 9                                   
  A2 = 148                                 |  A2 = 3                                   
  B = 148                                  |  B = 3                                    
  ZN = 148                                 |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core1.b.gen_square[ 
  A1 = 1014                                |  A1 = 5                                   
  A2 = 4                                   |  A2 = 2                                   
  B = 18                                   |  B = 10                                   
  ZN = 18                                  |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core1.b.gen_square[ 
  A1 = 250                                 |  A1 = 9                                   
  A2 = 2                                   |  A2 = 5                                   
  B = 250                                  |  B = 11                                   
  ZN = 6                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core1.b.illegal_gf1 
  A1 = 108                                 |  A1 = 8                                   
  A2 = 3                                   |  A2 = 5                                   
  B = 30                                   |  B = 3                                    
  ZN = 3                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core1.b.illegal_gf1 
  A1 = 6                                   |  A1 = 4                                   
  A2 = 9                                   |  A2 = 4                                   
  B = 4                                    |  B = 8                                    
  ZN = 6                                   |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core1.b.illegal_gf1 
  A1 = 14                                  |  A1 = 5                                   
  A2 = 9                                   |  A2 = 3                                   
  B = 8                                    |  B = 3                                    
  ZN = 9                                   |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core2.b.arb_data_ou 
  A1 = 1014                                |  A1 = 9                                   
  A2 = 13                                  |  A2 = 3                                   
  B = 1014                                 |  B = 5                                    
  ZN = 13                                  |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core2.b.arb_data_ou 
  A1 = 392                                 |  A1 = 9                                   
  A2 = 8                                   |  A2 = 3                                   
  B = 6                                    |  B = 8                                    
  ZN = 7                                   |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core2.b.arb_data_ou 
  A1 = 1014                                |  A1 = 5                                   
  A2 = 18                                  |  A2 = 3                                   
  B = 1014                                 |  B = 2                                    
  ZN = 18                                  |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core2.b.arb_data_ou 
  A1 = 6                                   |  A1 = 8                                   
  A2 = 13                                  |  A2 = 11                                  
  B = 10                                   |  B = 3                                    
  ZN = 10                                  |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core2.b.arb_data_ou 
  A1 = 15                                  |  A1 = 8                                   
  A2 = 5                                   |  A2 = 4                                   
  B = 15                                   |  B = 3                                    
  ZN = 3                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core2.b.arb_data_ou 
  A1 = 8                                   |  A1 = 5                                   
  A2 = 654                                 |  A2 = 5                                   
  B = 13                                   |  B = 5                                    
  ZN = 4                                   |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core2.b.gen_square[ 
  A1 = 654                                 |  A1 = 4                                   
  A2 = 654                                 |  A2 = 4                                   
  B = 11                                   |  B = 5                                    
  ZN = 654                                 |  ZN = 6                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core2.b.gen_square[ 
  A1 = 192                                 |  A1 = 2                                   
  A2 = 192                                 |  A2 = 3                                   
  B = 10                                   |  B = 7                                    
  ZN = 13                                  |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core2.b.gen_square[ 
  A1 = 30                                  |  A1 = 3                                   
  A2 = 30                                  |  A2 = 9                                   
  B = 9                                    |  B = 9                                    
  ZN = 30                                  |  ZN = 6                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core2.b.gen_square[ 
  A1 = 8                                   |  A1 = 11                                  
  A2 = 17                                  |  A2 = 3                                   
  B = 11                                   |  B = 4                                    
  ZN = 6                                   |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core2.b.gen_square[ 
  A1 = 193                                 |  A1 = 11                                  
  A2 = 1463                                |  A2 = 7                                   
  B = 22                                   |  B = 4                                    
  ZN = 1463                                |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core2.b.gen_square[ 
  A1 = 243                                 |  A1 = 11                                  
  A2 = 243                                 |  A2 = 4                                   
  B = 243                                  |  B = 7                                    
  ZN = 243                                 |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core2.b.gen_square[ 
  A1 = 699                                 |  A1 = 4                                   
  A2 = 699                                 |  A2 = 4                                   
  B = 699                                  |  B = 7                                    
  ZN = 699                                 |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core2.b.gen_square[ 
  A1 = 90                                  |  A1 = 11                                  
  A2 = 90                                  |  A2 = 3                                   
  B = 5                                    |  B = 7                                    
  ZN = 90                                  |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core2.b.gen_square[ 
  A1 = 193                                 |  A1 = 11                                  
  A2 = 2                                   |  A2 = 3                                   
  B = 91                                   |  B = 9                                    
  ZN = 1463                                |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core2.b.gen_square[ 
  A1 = 5                                   |  A1 = 3                                   
  A2 = 61                                  |  A2 = 7                                   
  B = 5                                    |  B = 6                                    
  ZN = 2                                   |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core2.b.gen_square[ 
  A1 = 12                                  |  A1 = 5                                   
  A2 = 4                                   |  A2 = 11                                  
  B = 3                                    |  B = 7                                    
  ZN = 3                                   |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core2.b.gen_square[ 
  A1 = 63                                  |  A1 = 5                                   
  A2 = 4                                   |  A2 = 5                                   
  B = 4                                    |  B = 3                                    
  ZN = 5                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core2.b.gen_square[ 
  A1 = 4                                   |  A1 = 4                                   
  A2 = 4                                   |  A2 = 7                                   
  B = 5                                    |  B = 7                                    
  ZN = 5                                   |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core2.b.gen_square[ 
  A1 = 6                                   |  A1 = 6                                   
  A2 = 25                                  |  A2 = 3                                   
  B = 4                                    |  B = 2                                    
  ZN = 5                                   |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core2.b.gen_square[ 
  A1 = 8                                   |  A1 = 11                                  
  A2 = 2                                   |  A2 = 3                                   
  B = 14                                   |  B = 5                                    
  ZN = 9                                   |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core2.b.gen_square[ 
  A1 = 3                                   |  A1 = 11                                  
  A2 = 2                                   |  A2 = 3                                   
  B = 10                                   |  B = 7                                    
  ZN = 4                                   |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 19                                  |  A1 = 5                                   
  A2 = 18                                  |  A2 = 2                                   
  B = 7                                    |  B = 2                                    
  ZN = 3                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 4                                   |  A1 = 7                                   
  A2 = 2                                   |  A2 = 5                                   
  B = 6                                    |  B = 3                                    
  ZN = 2                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 18                                  |  A1 = 10                                  
  A2 = 12                                  |  A2 = 3                                   
  B = 3                                    |  B = 7                                    
  ZN = 3                                   |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 4                                   |  A1 = 8                                   
  A2 = 24                                  |  A2 = 4                                   
  B = 7                                    |  B = 2                                    
  ZN = 7                                   |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 3                                   |  A1 = 3                                   
  A2 = 523                                 |  A2 = 7                                   
  B = 3                                    |  B = 10                                   
  ZN = 4                                   |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 4                                   |  A1 = 11                                  
  A2 = 4                                   |  A2 = 11                                  
  B = 11                                   |  B = 3                                    
  ZN = 2                                   |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_1 |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 3                                   |  A1 = 11                                  
  A2 = 2                                   |  A2 = 3                                   
  B = 5                                    |  B = 7                                    
  ZN = 2                                   |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__mux2_1: |Instance: \i_chip_core.core2.b.illegal_gf1 
  I0 = 1014                                |  A1 = 7                                   
  I1 = 5                                   |  A2 = 5                                   
  S = 3                                    |  B = 2                                    
  Z = 3                                    |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__mux2_1: |Instance: \i_chip_core.core2.b.illegal_gf1 
  I0 = 7                                   |  A1 = 11                                  
  I1 = 4                                   |  A2 = 4                                   
  S = 11                                   |  B = 4                                    
  Z = 3                                    |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or3_1:i |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 180                                 |  A1 = 11                                  
  A2 = 16                                  |  A2 = 4                                   
  A3 = 3                                   |  B = 10                                   
  Z = 180                                  |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or3_1:i |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 1014                                |  A1 = 4                                   
  A2 = 1014                                |  A2 = 6                                   
  A3 = 1014                                |  B = 10                                   
  Z = 23                                   |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or3_1:i |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 1014                                |  A1 = 4                                   
  A2 = 7                                   |  A2 = 7                                   
  A3 = 7                                   |  B = 4                                    
  Z = 1014                                 |  ZN = 7                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or3_1:i |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 1463                                |  A1 = 9                                   
  A2 = 91                                  |  A2 = 11                                  
  A3 = 2                                   |  B = 3                                    
  Z = 10                                   |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or3_1:i |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 699                                 |  A1 = 3                                   
  A2 = 699                                 |  A2 = 3                                   
  A3 = 2                                   |  B = 2                                    
  Z = 14                                   |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or3_1:i |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 10                                  |  A1 = 4                                   
  A2 = 250                                 |  A2 = 10                                  
  A3 = 250                                 |  B = 5                                    
  Z = 1463                                 |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or3_1:i |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 1014                                |  A1 = 5                                   
  A2 = 1014                                |  A2 = 6                                   
  A3 = 1014                                |  B = 10                                   
  Z = 9                                    |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or3_1:i |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 1463                                |  A1 = 11                                  
  A2 = 1463                                |  A2 = 3                                   
  A3 = 1463                                |  B = 3                                    
  Z = 1463                                 |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or3_1:i |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 96                                  |  A1 = 11                                  
  A2 = 4                                   |  A2 = 3                                   
  A3 = 3                                   |  B = 8                                    
  Z = 3                                    |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or3_1:i |Instance: \i_chip_core.core3.b.arb_data_ou 
  A1 = 1463                                |  A1 = 10                                  
  A2 = 5                                   |  A2 = 11                                  
  A3 = 3                                   |  B = 3                                    
  Z = 5                                    |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or3_1:i |Instance: \i_chip_core.core3.b.arb_data_ou 
  A1 = 3                                   |  A1 = 4                                   
  A2 = 4                                   |  A2 = 2                                   
  A3 = 3                                   |  B = 11                                   
  Z = 250                                  |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.arb_data_ou 
  A1 = 17                                  |  A1 = 11                                  
  A2 = 12                                  |  A2 = 4                                   
  A3 = 6                                   |  B = 8                                    
  ZN = 6                                   |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.arb_data_ou 
  A1 = 192                                 |  A1 = 11                                  
  A2 = 30                                  |  A2 = 8                                   
  A3 = 30                                  |  B = 6                                    
  ZN = 30                                  |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.gen_square[ 
  A1 = 19                                  |  A1 = 3                                   
  A2 = 15                                  |  A2 = 7                                   
  A3 = 4                                   |  B = 8                                    
  ZN = 4                                   |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.gen_square[ 
  A1 = 90                                  |  A1 = 11                                  
  A2 = 90                                  |  A2 = 3                                   
  A3 = 6                                   |  B = 7                                    
  ZN = 6                                   |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.gen_square[ 
  A1 = 654                                 |  A1 = 9                                   
  A2 = 654                                 |  A2 = 3                                   
  A3 = 6                                   |  B = 5                                    
  ZN = 7                                   |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.gen_square[ 
  A1 = 192                                 |  A1 = 9                                   
  A2 = 192                                 |  A2 = 3                                   
  A3 = 142                                 |  B = 7                                    
  ZN = 192                                 |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.gen_square[ 
  A1 = 1463                                |  A1 = 11                                  
  A2 = 1463                                |  A2 = 3                                   
  A3 = 1463                                |  B = 6                                    
  ZN = 9                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.gen_square[ 
  A1 = 1463                                |  A1 = 11                                  
  A2 = 1463                                |  A2 = 3                                   
  A3 = 148                                 |  B = 3                                    
  ZN = 1463                                |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 14                                  |  A1 = 9                                   
  A2 = 193                                 |  A2 = 4                                   
  A3 = 1463                                |  B = 7                                    
  ZN = 1463                                |  ZN = 6                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 200                                 |  A1 = 5                                   
  A2 = 200                                 |  A2 = 6                                   
  A3 = 1014                                |  B = 6                                    
  ZN = 200                                 |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 1463                                |  A1 = 8                                   
  A2 = 1463                                |  A2 = 5                                   
  A3 = 1463                                |  B = 6                                    
  ZN = 1463                                |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 20                                  |  A1 = 7                                   
  A2 = 10                                  |  A2 = 4                                   
  A3 = 12                                  |  B = 5                                    
  ZN = 12                                  |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 180                                 |  A1 = 4                                   
  A2 = 16                                  |  A2 = 4                                   
  A3 = 6                                   |  B = 4                                    
  ZN = 6                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 91                                  |  A1 = 3                                   
  A2 = 25                                  |  A2 = 4                                   
  A3 = 14                                  |  B = 4                                    
  ZN = 25                                  |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 200                                 |  A1 = 11                                  
  A2 = 200                                 |  A2 = 3                                   
  A3 = 200                                 |  B = 3                                    
  ZN = 200                                 |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 14                                  |  A1 = 3                                   
  A2 = 18                                  |  A2 = 7                                   
  A3 = 18                                  |  B = 3                                    
  ZN = 18                                  |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 1463                                |  A1 = 4                                   
  A2 = 1463                                |  A2 = 6                                   
  A3 = 1463                                |  B = 7                                    
  ZN = 1463                                |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 194                                 |  A1 = 11                                  
  A2 = 194                                 |  A2 = 4                                   
  A3 = 194                                 |  B = 9                                    
  ZN = 194                                 |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 699                                 |  A1 = 5                                   
  A2 = 699                                 |  A2 = 3                                   
  A3 = 699                                 |  B = 3                                    
  ZN = 7                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 44                                  |  A1 = 11                                  
  A2 = 59                                  |  A2 = 4                                   
  A3 = 15                                  |  B = 3                                    
  ZN = 59                                  |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 18                                  |  A1 = 11                                  
  A2 = 8                                   |  A2 = 4                                   
  A3 = 7                                   |  B = 8                                    
  ZN = 8                                   |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 1014                                |  A1 = 4                                   
  A2 = 1014                                |  A2 = 8                                   
  A3 = 200                                 |  B = 3                                    
  ZN = 1014                                |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 19                                  |  A1 = 4                                   
  A2 = 13                                  |  A2 = 8                                   
  A3 = 3                                   |  B = 8                                    
  ZN = 3                                   |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 11                                  |  A1 = 5                                   
  A2 = 19                                  |  A2 = 2                                   
  A3 = 23                                  |  B = 10                                   
  ZN = 19                                  |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 392                                 |  A1 = 5                                   
  A2 = 392                                 |  A2 = 3                                   
  A3 = 392                                 |  B = 3                                    
  ZN = 392                                 |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 14                                  |  A1 = 11                                  
  A2 = 14                                  |  A2 = 3                                   
  A3 = 7                                   |  B = 9                                    
  ZN = 7                                   |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 1463                                |  A1 = 7                                   
  A2 = 9                                   |  A2 = 3                                   
  A3 = 1463                                |  B = 3                                    
  ZN = 2                                   |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 30                                  |  A1 = 7                                   
  A2 = 10                                  |  A2 = 3                                   
  A3 = 12                                  |  B = 2                                    
  ZN = 5                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 1014                                |  A1 = 11                                  
  A2 = 200                                 |  A2 = 4                                   
  A3 = 1014                                |  B = 9                                    
  ZN = 1014                                |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 113                                 |  A1 = 10                                  
  A2 = 12                                  |  A2 = 3                                   
  A3 = 5                                   |  B = 9                                    
  ZN = 36                                  |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 1463                                |  A1 = 10                                  
  A2 = 3                                   |  A2 = 5                                   
  A3 = 1463                                |  B = 11                                   
  ZN = 1463                                |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 5                                   |  A1 = 3                                   
  A2 = 6                                   |  A2 = 3                                   
  A3 = 5                                   |  B = 4                                    
  ZN = 1463                                |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 5                                   |  A1 = 9                                   
  A2 = 5                                   |  A2 = 4                                   
  A3 = 3                                   |  B = 3                                    
  ZN = 6                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 94                                  |  A1 = 9                                   
  A2 = 3                                   |  A2 = 2                                   
  A3 = 6                                   |  B = 7                                    
  ZN = 2                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 9                                   |  A1 = 4                                   
  A2 = 4                                   |  A2 = 2                                   
  A3 = 44                                  |  B = 11                                   
  ZN = 2                                   |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 1463                                |  A1 = 6                                   
  A2 = 1463                                |  A2 = 11                                  
  A3 = 4                                   |  B = 9                                    
  ZN = 1463                                |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 11                                  |  A1 = 5                                   
  A2 = 5                                   |  A2 = 4                                   
  A3 = 3                                   |  B = 5                                    
  ZN = 4                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 392                                 |  A1 = 11                                  
  A2 = 5                                   |  A2 = 2                                   
  A3 = 3                                   |  B = 10                                   
  ZN = 3                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 5                                   |  A1 = 5                                   
  A2 = 5                                   |  A2 = 2                                   
  A3 = 3                                   |  B = 5                                    
  ZN = 8                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 3                                   |  A1 = 11                                  
  A2 = 4                                   |  A2 = 4                                   
  A3 = 3                                   |  B = 5                                    
  ZN = 4                                   |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi22_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 29                                  |  A1 = 11                                  
  A2 = 194                                 |  A2 = 3                                   
  B1 = 194                                 |  B = 4                                    
  B2 = 194                                 |  ZN = 2                                   
  ZN = 194                                 |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi22_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 35                                  |  A1 = 4                                   
  A2 = 35                                  |  A2 = 2                                   
  B1 = 8                                   |  B = 2                                    
  B2 = 8                                   |  ZN = 2                                   
  ZN = 8                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi22_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 291                                 |  A1 = 4                                   
  A2 = 60                                  |  A2 = 4                                   
  B1 = 15                                  |  B = 6                                    
  B2 = 6                                   |  ZN = 4                                   
  ZN = 9                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi22_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 20                                  |  A1 = 4                                   
  A2 = 6                                   |  A2 = 7                                   
  B1 = 6                                   |  B = 11                                   
  B2 = 3                                   |  ZN = 6                                   
  ZN = 3                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__and2_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 123                                 |  A1 = 7                                   
  A2 = 12                                  |  A2 = 4                                   
  Z = 1                                    |  B = 5                                    
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__and2_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 14                                  |  A1 = 11                                  
  A2 = 17                                  |  A2 = 3                                   
  Z = 21                                   |  B = 4                                    
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__and2_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 291                                 |  A1 = 11                                  
  A2 = 291                                 |  A2 = 8                                   
  Z = 53                                   |  B = 4                                    
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__and2_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 6                                   |  A1 = 7                                   
  A2 = 8                                   |  A2 = 6                                   
  Z = 8                                    |  B = 2                                    
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__and2_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 16                                  |  A1 = 4                                   
  A2 = 393                                 |  A2 = 4                                   
  Z = 1                                    |  B = 6                                    
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__and2_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 9                                   |  A1 = 11                                  
  A2 = 29                                  |  A2 = 3                                   
  Z = 29                                   |  B = 6                                    
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__and2_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 200                                 |  A1 = 7                                   
  A2 = 16                                  |  A2 = 3                                   
  Z = 16                                   |  B = 3                                    
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__and2_1: |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 11                                  |  A1 = 3                                   
  A2 = 16                                  |  A2 = 8                                   
  Z = 10                                   |  B = 6                                    
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__and2_1: |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 10                                  |  A1 = 6                                   
  A2 = 7                                   |  A2 = 5                                   
  Z = 7                                    |  B = 4                                    
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__and2_1: |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 9                                   |  A1 = 7                                   
  A2 = 7                                   |  A2 = 4                                   
  Z = 7                                    |  B = 3                                    
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__and2_1: |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 8                                   |  A1 = 11                                  
  A2 = 187                                 |  A2 = 5                                   
  Z = 187                                  |  B = 4                                    
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__and2_1: |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 699                                 |  A1 = 11                                  
  A2 = 13                                  |  A2 = 3                                   
  Z = 699                                  |  B = 4                                    
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__and2_1: |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 654                                 |  A1 = 3                                   
  A2 = 654                                 |  A2 = 3                                   
  Z = 654                                  |  B = 8                                    
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__and2_1: |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 25                                  |  A1 = 8                                   
  A2 = 18                                  |  A2 = 3                                   
  Z = 18                                   |  B = 4                                    
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__and2_1: |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 8                                   |  A1 = 7                                   
  A2 = 12                                  |  A2 = 8                                   
  Z = 12                                   |  B = 4                                    
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__and2_1: |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 43                                  |  A1 = 11                                  
  A2 = 43                                  |  A2 = 3                                   
  Z = 43                                   |  B = 8                                    
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__and2_1: |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 523                                 |  A1 = 4                                   
  A2 = 6                                   |  A2 = 5                                   
  Z = 12                                   |  B = 11                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__and2_1: |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 27                                  |  A1 = 8                                   
  A2 = 25                                  |  A2 = 3                                   
  Z = 11                                   |  B = 10                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__and2_1: |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 5                                   |  A1 = 11                                  
  A2 = 2                                   |  A2 = 6                                   
  Z = 11                                   |  B = 10                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__and2_1: |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 75                                  |  A1 = 11                                  
  A2 = 11                                  |  A2 = 3                                   
  Z = 2                                    |  B = 6                                    
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__and2_1: |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 4                                   |  A1 = 11                                  
  A2 = 192                                 |  A2 = 4                                   
  Z = 3                                    |  B = 6                                    
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__and2_1: |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 8                                   |  A1 = 11                                  
  A2 = 3                                   |  A2 = 4                                   
  Z = 3                                    |  B = 5                                    
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 1014                                |  A1 = 3                                   
  A2 = 6                                   |  A2 = 2                                   
  A3 = 2                                   |  B = 4                                    
  ZN = 1014                                |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 291                                 |  A1 = 3                                   
  A2 = 1014                                |  A2 = 4                                   
  A3 = 8                                   |  B = 10                                   
  ZN = 5                                   |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 13                                  |  A1 = 11                                  
  A2 = 9                                   |  A2 = 3                                   
  A3 = 9                                   |  B = 4                                    
  ZN = 10                                  |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 654                                 |  A1 = 11                                  
  A2 = 13                                  |  A2 = 3                                   
  A3 = 15                                  |  B = 10                                   
  ZN = 13                                  |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 44                                  |  A1 = 5                                   
  A2 = 44                                  |  A2 = 3                                   
  A3 = 20                                  |  B = 11                                   
  ZN = 164                                 |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 193                                 |  A1 = 5                                   
  A2 = 1463                                |  A2 = 4                                   
  A3 = 13                                  |  B = 8                                    
  ZN = 1463                                |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 9                                   |  A1 = 4                                   
  A2 = 15                                  |  A2 = 4                                   
  A3 = 10                                  |  B = 4                                    
  ZN = 1463                                |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 33                                  |  A1 = 4                                   
  A2 = 33                                  |  A2 = 4                                   
  A3 = 33                                  |  B = 7                                    
  ZN = 33                                  |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 164                                 |  A1 = 6                                   
  A2 = 164                                 |  A2 = 4                                   
  A3 = 38                                  |  B = 2                                    
  ZN = 164                                 |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 2                                   |  A1 = 6                                   
  A2 = 1014                                |  A2 = 3                                   
  A3 = 94                                  |  B = 9                                    
  ZN = 5                                   |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 392                                 |  A1 = 11                                  
  A2 = 392                                 |  A2 = 4                                   
  A3 = 392                                 |  B = 5                                    
  ZN = 18                                  |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 699                                 |  A1 = 9                                   
  A2 = 699                                 |  A2 = 4                                   
  A3 = 699                                 |  B = 11                                   
  ZN = 699                                 |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 523                                 |  A1 = 5                                   
  A2 = 523                                 |  A2 = 9                                   
  A3 = 523                                 |  B = 4                                    
  ZN = 523                                 |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 143                                 |  A1 = 11                                  
  A2 = 143                                 |  A2 = 5                                   
  A3 = 143                                 |  B = 3                                    
  ZN = 143                                 |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 200                                 |  A1 = 11                                  
  A2 = 200                                 |  A2 = 7                                   
  A3 = 200                                 |  B = 5                                    
  ZN = 200                                 |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 90                                  |  A1 = 6                                   
  A2 = 90                                  |  A2 = 3                                   
  A3 = 10                                  |  B = 11                                   
  ZN = 6                                   |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 26                                  |  A1 = 11                                  
  A2 = 26                                  |  A2 = 4                                   
  A3 = 2                                   |  B = 4                                    
  ZN = 26                                  |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 28                                  |  A1 = 11                                  
  A2 = 26                                  |  A2 = 4                                   
  A3 = 28                                  |  B = 4                                    
  ZN = 71                                  |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 31                                  |  A1 = 5                                   
  A2 = 8                                   |  A2 = 3                                   
  A3 = 4                                   |  B = 7                                    
  ZN = 4                                   |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 17                                  |  A1 = 8                                   
  A2 = 38                                  |  A2 = 3                                   
  A3 = 14                                  |  B = 12                                   
  ZN = 19                                  |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 35                                  |  A1 = 6                                   
  A2 = 35                                  |  A2 = 4                                   
  A3 = 35                                  |  B = 3                                    
  ZN = 35                                  |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 20                                  |  A1 = 3                                   
  A2 = 24                                  |  A2 = 5                                   
  A3 = 24                                  |  B = 2                                    
  ZN = 24                                  |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 1014                                |  A1 = 8                                   
  A2 = 1014                                |  A2 = 6                                   
  A3 = 1014                                |  B = 3                                    
  ZN = 1014                                |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 523                                 |  A1 = 5                                   
  A2 = 523                                 |  A2 = 7                                   
  A3 = 9                                   |  B = 6                                    
  ZN = 523                                 |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core5.b.gen_square[ 
  A1 = 523                                 |  A1 = 2                                   
  A2 = 523                                 |  A2 = 7                                   
  A3 = 523                                 |  B = 3                                    
  ZN = 2                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core5.b.gen_square[ 
  A1 = 23                                  |  A1 = 11                                  
  A2 = 16                                  |  A2 = 4                                   
  A3 = 12                                  |  B = 3                                    
  ZN = 16                                  |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core5.b.gen_square[ 
  A1 = 143                                 |  A1 = 11                                  
  A2 = 143                                 |  A2 = 4                                   
  A3 = 143                                 |  B = 7                                    
  ZN = 143                                 |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 142                                 |  A1 = 7                                   
  A2 = 50                                  |  A2 = 4                                   
  A3 = 26                                  |  B = 2                                    
  ZN = 16                                  |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 60                                  |  A1 = 11                                  
  A2 = 60                                  |  A2 = 5                                   
  A3 = 16                                  |  B = 6                                    
  ZN = 5                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 699                                 |  A1 = 7                                   
  A2 = 699                                 |  A2 = 3                                   
  A3 = 699                                 |  B = 11                                   
  ZN = 699                                 |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 393                                 |  A1 = 4                                   
  A2 = 250                                 |  A2 = 4                                   
  A3 = 15                                  |  B = 2                                    
  ZN = 393                                 |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 193                                 |  A1 = 11                                  
  A2 = 91                                  |  A2 = 5                                   
  A3 = 193                                 |  B = 6                                    
  ZN = 193                                 |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 14                                  |  A1 = 6                                   
  A2 = 9                                   |  A2 = 4                                   
  A3 = 3                                   |  B = 8                                    
  ZN = 3                                   |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 24                                  |  A1 = 3                                   
  A2 = 21                                  |  A2 = 4                                   
  A3 = 21                                  |  B = 8                                    
  ZN = 5                                   |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 40                                  |  A1 = 10                                  
  A2 = 187                                 |  A2 = 5                                   
  A3 = 4                                   |  B = 3                                    
  ZN = 187                                 |  ZN = 6                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 21                                  |  A1 = 11                                  
  A2 = 15                                  |  A2 = 2                                   
  A3 = 4                                   |  B = 9                                    
  ZN = 4                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 21                                  |  A1 = 11                                  
  A2 = 16                                  |  A2 = 2                                   
  A3 = 21                                  |  B = 6                                    
  ZN = 4                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 26                                  |  A1 = 11                                  
  A2 = 117                                 |  A2 = 3                                   
  A3 = 5                                   |  B = 3                                    
  ZN = 5                                   |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 1463                                |  A1 = 5                                   
  A2 = 393                                 |  A2 = 2                                   
  A3 = 193                                 |  B = 11                                   
  ZN = 393                                 |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 250                                 |  A1 = 8                                   
  A2 = 250                                 |  A2 = 3                                   
  A3 = 10                                  |  B = 9                                    
  ZN = 38                                  |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.arb_data_ou 
  A1 = 392                                 |  A1 = 8                                   
  A2 = 392                                 |  A2 = 10                                  
  A3 = 392                                 |  B = 9                                    
  ZN = 10                                  |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.arb_data_ou 
  A1 = 1463                                |  A1 = 3                                   
  A2 = 1463                                |  A2 = 3                                   
  A3 = 1463                                |  B = 8                                    
  ZN = 1463                                |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.arb_data_ou 
  A1 = 90                                  |  A1 = 3                                   
  A2 = 90                                  |  A2 = 9                                   
  A3 = 10                                  |  B = 3                                    
  ZN = 90                                  |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.arb_data_ou 
  A1 = 699                                 |  A1 = 4                                   
  A2 = 699                                 |  A2 = 3                                   
  A3 = 699                                 |  B = 7                                    
  ZN = 699                                 |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.arb_data_ou 
  A1 = 19                                  |  A1 = 8                                   
  A2 = 13                                  |  A2 = 4                                   
  A3 = 19                                  |  B = 6                                    
  ZN = 192                                 |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 25                                  |  A1 = 7                                   
  A2 = 20                                  |  A2 = 4                                   
  A3 = 17                                  |  B = 2                                    
  ZN = 25                                  |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 523                                 |  A1 = 11                                  
  A2 = 523                                 |  A2 = 3                                   
  A3 = 523                                 |  B = 9                                    
  ZN = 523                                 |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 654                                 |  A1 = 11                                  
  A2 = 654                                 |  A2 = 3                                   
  A3 = 3                                   |  B = 5                                    
  ZN = 654                                 |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 143                                 |  A1 = 5                                   
  A2 = 14                                  |  A2 = 3                                   
  A3 = 143                                 |  B = 10                                   
  ZN = 4                                   |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 1014                                |  A1 = 11                                  
  A2 = 8                                   |  A2 = 3                                   
  A3 = 8                                   |  B = 4                                    
  ZN = 3                                   |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 75                                  |  A1 = 6                                   
  A2 = 11                                  |  A2 = 8                                   
  A3 = 75                                  |  B = 4                                    
  ZN = 75                                  |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 61                                  |  A1 = 11                                  
  A2 = 15                                  |  A2 = 3                                   
  A3 = 61                                  |  B = 11                                   
  ZN = 8                                   |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 123                                 |  A1 = 4                                   
  A2 = 123                                 |  A2 = 8                                   
  A3 = 123                                 |  B = 10                                   
  ZN = 123                                 |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 32                                  |  A1 = 9                                   
  A2 = 4                                   |  A2 = 3                                   
  A3 = 10                                  |  B = 11                                   
  ZN = 3                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 97                                  |  A1 = 8                                   
  A2 = 12                                  |  A2 = 4                                   
  A3 = 97                                  |  B = 2                                    
  ZN = 12                                  |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 250                                 |  A1 = 6                                   
  A2 = 250                                 |  A2 = 3                                   
  A3 = 250                                 |  B = 11                                   
  ZN = 7                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 17                                  |  A1 = 11                                  
  A2 = 17                                  |  A2 = 5                                   
  A3 = 25                                  |  B = 5                                    
  ZN = 26                                  |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 1014                                |  A1 = 5                                   
  A2 = 1014                                |  A2 = 4                                   
  A3 = 7                                   |  B = 4                                    
  ZN = 48                                  |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 95                                  |  A1 = 6                                   
  A2 = 95                                  |  A2 = 2                                   
  A3 = 95                                  |  B = 9                                    
  ZN = 95                                  |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 60                                  |  A1 = 3                                   
  A2 = 60                                  |  A2 = 8                                   
  A3 = 10                                  |  B = 4                                    
  ZN = 60                                  |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 12                                  |  A1 = 11                                  
  A2 = 11                                  |  A2 = 7                                   
  A3 = 6                                   |  B = 7                                    
  ZN = 11                                  |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 699                                 |  A1 = 11                                  
  A2 = 699                                 |  A2 = 6                                   
  A3 = 699                                 |  B = 8                                    
  ZN = 699                                 |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 40                                  |  A1 = 11                                  
  A2 = 40                                  |  A2 = 3                                   
  A3 = 13                                  |  B = 8                                    
  ZN = 10                                  |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 7                                   |  A1 = 3                                   
  A2 = 5                                   |  A2 = 7                                   
  A3 = 112                                 |  B = 5                                    
  ZN = 5                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 654                                 |  A1 = 7                                   
  A2 = 654                                 |  A2 = 4                                   
  A3 = 654                                 |  B = 4                                    
  ZN = 654                                 |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 19                                  |  A1 = 5                                   
  A2 = 19                                  |  A2 = 5                                   
  A3 = 7                                   |  B = 3                                    
  ZN = 19                                  |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 1463                                |  A1 = 5                                   
  A2 = 250                                 |  A2 = 5                                   
  A3 = 393                                 |  B = 3                                    
  ZN = 393                                 |  ZN = 6                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 1014                                |  A1 = 3                                   
  A2 = 15                                  |  A2 = 2                                   
  A3 = 1014                                |  B = 4                                    
  ZN = 15                                  |  ZN = 6                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 164                                 |  A1 = 11                                  
  A2 = 164                                 |  A2 = 3                                   
  A3 = 38                                  |  B = 2                                    
  ZN = 164                                 |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 117                                 |  A1 = 4                                   
  A2 = 26                                  |  A2 = 3                                   
  A3 = 117                                 |  B = 10                                   
  ZN = 117                                 |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 12                                  |  A1 = 5                                   
  A2 = 18                                  |  A2 = 3                                   
  A3 = 12                                  |  B = 3                                    
  ZN = 12                                  |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 7                                   |  A1 = 11                                  
  A2 = 11                                  |  A2 = 4                                   
  A3 = 3                                   |  B = 3                                    
  ZN = 117                                 |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 192                                 |  A1 = 11                                  
  A2 = 192                                 |  A2 = 4                                   
  A3 = 9                                   |  B = 9                                    
  ZN = 192                                 |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 38                                  |  A1 = 7                                   
  A2 = 19                                  |  A2 = 10                                  
  A3 = 122                                 |  B = 3                                    
  ZN = 38                                  |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 654                                 |  A1 = 7                                   
  A2 = 50                                  |  A2 = 10                                  
  A3 = 71                                  |  B = 9                                    
  ZN = 2                                   |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 6                                   |  A1 = 5                                   
  A2 = 5                                   |  A2 = 3                                   
  A3 = 4                                   |  B = 2                                    
  ZN = 2                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 5                                   |  A1 = 9                                   
  A2 = 9                                   |  A2 = 4                                   
  A3 = 5                                   |  B = 5                                    
  ZN = 2                                   |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 11                                  |  A1 = 11                                  
  A2 = 11                                  |  A2 = 3                                   
  A3 = 11                                  |  B = 3                                    
  ZN = 2                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 3                                   |  A1 = 11                                  
  A2 = 8                                   |  A2 = 4                                   
  A3 = 4                                   |  B = 2                                    
  ZN = 2                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 9                                   |  A1 = 11                                  
  A2 = 13                                  |  A2 = 5                                   
  A3 = 4                                   |  B = 5                                    
  ZN = 5                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand3_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 4                                   |  A1 = 4                                   
  A2 = 4                                   |  A2 = 4                                   
  A3 = 11                                  |  B = 5                                    
  ZN = 2                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 40                                   |  A1 = 11                                  
  ZN = 6                                   |  A2 = 3                                   
  VDD = 275388                             |  B = 5                                    
  VNW = 275388                             |  ZN = 4                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 96                                   |  A1 = 4                                   
  ZN = 96                                  |  A2 = 2                                   
  VDD = 275388                             |  B = 11                                   
  VNW = 275388                             |  ZN = 5                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 6                                    |  A1 = 3                                   
  ZN = 16                                  |  A2 = 3                                   
  VDD = 275388                             |  B = 7                                    
  VNW = 275388                             |  ZN = 4                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 26                                   |  A1 = 11                                  
  ZN = 9                                   |  A2 = 3                                   
  VDD = 275388                             |  B = 4                                    
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 30                                   |  A1 = 10                                  
  ZN = 7                                   |  A2 = 2                                   
  VDD = 275388                             |  B = 4                                    
  VNW = 275388                             |  ZN = 5                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 75                                   |  A1 = 3                                   
  ZN = 11                                  |  A2 = 2                                   
  VDD = 275388                             |  B = 10                                   
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 3                                    |  A1 = 10                                  
  ZN = 3                                   |  A2 = 11                                  
  VDD = 275388                             |  B = 7                                    
  VNW = 275388                             |  ZN = 7                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 143                                  |  A1 = 3                                   
  ZN = 143                                 |  A2 = 2                                   
  VDD = 275388                             |  B = 7                                    
  VNW = 275388                             |  ZN = 4                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 16                                   |  A1 = 8                                   
  ZN = 8                                   |  A2 = 3                                   
  VDD = 275388                             |  B = 9                                    
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 187                                  |  A1 = 6                                   
  ZN = 187                                 |  A2 = 3                                   
  VDD = 275388                             |  B = 8                                    
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 11                                   |  A1 = 4                                   
  ZN = 33                                  |  A2 = 11                                  
  VDD = 275388                             |  B = 4                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 1463                                 |  A1 = 11                                  
  ZN = 1463                                |  A2 = 4                                   
  VDD = 275388                             |  B = 7                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 55                                   |  A1 = 3                                   
  ZN = 55                                  |  A2 = 7                                   
  VDD = 275388                             |  B = 9                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 24                                   |  A1 = 5                                   
  ZN = 1463                                |  A2 = 10                                  
  VDD = 275388                             |  B = 11                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 68                                   |  A1 = 8                                   
  ZN = 68                                  |  A2 = 9                                   
  VDD = 275388                             |  B = 5                                    
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 95                                   |  A1 = 11                                  
  ZN = 95                                  |  A2 = 10                                  
  VDD = 275388                             |  B = 5                                    
  VNW = 275388                             |  ZN = 4                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 200                                  |  A1 = 3                                   
  ZN = 11                                  |  A2 = 2                                   
  VDD = 275388                             |  B = 6                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 16                                   |  A1 = 8                                   
  ZN = 250                                 |  A2 = 5                                   
  VDD = 275388                             |  B = 4                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 40                                   |  A1 = 5                                   
  ZN = 40                                  |  A2 = 4                                   
  VDD = 275388                             |  B = 8                                    
  VNW = 275388                             |  ZN = 4                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 11                                   |  A1 = 11                                  
  ZN = 3                                   |  A2 = 3                                   
  VDD = 275388                             |  B = 11                                   
  VNW = 275388                             |  ZN = 4                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 9                                    |  A1 = 4                                   
  ZN = 8                                   |  A2 = 5                                   
  VDD = 275388                             |  B = 4                                    
  VNW = 275388                             |  ZN = 4                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 41                                   |  A1 = 7                                   
  ZN = 8                                   |  A2 = 7                                   
  VDD = 275388                             |  B = 7                                    
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 13                                   |  A1 = 6                                   
  ZN = 13                                  |  A2 = 2                                   
  VDD = 275388                             |  B = 3                                    
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 1014                                 |  A1 = 8                                   
  ZN = 1014                                |  A2 = 5                                   
  VDD = 275388                             |  B = 2                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core7.b.arb_data_ou 
  I = 67                                   |  A1 = 7                                   
  ZN = 67                                  |  A2 = 4                                   
  VDD = 275388                             |  B = 2                                    
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core7.b.arb_data_ou 
  I = 91                                   |  A1 = 7                                   
  ZN = 2                                   |  A2 = 4                                   
  VDD = 275388                             |  B = 9                                    
  VNW = 275388                             |  ZN = 5                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core7.b.arb_data_ou 
  I = 60                                   |  A1 = 11                                  
  ZN = 60                                  |  A2 = 4                                   
  VDD = 275388                             |  B = 11                                   
  VNW = 275388                             |  ZN = 5                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core7.b.arb_data_ou 
  I = 113                                  |  A1 = 8                                   
  ZN = 71                                  |  A2 = 3                                   
  VDD = 275388                             |  B = 3                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core7.b.arb_data_ou 
  I = 11                                   |  A1 = 8                                   
  ZN = 11                                  |  A2 = 3                                   
  VDD = 275388                             |  B = 8                                    
  VNW = 275388                             |  ZN = 5                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core7.b.arb_data_ou 
  I = 393                                  |  A1 = 4                                   
  ZN = 2                                   |  A2 = 3                                   
  VDD = 275388                             |  B = 2                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core7.b.arb_data_ou 
  I = 26                                   |  A1 = 5                                   
  ZN = 117                                 |  A2 = 7                                   
  VDD = 275388                             |  B = 3                                    
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core7.b.gen_square[ 
  I = 22                                   |  A1 = 8                                   
  ZN = 22                                  |  A2 = 3                                   
  VDD = 275388                             |  B = 9                                    
  VNW = 275388                             |  ZN = 4                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core7.b.gen_square[ 
  I = 60                                   |  A1 = 7                                   
  ZN = 60                                  |  A2 = 2                                   
  VDD = 275388                             |  B = 5                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core7.b.gen_square[ 
  I = 1014                                 |  A1 = 4                                   
  ZN = 1014                                |  A2 = 3                                   
  VDD = 275388                             |  B = 2                                    
  VNW = 275388                             |  ZN = 5                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core7.b.gen_square[ 
  I = 172                                  |  A1 = 11                                  
  ZN = 172                                 |  A2 = 3                                   
  VDD = 275388                             |  B = 2                                    
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core7.b.gen_square[ 
  I = 194                                  |  A1 = 4                                   
  ZN = 10                                  |  A2 = 8                                   
  VDD = 275388                             |  B = 8                                    
  VNW = 275388                             |  ZN = 4                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core7.b.gen_square[ 
  I = 25                                   |  A1 = 11                                  
  ZN = 1463                                |  A2 = 3                                   
  VDD = 275388                             |  B = 3                                    
  VNW = 275388                             |  ZN = 4                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core7.b.gen_square[ 
  I = 699                                  |  A1 = 11                                  
  ZN = 15                                  |  A2 = 3                                   
  VDD = 275388                             |  B = 8                                    
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core7.b.gen_square[ 
  I = 1014                                 |  A1 = 11                                  
  ZN = 1014                                |  A2 = 3                                   
  VDD = 275388                             |  B = 3                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core7.b.gen_square[ 
  I = 148                                  |  A1 = 5                                   
  ZN = 148                                 |  A2 = 3                                   
  VDD = 275388                             |  B = 10                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 55                                   |  A1 = 11                                  
  ZN = 112                                 |  A2 = 5                                   
  VDD = 275388                             |  B = 5                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 13                                   |  A1 = 11                                  
  ZN = 13                                  |  A2 = 5                                   
  VDD = 275388                             |  B = 5                                    
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 61                                   |  A1 = 4                                   
  ZN = 4                                   |  A2 = 3                                   
  VDD = 275388                             |  B = 6                                    
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 11                                   |  A1 = 5                                   
  ZN = 11                                  |  A2 = 11                                  
  VDD = 275388                             |  B = 4                                    
  VNW = 275388                             |  ZN = 6                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 218                                  |  A1 = 11                                  
  ZN = 218                                 |  A2 = 6                                   
  VDD = 275388                             |  B = 6                                    
  VNW = 275388                             |  ZN = 4                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 43                                   |  A1 = 11                                  
  ZN = 3                                   |  A2 = 3                                   
  VDD = 275388                             |  B = 4                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 172                                  |  A1 = 8                                   
  ZN = 172                                 |  A2 = 4                                   
  VDD = 275388                             |  B = 4                                    
  VNW = 275388                             |  ZN = 5                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 117                                  |  A1 = 3                                   
  ZN = 117                                 |  A2 = 6                                   
  VDD = 275388                             |  B = 9                                    
  VNW = 275388                             |  ZN = 5                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 243                                  |  A1 = 3                                   
  ZN = 243                                 |  A2 = 3                                   
  VDD = 275388                             |  B = 6                                    
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 79                                   |  A1 = 7                                   
  ZN = 79                                  |  A2 = 5                                   
  VDD = 275388                             |  B = 2                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 30                                   |  A1 = 4                                   
  ZN = 6                                   |  A2 = 9                                   
  VDD = 275388                             |  B = 9                                    
  VNW = 275388                             |  ZN = 4                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 13                                   |  A1 = 2                                   
  ZN = 2                                   |  A2 = 4                                   
  VDD = 275388                             |  B = 2                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.gen_square[ 
  I = 33                                   |  A1 = 6                                   
  ZN = 4                                   |  A2 = 7                                   
  VDD = 275388                             |  B = 8                                    
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core3.b.gen_square[ 
  I = 392                                  |  A1 = 11                                  
  ZN = 392                                 |  A2 = 2                                   
  VDD = 275388                             |  B = 2                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 40                                   |  A1 = 3                                   
  ZN = 392                                 |  A2 = 4                                   
  VDD = 275388                             |  B = 3                                    
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 142                                  |  A1 = 4                                   
  ZN = 50                                  |  A2 = 2                                   
  VDD = 275388                             |  B = 10                                   
  VNW = 275388                             |  ZN = 4                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core1.b.gen_square[ 
  I = 194                                  |  A1 = 5                                   
  ZN = 194                                 |  A2 = 3                                   
  VDD = 275388                             |  B = 7                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core1.b.illegal_gf1 
  I = 654                                  |  A1 = 5                                   
  ZN = 654                                 |  A2 = 4                                   
  VDD = 275388                             |  B = 11                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 14                                   |  A1 = 5                                   
  ZN = 7                                   |  A2 = 2                                   
  VDD = 275388                             |  B = 5                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core3.b.arb_data_ou 
  I = 34                                   |  A1 = 5                                   
  ZN = 24                                  |  A2 = 3                                   
  VDD = 275388                             |  B = 7                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core3.b.gen_square[ 
  I = 8                                    |  A1 = 4                                   
  ZN = 8                                   |  A2 = 2                                   
  VDD = 275388                             |  B = 3                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 1463                                 |  A1 = 3                                   
  ZN = 3                                   |  A2 = 2                                   
  VDD = 275388                             |  B = 5                                    
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 11                                   |  A1 = 4                                   
  ZN = 11                                  |  A2 = 4                                   
  VDD = 275388                             |  B = 3                                    
  VNW = 275388                             |  ZN = 5                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 97                                   |  A1 = 4                                   
  ZN = 97                                  |  A2 = 7                                   
  VDD = 275388                             |  B = 8                                    
  VNW = 275388                             |  ZN = 7                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core5.b.arb_data_ou 
  I = 699                                  |  A1 = 3                                   
  ZN = 5                                   |  A2 = 5                                   
  VDD = 275388                             |  B = 4                                    
  VNW = 275388                             |  ZN = 4                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.arb_data_ou 
  I = 6                                    |  A1 = 4                                   
  ZN = 6                                   |  A2 = 3                                   
  VDD = 275388                             |  B = 7                                    
  VNW = 275388                             |  ZN = 4                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.gen_square[ 
  I = 291                                  |  A1 = 6                                   
  ZN = 3                                   |  A2 = 4                                   
  VDD = 275388                             |  B = 6                                    
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core7.b.gen_square[ 
  I = 37                                   |  A1 = 11                                  
  ZN = 37                                  |  A2 = 5                                   
  VDD = 275388                             |  B = 4                                    
  VNW = 275388                             |  ZN = 5                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 42                                   |  A1 = 4                                   
  ZN = 393                                 |  A2 = 11                                  
  VDD = 275388                             |  B = 4                                    
  VNW = 275388                             |  ZN = 5                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 9                                    |  I0 = 4                                   
  ZN = 392                                 |  I1 = 2                                   
  VDD = 275388                             |  S = 6                                    
  VNW = 275388                             |  Z = 3                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 143                                  |  I0 = 3                                   
  ZN = 143                                 |  I1 = 2                                   
  VDD = 275388                             |  S = 11                                   
  VNW = 275388                             |  Z = 2                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 8                                    |  I0 = 3                                   
  ZN = 4                                   |  I1 = 5                                   
  VDD = 275388                             |  S = 5                                    
  VNW = 275388                             |  Z = 2                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 1014                                 |  I0 = 4                                   
  ZN = 1014                                |  I1 = 3                                   
  VDD = 275388                             |  S = 10                                   
  VNW = 275388                             |  Z = 2                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 194                                  |  I0 = 4                                   
  ZN = 194                                 |  I1 = 2                                   
  VDD = 275388                             |  S = 9                                    
  VNW = 275388                             |  Z = 2                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 55                                   |  I0 = 4                                   
  ZN = 8                                   |  I1 = 2                                   
  VDD = 275388                             |  S = 8                                    
  VNW = 275388                             |  Z = 2                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 9                                    |  I0 = 4                                   
  ZN = 7                                   |  I1 = 3                                   
  VDD = 275388                             |  S = 9                                    
  VNW = 275388                             |  Z = 2                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core3.b.arb_data_ou 
  I = 250                                  |  I0 = 3                                   
  ZN = 1463                                |  I1 = 2                                   
  VDD = 275388                             |  S = 10                                   
  VNW = 275388                             |  Z = 3                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core3.b.gen_square[ 
  I = 95                                   |  I0 = 2                                   
  ZN = 95                                  |  I1 = 6                                   
  VDD = 275388                             |  S = 3                                    
  VNW = 275388                             |  Z = 2                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core3.b.gen_square[ 
  I = 699                                  |  I0 = 3                                   
  ZN = 699                                 |  I1 = 5                                   
  VDD = 275388                             |  S = 7                                    
  VNW = 275388                             |  Z = 2                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 14                                   |  I0 = 2                                   
  ZN = 5                                   |  I1 = 2                                   
  VDD = 275388                             |  S = 11                                   
  VNW = 275388                             |  Z = 2                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 13                                   |  I0 = 5                                   
  ZN = 24                                  |  I1 = 4                                   
  VDD = 275388                             |  S = 11                                   
  VNW = 275388                             |  Z = 5                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 61                                   |  I0 = 5                                   
  ZN = 61                                  |  I1 = 3                                   
  VDD = 275388                             |  S = 4                                    
  VNW = 275388                             |  Z = 3                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 40                                   |  I0 = 3                                   
  ZN = 8                                   |  I1 = 3                                   
  VDD = 275388                             |  S = 11                                   
  VNW = 275388                             |  Z = 2                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 9                                    |  I0 = 2                                   
  ZN = 25                                  |  I1 = 2                                   
  VDD = 275388                             |  S = 9                                    
  VNW = 275388                             |  Z = 2                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 52                                   |  I0 = 4                                   
  ZN = 187                                 |  I1 = 4                                   
  VDD = 275388                             |  S = 7                                    
  VNW = 275388                             |  Z = 3                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 654                                  |  I0 = 3                                   
  ZN = 44                                  |  I1 = 3                                   
  VDD = 275388                             |  S = 11                                   
  VNW = 275388                             |  Z = 2                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 243                                  |  I0 = 5                                   
  ZN = 243                                 |  I1 = 5                                   
  VDD = 275388                             |  S = 4                                    
  VNW = 275388                             |  Z = 2                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 90                                   |  I0 = 6                                   
  ZN = 90                                  |  I1 = 5                                   
  VDD = 275388                             |  S = 3                                    
  VNW = 275388                             |  Z = 2                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 13                                   |  I0 = 3                                   
  ZN = 13                                  |  I1 = 5                                   
  VDD = 275388                             |  S = 7                                    
  VNW = 275388                             |  Z = 2                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 523                                  |  I0 = 4                                   
  ZN = 9                                   |  I1 = 5                                   
  VDD = 275388                             |  S = 4                                    
  VNW = 275388                             |  Z = 5                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 17                                   |  I0 = 2                                   
  ZN = 19                                  |  I1 = 4                                   
  VDD = 275388                             |  S = 4                                    
  VNW = 275388                             |  Z = 2                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 194                                  |  I0 = 5                                   
  ZN = 194                                 |  I1 = 2                                   
  VDD = 275388                             |  S = 10                                   
  VNW = 275388                             |  Z = 3                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 60                                   |  I0 = 3                                   
  ZN = 60                                  |  I1 = 5                                   
  VDD = 275388                             |  S = 8                                    
  VNW = 275388                             |  Z = 3                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core5.b.gen_square[ 
  I = 33                                   |  I0 = 4                                   
  ZN = 33                                  |  I1 = 4                                   
  VDD = 275388                             |  S = 11                                   
  VNW = 275388                             |  Z = 2                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 95                                   |  I0 = 2                                   
  ZN = 95                                  |  I1 = 2                                   
  VDD = 275388                             |  S = 7                                    
  VNW = 275388                             |  Z = 2                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.gen_square[ 
  I = 3                                    |  I0 = 3                                   
  ZN = 10                                  |  I1 = 2                                   
  VDD = 275388                             |  S = 11                                   
  VNW = 275388                             |  Z = 3                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.gen_square[ 
  I = 12                                   |  I0 = 4                                   
  ZN = 12                                  |  I1 = 3                                   
  VDD = 275388                             |  S = 8                                    
  VNW = 275388                             |  Z = 2                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 122                                  |  I0 = 3                                   
  ZN = 122                                 |  I1 = 3                                   
  VDD = 275388                             |  S = 5                                    
  VNW = 275388                             |  Z = 2                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 32                                   |  I0 = 4                                   
  ZN = 4                                   |  I1 = 3                                   
  VDD = 275388                             |  S = 9                                    
  VNW = 275388                             |  Z = 2                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 9                                    |  I0 = 5                                   
  ZN = 35                                  |  I1 = 5                                   
  VDD = 275388                             |  S = 7                                    
  VNW = 275388                             |  Z = 3                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 7                                    |  I0 = 3                                   
  ZN = 7                                   |  I1 = 3                                   
  VDD = 275388                             |  S = 9                                    
  VNW = 275388                             |  Z = 3                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 14                                   |  I0 = 5                                   
  ZN = 14                                  |  I1 = 2                                   
  VDD = 275388                             |  S = 8                                    
  VNW = 275388                             |  Z = 2                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 26                                   |  I0 = 3                                   
  ZN = 142                                 |  I1 = 2                                   
  VDD = 275388                             |  S = 11                                   
  VNW = 275388                             |  Z = 2                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 32                                   |  I0 = 7                                   
  ZN = 5                                   |  I1 = 5                                   
  VDD = 275388                             |  S = 4                                    
  VNW = 275388                             |  Z = 3                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 13                                   |  I0 = 8                                   
  ZN = 5                                   |  I1 = 4                                   
  VDD = 275388                             |  S = 11                                   
  VNW = 275388                             |  Z = 3                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core0.b.arb_data_ou 
  I = 10                                   |  A1 = 11                                  
  ZN = 10                                  |  A2 = 5                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  Z = 2                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 60                                   |  A1 = 11                                  
  ZN = 1014                                |  A2 = 6                                   
  VDD = 275388                             |  A3 = 4                                   
  VNW = 275388                             |  Z = 9                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core1.b.arb_data_ou 
  I = 8                                    |  A1 = 11                                  
  ZN = 13                                  |  A2 = 5                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  Z = 6                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 523                                  |  A1 = 11                                  
  ZN = 523                                 |  A2 = 7                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  Z = 7                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 21                                   |  A1 = 11                                  
  ZN = 21                                  |  A2 = 5                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  Z = 7                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 10                                   |  A1 = 11                                  
  ZN = 2                                   |  A2 = 5                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  Z = 7                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 250                                  |  A1 = 4                                   
  ZN = 250                                 |  A2 = 6                                   
  VDD = 275388                             |  A3 = 4                                   
  VNW = 275388                             |  Z = 5                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 218                                  |  A1 = 8                                   
  ZN = 218                                 |  A2 = 4                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  Z = 5                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 58                                   |  A1 = 11                                  
  ZN = 58                                  |  A2 = 5                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  Z = 5                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core3.b.gen_square[ 
  I = 14                                   |  A1 = 4                                   
  ZN = 14                                  |  A2 = 5                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  Z = 6                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 36                                   |  A1 = 5                                   
  ZN = 36                                  |  A2 = 3                                   
  VDD = 275388                             |  A3 = 4                                   
  VNW = 275388                             |  Z = 7                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 1014                                 |  A1 = 11                                  
  ZN = 1014                                |  A2 = 5                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  Z = 7                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 17                                   |  A1 = 5                                   
  ZN = 17                                  |  A2 = 4                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  Z = 5                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 90                                   |  A1 = 5                                   
  ZN = 90                                  |  A2 = 4                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  Z = 10                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 654                                  |  A1 = 4                                   
  ZN = 654                                 |  A2 = 5                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  Z = 6                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 654                                  |  A1 = 11                                  
  ZN = 654                                 |  A2 = 3                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  Z = 7                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 21                                   |  A1 = 11                                  
  ZN = 21                                  |  A2 = 3                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  Z = 5                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 60                                   |  A1 = 11                                  
  ZN = 60                                  |  A2 = 5                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  Z = 5                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 393                                  |  A1 = 5                                   
  ZN = 393                                 |  A2 = 4                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  Z = 2                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 17                                   |  A1 = 5                                   
  ZN = 10                                  |  A2 = 5                                   
  VDD = 275388                             |  A3 = 11                                  
  VNW = 275388                             |  Z = 2                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 1463                                 |  A1 = 11                                  
  ZN = 1463                                |  A2 = 5                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  Z = 8                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 17                                   |  A1 = 11                                  
  ZN = 8                                   |  A2 = 5                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  Z = 7                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 41                                   |  A1 = 11                                  
  ZN = 41                                  |  A2 = 6                                   
  VDD = 275388                             |  A3 = 2                                   
  VNW = 275388                             |  Z = 4                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 14                                   |  A1 = 5                                   
  ZN = 24                                  |  A2 = 4                                   
  VDD = 275388                             |  A3 = 2                                   
  VNW = 275388                             |  Z = 7                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 291                                  |  A1 = 5                                   
  ZN = 1014                                |  A2 = 4                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  Z = 6                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 56                                   |  A1 = 11                                  
  ZN = 122                                 |  A2 = 4                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  Z = 8                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.arb_data_ou 
  I = 38                                   |  A1 = 11                                  
  ZN = 18                                  |  A2 = 3                                   
  VDD = 275388                             |  A3 = 5                                   
  VNW = 275388                             |  Z = 9                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.gen_square[ 
  I = 1014                                 |  A1 = 6                                   
  ZN = 5                                   |  A2 = 6                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  Z = 7                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.gen_square[ 
  I = 29                                   |  A1 = 5                                   
  ZN = 29                                  |  A2 = 5                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  Z = 3                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 10                                   |  A1 = 11                                  
  ZN = 10                                  |  A2 = 5                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  Z = 5                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 523                                  |  A1 = 11                                  
  ZN = 523                                 |  A2 = 5                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  Z = 7                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 392                                  |  A1 = 6                                   
  ZN = 392                                 |  A2 = 6                                   
  VDD = 275388                             |  A3 = 4                                   
  VNW = 275388                             |  Z = 5                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 7                                    |  A1 = 3                                   
  ZN = 11                                  |  A2 = 5                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  Z = 5                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 8                                    |  A1 = 5                                   
  ZN = 1463                                |  A2 = 3                                   
  VDD = 275388                             |  A3 = 5                                   
  VNW = 275388                             |  Z = 2                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 13                                   |  A1 = 9                                   
  ZN = 9                                   |  A2 = 4                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  Z = 6                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core3.b.gen_square[ 
  I = 193                                  |  A1 = 11                                  
  ZN = 14                                  |  A2 = 5                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  Z = 3                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.gen_square[ 
  I = 1463                                 |  A1 = 3                                   
  ZN = 1463                                |  A2 = 5                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  Z = 5                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 699                                  |  A1 = 11                                  
  ZN = 4                                   |  A2 = 4                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  Z = 5                                    
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core0.b.arb_data_ou 
  I = 16                                   |  A1 = 5                                   
  ZN = 16                                  |  A2 = 6                                   
  VDD = 275388                             |  A3 = 5                                   
  VNW = 275388                             |  ZN = 5                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core0.b.arb_data_ou 
  I = 41                                   |  A1 = 5                                   
  ZN = 41                                  |  A2 = 3                                   
  VDD = 275388                             |  A3 = 5                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core0.b.arb_data_ou 
  I = 180                                  |  A1 = 11                                  
  ZN = 180                                 |  A2 = 5                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 523                                  |  A1 = 9                                   
  ZN = 523                                 |  A2 = 11                                  
  VDD = 275388                             |  A3 = 9                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 10                                   |  A1 = 11                                  
  ZN = 10                                  |  A2 = 8                                   
  VDD = 275388                             |  A3 = 6                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 123                                  |  A1 = 8                                   
  ZN = 123                                 |  A2 = 5                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 60                                   |  A1 = 7                                   
  ZN = 60                                  |  A2 = 6                                   
  VDD = 275388                             |  A3 = 2                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 1014                                 |  A1 = 4                                   
  ZN = 1014                                |  A2 = 5                                   
  VDD = 275388                             |  A3 = 5                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 187                                  |  A1 = 11                                  
  ZN = 187                                 |  A2 = 5                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 699                                  |  A1 = 11                                  
  ZN = 699                                 |  A2 = 3                                   
  VDD = 275388                             |  A3 = 6                                   
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 699                                  |  A1 = 4                                   
  ZN = 699                                 |  A2 = 6                                   
  VDD = 275388                             |  A3 = 4                                   
  VNW = 275388                             |  ZN = 4                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 96                                   |  A1 = 11                                  
  ZN = 291                                 |  A2 = 6                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 26                                   |  A1 = 11                                  
  ZN = 26                                  |  A2 = 5                                   
  VDD = 275388                             |  A3 = 5                                   
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 250                                  |  A1 = 5                                   
  ZN = 3                                   |  A2 = 3                                   
  VDD = 275388                             |  A3 = 4                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 654                                  |  A1 = 6                                   
  ZN = 654                                 |  A2 = 3                                   
  VDD = 275388                             |  A3 = 2                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkinv_ |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 53                                   |  A1 = 10                                  
  ZN = 53                                  |  A2 = 6                                   
  VDD = 275388                             |  A3 = 2                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 11                                  |  A1 = 11                                  
  A2 = 172                                 |  A2 = 7                                   
  ZN = 11                                  |  A3 = 11                                  
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 19                                  |  A1 = 10                                  
  A2 = 10                                  |  A2 = 5                                   
  ZN = 2                                   |  A3 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 13                                  |  A1 = 3                                   
  A2 = 15                                  |  A2 = 3                                   
  ZN = 192                                 |  A3 = 2                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 392                                 |  A1 = 5                                   
  A2 = 392                                 |  A2 = 6                                   
  ZN = 392                                 |  A3 = 4                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 31                                  |  A1 = 11                                  
  A2 = 187                                 |  A2 = 5                                   
  ZN = 38                                  |  A3 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core1.b.arb_data_ou 
  A1 = 9                                   |  A1 = 9                                   
  A2 = 27                                  |  A2 = 3                                   
  ZN = 27                                  |  A3 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core1.b.arb_data_ou 
  A1 = 1463                                |  A1 = 11                                  
  A2 = 5                                   |  A2 = 5                                   
  ZN = 32                                  |  A3 = 3                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core1.b.arb_data_ou 
  A1 = 654                                 |  A1 = 11                                  
  A2 = 654                                 |  A2 = 6                                   
  ZN = 30                                  |  A3 = 4                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core1.b.illegal_gf1 
  A1 = 143                                 |  A1 = 4                                   
  A2 = 143                                 |  A2 = 4                                   
  ZN = 143                                 |  A3 = 3                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core2.b.arb_data_ou 
  A1 = 100                                 |  A1 = 11                                  
  A2 = 100                                 |  A2 = 5                                   
  ZN = 100                                 |  A3 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core2.b.gen_square[ 
  A1 = 699                                 |  A1 = 11                                  
  A2 = 16                                  |  A2 = 7                                   
  ZN = 16                                  |  A3 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core2.b.gen_square[ 
  A1 = 61                                  |  A1 = 11                                  
  A2 = 5                                   |  A2 = 5                                   
  ZN = 7                                   |  A3 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core2.b.gen_square[ 
  A1 = 35                                  |  A1 = 7                                   
  A2 = 35                                  |  A2 = 3                                   
  ZN = 35                                  |  A3 = 4                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core2.b.gen_square[ 
  A1 = 14                                  |  A1 = 11                                  
  A2 = 1014                                |  A2 = 5                                   
  ZN = 18                                  |  A3 = 3                                   
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 16                                  |  A1 = 8                                   
  A2 = 15                                  |  A2 = 11                                  
  ZN = 15                                  |  A3 = 11                                  
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 12                                  |  A1 = 11                                  
  A2 = 8                                   |  A2 = 7                                   
  ZN = 8                                   |  A3 = 5                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 192                                 |  A1 = 10                                  
  A2 = 11                                  |  A2 = 8                                   
  ZN = 11                                  |  A3 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 1014                                |  A1 = 11                                  
  A2 = 1014                                |  A2 = 6                                   
  ZN = 2                                   |  A3 = 4                                   
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 393                                 |  A1 = 11                                  
  A2 = 393                                 |  A2 = 6                                   
  ZN = 393                                 |  A3 = 3                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 34                                  |  A1 = 8                                   
  A2 = 34                                  |  A2 = 5                                   
  ZN = 34                                  |  A3 = 5                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 523                                 |  A1 = 10                                  
  A2 = 523                                 |  A2 = 3                                   
  ZN = 523                                 |  A3 = 5                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 32                                  |  A1 = 3                                   
  A2 = 32                                  |  A2 = 4                                   
  ZN = 32                                  |  A3 = 6                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 7                                   |  A1 = 10                                  
  A2 = 18                                  |  A2 = 3                                   
  ZN = 193                                 |  A3 = 5                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 15                                  |  A1 = 11                                  
  A2 = 43                                  |  A2 = 5                                   
  ZN = 43                                  |  A3 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 393                                 |  A1 = 11                                  
  A2 = 393                                 |  A2 = 9                                   
  ZN = 393                                 |  A3 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 7                                   |  A1 = 11                                  
  A2 = 13                                  |  A2 = 3                                   
  ZN = 12                                  |  A3 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core3.b.arb_data_ou 
  A1 = 2                                   |  A1 = 4                                   
  A2 = 2                                   |  A2 = 3                                   
  ZN = 193                                 |  A3 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core3.b.arb_data_ou 
  A1 = 6                                   |  A1 = 3                                   
  A2 = 8                                   |  A2 = 3                                   
  ZN = 8                                   |  A3 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core3.b.gen_square[ 
  A1 = 9                                   |  A1 = 11                                  
  A2 = 8                                   |  A2 = 6                                   
  ZN = 8                                   |  A3 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core3.b.gen_square[ 
  A1 = 19                                  |  A1 = 6                                   
  A2 = 18                                  |  A2 = 10                                  
  ZN = 19                                  |  A3 = 4                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core3.b.gen_square[ 
  A1 = 9                                   |  A1 = 11                                  
  A2 = 172                                 |  A2 = 5                                   
  ZN = 9                                   |  A3 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core3.b.gen_square[ 
  A1 = 8                                   |  A1 = 4                                   
  A2 = 9                                   |  A2 = 5                                   
  ZN = 9                                   |  A3 = 3                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core3.b.gen_square[ 
  A1 = 87                                  |  A1 = 4                                   
  A2 = 87                                  |  A2 = 5                                   
  ZN = 87                                  |  A3 = 3                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 12                                  |  A1 = 11                                  
  A2 = 5                                   |  A2 = 5                                   
  ZN = 12                                  |  A3 = 3                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 95                                  |  A1 = 5                                   
  A2 = 95                                  |  A2 = 5                                   
  ZN = 95                                  |  A3 = 4                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 172                                 |  A1 = 6                                   
  A2 = 10                                  |  A2 = 5                                   
  ZN = 172                                 |  A3 = 5                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 9                                   |  A1 = 6                                   
  A2 = 8                                   |  A2 = 5                                   
  ZN = 9                                   |  A3 = 5                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 56                                  |  A1 = 11                                  
  A2 = 56                                  |  A2 = 5                                   
  ZN = 56                                  |  A3 = 11                                  
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 9                                   |  A1 = 5                                   
  A2 = 6                                   |  A2 = 3                                   
  ZN = 6                                   |  A3 = 4                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 55                                  |  A1 = 11                                  
  A2 = 55                                  |  A2 = 5                                   
  ZN = 55                                  |  A3 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 16                                  |  A1 = 8                                   
  A2 = 14                                  |  A2 = 5                                   
  ZN = 14                                  |  A3 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 142                                 |  A1 = 3                                   
  A2 = 3                                   |  A2 = 3                                   
  ZN = 67                                  |  A3 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 1014                                |  A1 = 2                                   
  A2 = 94                                  |  A2 = 3                                   
  ZN = 1014                                |  A3 = 2                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 11                                  |  A1 = 6                                   
  A2 = 7                                   |  A2 = 4                                   
  ZN = 7                                   |  A3 = 4                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 1014                                |  A1 = 8                                   
  A2 = 14                                  |  A2 = 4                                   
  ZN = 14                                  |  A3 = 9                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 13                                  |  A1 = 6                                   
  A2 = 19                                  |  A2 = 11                                  
  ZN = 192                                 |  A3 = 4                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 291                                 |  A1 = 4                                   
  A2 = 291                                 |  A2 = 5                                   
  ZN = 3                                   |  A3 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 21                                  |  A1 = 11                                  
  A2 = 17                                  |  A2 = 3                                   
  ZN = 17                                  |  A3 = 3                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 30                                  |  A1 = 6                                   
  A2 = 29                                  |  A2 = 5                                   
  ZN = 29                                  |  A3 = 4                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 7                                   |  A1 = 5                                   
  A2 = 11                                  |  A2 = 9                                   
  ZN = 11                                  |  A3 = 9                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 113                                 |  A1 = 5                                   
  A2 = 113                                 |  A2 = 3                                   
  ZN = 5                                   |  A3 = 6                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 10                                  |  A1 = 4                                   
  A2 = 2                                   |  A2 = 6                                   
  ZN = 5                                   |  A3 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 172                                 |  A1 = 7                                   
  A2 = 172                                 |  A2 = 6                                   
  ZN = 172                                 |  A3 = 5                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 187                                 |  A1 = 3                                   
  A2 = 187                                 |  A2 = 3                                   
  ZN = 187                                 |  A3 = 2                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 90                                  |  A1 = 5                                   
  A2 = 90                                  |  A2 = 4                                   
  ZN = 90                                  |  A3 = 3                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 26                                  |  A1 = 2                                   
  A2 = 26                                  |  A2 = 11                                  
  ZN = 5                                   |  A3 = 7                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 393                                 |  A1 = 2                                   
  A2 = 393                                 |  A2 = 3                                   
  ZN = 393                                 |  A3 = 2                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 27                                  |  A1 = 7                                   
  A2 = 6                                   |  A2 = 3                                   
  ZN = 27                                  |  A3 = 6                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 18                                  |  A1 = 3                                   
  A2 = 9                                   |  A2 = 3                                   
  ZN = 9                                   |  A3 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 180                                 |  A1 = 7                                   
  A2 = 180                                 |  A2 = 5                                   
  ZN = 180                                 |  A3 = 6                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 243                                 |  A1 = 11                                  
  A2 = 8                                   |  A2 = 3                                   
  ZN = 243                                 |  A3 = 3                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 10                                  |  A1 = 11                                  
  A2 = 148                                 |  A2 = 3                                   
  ZN = 4                                   |  A3 = 2                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 193                                 |  A1 = 11                                  
  A2 = 91                                  |  A2 = 3                                   
  ZN = 91                                  |  A3 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 79                                  |  A1 = 5                                   
  A2 = 79                                  |  A2 = 5                                   
  ZN = 40                                  |  A3 = 4                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 392                                 |  A1 = 11                                  
  A2 = 392                                 |  A2 = 5                                   
  ZN = 392                                 |  A3 = 3                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 142                                 |  A1 = 9                                   
  A2 = 15                                  |  A2 = 11                                  
  ZN = 15                                  |  A3 = 11                                  
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 29                                  |  A1 = 6                                   
  A2 = 194                                 |  A2 = 6                                   
  ZN = 29                                  |  A3 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 18                                  |  A1 = 11                                  
  A2 = 13                                  |  A2 = 8                                   
  ZN = 13                                  |  A3 = 11                                  
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 11                                  |  A1 = 7                                   
  A2 = 200                                 |  A2 = 11                                  
  ZN = 200                                 |  A3 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 14                                  |  A1 = 6                                   
  A2 = 3                                   |  A2 = 5                                   
  ZN = 9                                   |  A3 = 4                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core5.b.gen_square[ 
  A1 = 9                                   |  A1 = 5                                   
  A2 = 4                                   |  A2 = 2                                   
  ZN = 2                                   |  A3 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 187                                 |  A1 = 11                                  
  A2 = 7                                   |  A2 = 5                                   
  ZN = 7                                   |  A3 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 11                                  |  A1 = 5                                   
  A2 = 7                                   |  A2 = 4                                   
  ZN = 33                                  |  A3 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 61                                  |  A1 = 6                                   
  A2 = 48                                  |  A2 = 11                                  
  ZN = 48                                  |  A3 = 9                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.arb_data_ou 
  A1 = 16                                  |  A1 = 11                                  
  A2 = 12                                  |  A2 = 3                                   
  ZN = 12                                  |  A3 = 5                                   
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.arb_data_ou 
  A1 = 392                                 |  A1 = 11                                  
  A2 = 392                                 |  A2 = 5                                   
  ZN = 392                                 |  A3 = 3                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.arb_data_ou 
  A1 = 7                                   |  A1 = 11                                  
  A2 = 5                                   |  A2 = 3                                   
  ZN = 5                                   |  A3 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.arb_data_ou 
  A1 = 12                                  |  A1 = 9                                   
  A2 = 18                                  |  A2 = 4                                   
  ZN = 18                                  |  A3 = 5                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.arb_data_ou 
  A1 = 87                                  |  A1 = 7                                   
  A2 = 87                                  |  A2 = 11                                  
  ZN = 87                                  |  A3 = 10                                  
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.arb_data_ou 
  A1 = 11                                  |  A1 = 9                                   
  A2 = 10                                  |  A2 = 3                                   
  ZN = 11                                  |  A3 = 5                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 1014                                |  A1 = 11                                  
  A2 = 1014                                |  A2 = 9                                   
  ZN = 1014                                |  A3 = 11                                  
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 20                                  |  A1 = 9                                   
  A2 = 142                                 |  A2 = 11                                  
  ZN = 142                                 |  A3 = 2                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 117                                 |  A1 = 5                                   
  A2 = 11                                  |  A2 = 6                                   
  ZN = 11                                  |  A3 = 8                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 392                                 |  A1 = 10                                  
  A2 = 392                                 |  A2 = 10                                  
  ZN = 392                                 |  A3 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 27                                  |  A1 = 9                                   
  A2 = 13                                  |  A2 = 6                                   
  ZN = 13                                  |  A3 = 3                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 243                                 |  A1 = 11                                  
  A2 = 243                                 |  A2 = 9                                   
  ZN = 243                                 |  A3 = 11                                  
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 1463                                |  A1 = 4                                   
  A2 = 148                                 |  A2 = 5                                   
  ZN = 3                                   |  A3 = 3                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 56                                  |  A1 = 4                                   
  A2 = 8                                   |  A2 = 5                                   
  ZN = 56                                  |  A3 = 3                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 12                                  |  A1 = 11                                  
  A2 = 12                                  |  A2 = 5                                   
  ZN = 12                                  |  A3 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 95                                  |  A1 = 11                                  
  A2 = 95                                  |  A2 = 5                                   
  ZN = 95                                  |  A3 = 3                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 699                                 |  A1 = 4                                   
  A2 = 699                                 |  A2 = 5                                   
  ZN = 699                                 |  A3 = 3                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 1463                                |  A1 = 11                                  
  A2 = 393                                 |  A2 = 11                                  
  ZN = 4                                   |  A3 = 11                                  
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 58                                  |  A1 = 10                                  
  A2 = 58                                  |  A2 = 6                                   
  ZN = 58                                  |  A3 = 3                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 291                                 |  A1 = 11                                  
  A2 = 291                                 |  A2 = 11                                  
  ZN = 291                                 |  A3 = 9                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 7                                   |  A1 = 11                                  
  A2 = 699                                 |  A2 = 11                                  
  ZN = 3                                   |  A3 = 8                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 1014                                |  A1 = 11                                  
  A2 = 8                                   |  A2 = 11                                  
  ZN = 1014                                |  A3 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 7                                   |  A1 = 11                                  
  A2 = 6                                   |  A2 = 9                                   
  ZN = 2                                   |  A3 = 10                                  
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 19                                  |  A1 = 9                                   
  A2 = 19                                  |  A2 = 7                                   
  ZN = 19                                  |  A3 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 654                                 |  A1 = 11                                  
  A2 = 654                                 |  A2 = 8                                   
  ZN = 654                                 |  A3 = 11                                  
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 1463                                |  A1 = 9                                   
  A2 = 1463                                |  A2 = 4                                   
  ZN = 148                                 |  A3 = 6                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 1463                                |  A1 = 11                                  
  A2 = 1463                                |  A2 = 5                                   
  ZN = 393                                 |  A3 = 3                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 654                                 |  A1 = 3                                   
  A2 = 4                                   |  A2 = 5                                   
  ZN = 654                                 |  A3 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 393                                 |  A1 = 11                                  
  A2 = 393                                 |  A2 = 3                                   
  ZN = 393                                 |  A3 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 1463                                |  A1 = 11                                  
  A2 = 91                                  |  A2 = 7                                   
  ZN = 91                                  |  A3 = 11                                  
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 1463                                |  A1 = 5                                   
  A2 = 1463                                |  A2 = 5                                   
  ZN = 8                                   |  A3 = 3                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core7.b.arb_data_ou 
  A1 = 523                                 |  A1 = 8                                   
  A2 = 16                                  |  A2 = 5                                   
  ZN = 16                                  |  A3 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core7.b.arb_data_ou 
  A1 = 699                                 |  A1 = 9                                   
  A2 = 243                                 |  A2 = 7                                   
  ZN = 243                                 |  A3 = 4                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core7.b.arb_data_ou 
  A1 = 14                                  |  A1 = 11                                  
  A2 = 41                                  |  A2 = 4                                   
  ZN = 41                                  |  A3 = 2                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core7.b.gen_square[ 
  A1 = 10                                  |  A1 = 6                                   
  A2 = 291                                 |  A2 = 5                                   
  ZN = 10                                  |  A3 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core7.b.gen_square[ 
  A1 = 1463                                |  A1 = 11                                  
  A2 = 1463                                |  A2 = 5                                   
  ZN = 1463                                |  A3 = 3                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core7.b.gen_square[ 
  A1 = 117                                 |  A1 = 5                                   
  A2 = 117                                 |  A2 = 2                                   
  ZN = 117                                 |  A3 = 2                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core7.b.gen_square[ 
  A1 = 393                                 |  A1 = 5                                   
  A2 = 393                                 |  A2 = 4                                   
  ZN = 393                                 |  A3 = 4                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core7.b.illegal_gf1 
  A1 = 5                                   |  A1 = 11                                  
  A2 = 1463                                |  A2 = 10                                  
  ZN = 1                                   |  A3 = 5                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core7.b.illegal_gf1 
  A1 = 15                                  |  A1 = 4                                   
  A2 = 14                                  |  A2 = 4                                   
  ZN = 3                                   |  A3 = 5                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core7.b.illegal_gf1 
  A1 = 1014                                |  A1 = 3                                   
  A2 = 6                                   |  A2 = 7                                   
  ZN = 6                                   |  A3 = 4                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 54                                  |  A1 = 10                                  
  A2 = 54                                  |  A2 = 3                                   
  ZN = 54                                  |  A3 = 11                                  
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 14                                  |  A1 = 5                                   
  A2 = 17                                  |  A2 = 5                                   
  ZN = 3                                   |  A3 = 3                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core1.b.gen_square[ 
  A1 = 393                                 |  A1 = 9                                   
  A2 = 42                                  |  A2 = 4                                   
  ZN = 393                                 |  A3 = 5                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 392                                 |  A1 = 11                                  
  A2 = 392                                 |  A2 = 3                                   
  ZN = 392                                 |  A3 = 4                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 13                                  |  A1 = 4                                   
  A2 = 2                                   |  A2 = 10                                  
  ZN = 11                                  |  A3 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 172                                 |  A1 = 11                                  
  A2 = 172                                 |  A2 = 5                                   
  ZN = 172                                 |  A3 = 3                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 7                                   |  A1 = 10                                  
  A2 = 1463                                |  A2 = 5                                   
  ZN = 1463                                |  A3 = 3                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 8                                   |  A1 = 3                                   
  A2 = 192                                 |  A2 = 5                                   
  ZN = 8                                   |  A3 = 3                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 16                                  |  A1 = 5                                   
  A2 = 25                                  |  A2 = 2                                   
  ZN = 25                                  |  A3 = 4                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 40                                  |  A1 = 6                                   
  A2 = 13                                  |  A2 = 3                                   
  ZN = 7                                   |  A3 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 11                                  |  A1 = 5                                   
  A2 = 8                                   |  A2 = 4                                   
  ZN = 2                                   |  A3 = 3                                   
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 523                                 |  A1 = 2                                   
  A2 = 523                                 |  A2 = 4                                   
  ZN = 523                                 |  B1 = 2                                   
  VDD = 275388                             |  B2 = 2                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 523                                 |  A1 = 5                                   
  A2 = 4                                   |  A2 = 3                                   
  ZN = 218                                 |  B1 = 3                                   
  VDD = 275388                             |  B2 = 7                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 7                                   |  A1 = 2                                   
  A2 = 14                                  |  A2 = 7                                   
  ZN = 7                                   |  B1 = 2                                   
  VDD = 275388                             |  B2 = 4                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 18                                  |  A1 = 10                                  
  A2 = 18                                  |  A2 = 2                                   
  ZN = 9                                   |  B1 = 5                                   
  VDD = 275388                             |  B2 = 3                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 192                                 |  A1 = 4                                   
  A2 = 192                                 |  A2 = 4                                   
  ZN = 192                                 |  B1 = 11                                  
  VDD = 275388                             |  B2 = 5                                   
  VNW = 275388                             |  ZN = 4                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 75                                  |  A1 = 10                                  
  A2 = 7                                   |  A2 = 5                                   
  ZN = 7                                   |  B1 = 3                                   
  VDD = 275388                             |  B2 = 3                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 21                                  |  A1 = 5                                   
  A2 = 8                                   |  A2 = 6                                   
  ZN = 8                                   |  B1 = 5                                   
  VDD = 275388                             |  B2 = 3                                   
  VNW = 275388                             |  ZN = 5                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 23                                  |  A1 = 6                                   
  A2 = 19                                  |  A2 = 2                                   
  ZN = 2                                   |  B1 = 4                                   
  VDD = 275388                             |  B2 = 2                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core1.b.gen_square[ 
  A1 = 699                                 |  A1 = 7                                   
  A2 = 699                                 |  A2 = 11                                  
  ZN = 699                                 |  B1 = 3                                   
  VDD = 275388                             |  B2 = 2                                   
  VNW = 275388                             |  ZN = 5                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core2.b.gen_square[ 
  A1 = 13                                  |  A1 = 5                                   
  A2 = 8                                   |  A2 = 11                                  
  ZN = 13                                  |  B1 = 4                                   
  VDD = 275388                             |  B2 = 2                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core3.b.arb_data_ou 
  A1 = 37                                  |  A1 = 2                                   
  A2 = 16                                  |  A2 = 4                                   
  ZN = 16                                  |  B1 = 2                                   
  VDD = 275388                             |  B2 = 2                                   
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core3.b.arb_data_ou 
  A1 = 9                                   |  A1 = 9                                   
  A2 = 6                                   |  A2 = 3                                   
  ZN = 2                                   |  B1 = 3                                   
  VDD = 275388                             |  B2 = 9                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core3.b.arb_data_ou 
  A1 = 5                                   |  A1 = 5                                   
  A2 = 1014                                |  A2 = 7                                   
  ZN = 1014                                |  B1 = 5                                   
  VDD = 275388                             |  B2 = 4                                   
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core3.b.gen_square[ 
  A1 = 4                                   |  A1 = 7                                   
  A2 = 7                                   |  A2 = 8                                   
  ZN = 3                                   |  B1 = 8                                   
  VDD = 275388                             |  B2 = 8                                   
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 23                                  |  A1 = 4                                   
  A2 = 19                                  |  A2 = 3                                   
  ZN = 19                                  |  B1 = 3                                   
  VDD = 275388                             |  B2 = 5                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 15                                  |  A1 = 7                                   
  A2 = 2                                   |  A2 = 4                                   
  ZN = 12                                  |  B1 = 5                                   
  VDD = 275388                             |  B2 = 4                                   
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 40                                  |  A1 = 11                                  
  A2 = 392                                 |  A2 = 3                                   
  ZN = 392                                 |  B1 = 3                                   
  VDD = 275388                             |  B2 = 2                                   
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 22                                  |  A1 = 5                                   
  A2 = 24                                  |  A2 = 11                                  
  ZN = 24                                  |  B1 = 2                                   
  VDD = 275388                             |  B2 = 5                                   
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 10                                  |  A1 = 5                                   
  A2 = 8                                   |  A2 = 2                                   
  ZN = 10                                  |  B1 = 3                                   
  VDD = 275388                             |  B2 = 5                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 9                                   |  A1 = 3                                   
  A2 = 8                                   |  A2 = 5                                   
  ZN = 8                                   |  B1 = 5                                   
  VDD = 275388                             |  B2 = 3                                   
  VNW = 275388                             |  ZN = 4                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 25                                  |  A1 = 5                                   
  A2 = 27                                  |  A2 = 3                                   
  ZN = 27                                  |  B1 = 2                                   
  VDD = 275388                             |  B2 = 2                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 12                                  |  A1 = 2                                   
  A2 = 12                                  |  A2 = 2                                   
  ZN = 2                                   |  B1 = 3                                   
  VDD = 275388                             |  B2 = 4                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 75                                  |  A1 = 9                                   
  A2 = 6                                   |  A2 = 9                                   
  ZN = 10                                  |  B1 = 11                                  
  VDD = 275388                             |  B2 = 3                                   
  VNW = 275388                             |  ZN = 5                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 30                                  |  A1 = 7                                   
  A2 = 30                                  |  A2 = 6                                   
  ZN = 30                                  |  B1 = 5                                   
  VDD = 275388                             |  B2 = 3                                   
  VNW = 275388                             |  ZN = 4                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 654                                 |  A1 = 5                                   
  A2 = 654                                 |  A2 = 5                                   
  ZN = 654                                 |  B1 = 5                                   
  VDD = 275388                             |  B2 = 3                                   
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core5.b.arb_data_ou 
  A1 = 16                                  |  A1 = 5                                   
  A2 = 5                                   |  A2 = 6                                   
  ZN = 8                                   |  B1 = 6                                   
  VDD = 275388                             |  B2 = 4                                   
  VNW = 275388                             |  ZN = 4                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 2                                   |  A1 = 4                                   
  A2 = 192                                 |  A2 = 3                                   
  ZN = 6                                   |  Z = 3                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 393                                 |  A1 = 6                                   
  A2 = 393                                 |  A2 = 7                                   
  ZN = 393                                 |  Z = 5                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 13                                  |  A1 = 8                                   
  A2 = 8                                   |  A2 = 4                                   
  ZN = 13                                  |  Z = 2                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 10                                  |  A1 = 8                                   
  A2 = 42                                  |  A2 = 5                                   
  ZN = 42                                  |  Z = 2                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 56                                  |  A1 = 4                                   
  A2 = 56                                  |  A2 = 5                                   
  ZN = 56                                  |  Z = 3                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 5                                   |  A1 = 7                                   
  A2 = 3                                   |  A2 = 3                                   
  ZN = 2                                   |  Z = 3                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core1.b.arb_data_ou 
  A1 = 4                                   |  A1 = 3                                   
  A2 = 5                                   |  A2 = 2                                   
  ZN = 2                                   |  Z = 5                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core1.b.arb_data_ou 
  A1 = 2                                   |  A1 = 8                                   
  A2 = 2                                   |  A2 = 6                                   
  ZN = 3                                   |  Z = 4                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core1.b.arb_data_ou 
  A1 = 5                                   |  A1 = 11                                  
  A2 = 55                                  |  A2 = 4                                   
  ZN = 3                                   |  Z = 4                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core1.b.gen_square[ 
  A1 = 4                                   |  A1 = 4                                   
  A2 = 6                                   |  A2 = 4                                   
  ZN = 4                                   |  Z = 2                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core1.b.gen_square[ 
  A1 = 6                                   |  A1 = 3                                   
  A2 = 4                                   |  A2 = 3                                   
  ZN = 2                                   |  Z = 2                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core1.b.illegal_gf1 
  A1 = 16                                  |  A1 = 9                                   
  A2 = 2                                   |  A2 = 10                                  
  ZN = 3                                   |  Z = 7                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core1.b.illegal_gf1 
  A1 = 1463                                |  A1 = 3                                   
  A2 = 3                                   |  A2 = 3                                   
  ZN = 4                                   |  Z = 5                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core1.b.illegal_gf1 
  A1 = 392                                 |  A1 = 5                                   
  A2 = 3                                   |  A2 = 11                                  
  ZN = 3                                   |  Z = 9                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core1.b.illegal_gf1 
  A1 = 11                                  |  A1 = 4                                   
  A2 = 3                                   |  A2 = 5                                   
  ZN = 4                                   |  Z = 5                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core2.b.arb_data_ou 
  A1 = 4                                   |  A1 = 11                                  
  A2 = 8                                   |  A2 = 4                                   
  ZN = 2                                   |  Z = 6                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_1 |Instance: \i_chip_core.core2.b.gen_square[ 
  A1 = 3                                   |  A1 = 5                                   
  A2 = 4                                   |  A2 = 3                                   
  ZN = 4                                   |  Z = 3                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai211_ |Instance: \i_chip_core.core2.b.gen_square[ 
  A1 = 1014                                |  A1 = 6                                   
  A2 = 17                                  |  A2 = 4                                   
  B = 17                                   |  Z = 2                                    
  C = 1014                                 |  VDD = 280586                             
  ZN = 3                                   |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai211_ |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 1463                                |  A1 = 5                                   
  A2 = 4                                   |  A2 = 6                                   
  B = 13                                   |  Z = 2                                    
  C = 25                                   |  VDD = 280586                             
  ZN = 12                                  |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai211_ |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 143                                 |  A1 = 4                                   
  A2 = 143                                 |  A2 = 2                                   
  B = 143                                  |  Z = 2                                    
  C = 143                                  |  VDD = 280586                             
  ZN = 143                                 |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai211_ |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 95                                  |  A1 = 6                                   
  A2 = 95                                  |  A2 = 6                                   
  B = 95                                   |  Z = 2                                    
  C = 95                                   |  VDD = 280586                             
  ZN = 95                                  |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai211_ |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 9                                   |  A1 = 9                                   
  A2 = 43                                  |  A2 = 11                                  
  B = 4                                    |  Z = 3                                    
  C = 1463                                 |  VDD = 280586                             
  ZN = 3                                   |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai211_ |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 10                                  |  A1 = 8                                   
  A2 = 9                                   |  A2 = 11                                  
  B = 3                                    |  Z = 3                                    
  C = 9                                    |  VDD = 280586                             
  ZN = 6                                   |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai211_ |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 699                                 |  A1 = 7                                   
  A2 = 699                                 |  A2 = 6                                   
  B = 699                                  |  Z = 10                                   
  C = 699                                  |  VDD = 280586                             
  ZN = 699                                 |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai211_ |Instance: \i_chip_core.core3.b.arb_data_ou 
  A1 = 116                                 |  A1 = 10                                  
  A2 = 116                                 |  A2 = 2                                   
  B = 17                                   |  Z = 3                                    
  C = 11                                   |  VDD = 280586                             
  ZN = 116                                 |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai211_ |Instance: \i_chip_core.core3.b.arb_data_ou 
  A1 = 1463                                |  A1 = 8                                   
  A2 = 250                                 |  A2 = 5                                   
  B = 1463                                 |  Z = 5                                    
  C = 10                                   |  VDD = 280586                             
  ZN = 250                                 |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai211_ |Instance: \i_chip_core.core3.b.gen_square[ 
  A1 = 58                                  |  A1 = 4                                   
  A2 = 58                                  |  A2 = 6                                   
  B = 58                                   |  Z = 2                                    
  C = 58                                   |  VDD = 280586                             
  ZN = 58                                  |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai211_ |Instance: \i_chip_core.core3.b.gen_square[ 
  A1 = 108                                 |  A1 = 3                                   
  A2 = 1014                                |  A2 = 4                                   
  B = 1014                                 |  Z = 2                                    
  C = 13                                   |  VDD = 280586                             
  ZN = 1014                                |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai211_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 11                                  |  A1 = 6                                   
  A2 = 36                                  |  A2 = 4                                   
  B = 36                                   |  Z = 2                                    
  C = 36                                   |  VDD = 280586                             
  ZN = 36                                  |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai211_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 4                                   |  A1 = 6                                   
  A2 = 4                                   |  A2 = 3                                   
  B = 3                                    |  Z = 4                                    
  C = 699                                  |  VDD = 280586                             
  ZN = 699                                 |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai211_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 96                                  |  A1 = 8                                   
  A2 = 16                                  |  A2 = 5                                   
  B = 5                                    |  Z = 3                                    
  C = 5                                    |  VDD = 280586                             
  ZN = 2                                   |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai211_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 4                                   |  A1 = 7                                   
  A2 = 2                                   |  A2 = 5                                   
  B = 2                                    |  Z = 2                                    
  C = 6                                    |  VDD = 280586                             
  ZN = 5                                   |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 1014                                |  A1 = 12                                  
  A2 = 1014                                |  A2 = 11                                  
  B = 1014                                 |  Z = 5                                    
  ZN = 6                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 23                                  |  A1 = 5                                   
  A2 = 6                                   |  A2 = 5                                   
  B = 108                                  |  Z = 3                                    
  ZN = 6                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 18                                  |  A1 = 6                                   
  A2 = 26                                  |  A2 = 4                                   
  B = 26                                   |  Z = 3                                    
  ZN = 26                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 95                                  |  A1 = 11                                  
  A2 = 95                                  |  A2 = 4                                   
  B = 95                                   |  Z = 5                                    
  ZN = 95                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 41                                  |  A1 = 9                                   
  A2 = 41                                  |  A2 = 3                                   
  B = 41                                   |  Z = 5                                    
  ZN = 41                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 1463                                |  A1 = 5                                   
  A2 = 1463                                |  A2 = 6                                   
  B = 250                                  |  Z = 3                                    
  ZN = 1463                                |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 1463                                |  A1 = 10                                  
  A2 = 1463                                |  A2 = 11                                  
  B = 148                                  |  Z = 3                                    
  ZN = 7                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 94                                  |  A1 = 7                                   
  A2 = 1014                                |  A2 = 5                                   
  B = 1014                                 |  Z = 2                                    
  ZN = 2                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 31                                  |  A1 = 6                                   
  A2 = 250                                 |  A2 = 5                                   
  B = 250                                  |  Z = 2                                    
  ZN = 250                                 |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 44                                  |  A1 = 5                                   
  A2 = 44                                  |  A2 = 3                                   
  B = 44                                   |  Z = 6                                    
  ZN = 44                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 30                                  |  A1 = 6                                   
  A2 = 7                                   |  A2 = 5                                   
  B = 23                                   |  Z = 2                                    
  ZN = 3                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 108                                 |  A1 = 4                                   
  A2 = 48                                  |  A2 = 3                                   
  B = 1014                                 |  Z = 5                                    
  ZN = 48                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 1014                                |  A1 = 3                                   
  A2 = 1014                                |  A2 = 2                                   
  B = 4                                    |  Z = 2                                    
  ZN = 1014                                |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 23                                  |  A1 = 7                                   
  A2 = 11                                  |  A2 = 5                                   
  B = 29                                   |  Z = 7                                    
  ZN = 11                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 699                                 |  A1 = 7                                   
  A2 = 7                                   |  A2 = 2                                   
  B = 699                                  |  Z = 6                                    
  ZN = 7                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 79                                  |  A1 = 4                                   
  A2 = 79                                  |  A2 = 3                                   
  B = 5                                    |  Z = 6                                    
  ZN = 79                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 143                                 |  A1 = 11                                  
  A2 = 14                                  |  A2 = 3                                   
  B = 4                                    |  Z = 2                                    
  ZN = 4                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 47                                  |  A1 = 7                                   
  A2 = 47                                  |  A2 = 3                                   
  B = 59                                   |  Z = 4                                    
  ZN = 47                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 40                                  |  A1 = 7                                   
  A2 = 15                                  |  A2 = 10                                  
  B = 5                                    |  Z = 3                                    
  ZN = 5                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 7                                   |  A1 = 11                                  
  A2 = 14                                  |  A2 = 5                                   
  B = 23                                   |  Z = 3                                    
  ZN = 23                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core5.b.arb_data_ou 
  A1 = 70                                  |  A1 = 6                                   
  A2 = 4                                   |  A2 = 6                                   
  B = 7                                    |  Z = 5                                    
  ZN = 4                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core5.b.gen_square[ 
  A1 = 15                                  |  A1 = 5                                   
  A2 = 6                                   |  A2 = 3                                   
  B = 8                                    |  Z = 2                                    
  ZN = 15                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core5.b.gen_square[ 
  A1 = 25                                  |  A1 = 10                                  
  A2 = 18                                  |  A2 = 11                                  
  B = 25                                   |  Z = 4                                    
  ZN = 18                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 192                                 |  A1 = 11                                  
  A2 = 192                                 |  A2 = 8                                   
  B = 26                                   |  Z = 9                                    
  ZN = 192                                 |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 654                                 |  A1 = 5                                   
  A2 = 654                                 |  A2 = 7                                   
  B = 12                                   |  Z = 2                                    
  ZN = 654                                 |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 31                                  |  A1 = 5                                   
  A2 = 38                                  |  A2 = 3                                   
  B = 38                                   |  Z = 6                                    
  ZN = 13                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 35                                  |  A1 = 5                                   
  A2 = 43                                  |  A2 = 4                                   
  B = 43                                   |  Z = 6                                    
  ZN = 43                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 7                                   |  A1 = 4                                   
  A2 = 1463                                |  A2 = 3                                   
  B = 1463                                 |  Z = 5                                    
  ZN = 1463                                |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 1014                                |  A1 = 8                                   
  A2 = 1014                                |  A2 = 5                                   
  B = 1014                                 |  Z = 5                                    
  ZN = 1014                                |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 172                                 |  A1 = 5                                   
  A2 = 7                                   |  A2 = 4                                   
  B = 12                                   |  Z = 2                                    
  ZN = 7                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core6.b.arb_data_ou 
  A1 = 218                                 |  A1 = 11                                  
  A2 = 218                                 |  A2 = 4                                   
  B = 218                                  |  Z = 3                                    
  ZN = 1                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 22                                  |  A1 = 11                                  
  A2 = 8                                   |  A2 = 11                                  
  B = 6                                    |  Z = 2                                    
  ZN = 6                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 51                                  |  A1 = 9                                   
  A2 = 7                                   |  A2 = 2                                   
  B = 51                                   |  Z = 5                                    
  ZN = 7                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 192                                 |  A1 = 4                                   
  A2 = 10                                  |  A2 = 10                                  
  B = 192                                  |  Z = 3                                    
  ZN = 10                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 1463                                |  A1 = 11                                  
  A2 = 393                                 |  A2 = 2                                   
  B = 6                                    |  Z = 5                                    
  ZN = 3                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 8                                   |  A1 = 10                                  
  A2 = 6                                   |  A2 = 4                                   
  B = 10                                   |  Z = 3                                    
  ZN = 6                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 108                                 |  A1 = 9                                   
  A2 = 1014                                |  A2 = 11                                  
  B = 1014                                 |  Z = 4                                    
  ZN = 1014                                |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 22                                  |  A1 = 7                                   
  A2 = 18                                  |  A2 = 7                                   
  B = 18                                   |  Z = 2                                    
  ZN = 18                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 1014                                |  A1 = 5                                   
  A2 = 6                                   |  A2 = 3                                   
  B = 9                                    |  Z = 2                                    
  ZN = 1014                                |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 187                                 |  A1 = 5                                   
  A2 = 192                                 |  A2 = 4                                   
  B = 8                                    |  Z = 10                                   
  ZN = 8                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 523                                 |  A1 = 11                                  
  A2 = 523                                 |  A2 = 9                                   
  B = 523                                  |  Z = 3                                    
  ZN = 523                                 |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 1463                                |  A1 = 4                                   
  A2 = 1463                                |  A2 = 3                                   
  B = 1463                                 |  Z = 2                                    
  ZN = 1463                                |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 58                                  |  A1 = 5                                   
  A2 = 2                                   |  A2 = 3                                   
  B = 58                                   |  Z = 2                                    
  ZN = 2                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 31                                  |  A1 = 9                                   
  A2 = 2                                   |  A2 = 4                                   
  B = 38                                   |  Z = 3                                    
  ZN = 2                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core7.b.arb_data_ou 
  A1 = 4                                   |  A1 = 11                                  
  A2 = 2                                   |  A2 = 11                                  
  B = 96                                   |  Z = 3                                    
  ZN = 4                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core7.b.illegal_gf1 
  A1 = 3                                   |  A1 = 3                                   
  A2 = 3                                   |  A2 = 4                                   
  B = 4                                    |  Z = 5                                    
  ZN = 4                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core7.b.illegal_gf1 
  A1 = 20                                  |  A1 = 5                                   
  A2 = 2                                   |  A2 = 3                                   
  B = 5                                    |  Z = 5                                    
  ZN = 10                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 2                                   |  A1 = 4                                   
  A2 = 3                                   |  A2 = 3                                   
  B = 4                                    |  Z = 3                                    
  ZN = 4                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 6                                   |  A1 = 4                                   
  A2 = 3                                   |  A2 = 4                                   
  B = 4                                    |  Z = 3                                    
  ZN = 2                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_2 |Instance: \i_chip_core.core5.b.arb_data_ou 
  A1 = 2                                   |  A1 = 5                                   
  A2 = 2                                   |  A2 = 2                                   
  B = 10                                   |  Z = 2                                    
  ZN = 8                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_2 |Instance: \i_chip_core.core0.b.arb_data_ou 
  A1 = 200                                 |  A1 = 11                                  
  A2 = 1014                                |  A2 = 6                                   
  B = 4                                    |  A3 = 4                                   
  ZN = 8                                   |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_2 |Instance: \i_chip_core.core0.b.arb_data_ou 
  A1 = 1463                                |  A1 = 5                                   
  A2 = 250                                 |  A2 = 3                                   
  B = 1463                                 |  A3 = 2                                   
  ZN = 1463                                |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_2 |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 1014                                |  A1 = 3                                   
  A2 = 1014                                |  A2 = 3                                   
  B = 41                                   |  A3 = 6                                   
  ZN = 1014                                |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_2 |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 187                                 |  A1 = 9                                   
  A2 = 187                                 |  A2 = 3                                   
  B = 187                                  |  A3 = 8                                   
  ZN = 187                                 |  ZN = 8                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_2 |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 10                                  |  A1 = 11                                  
  A2 = 5                                   |  A2 = 8                                   
  B = 654                                  |  A3 = 10                                  
  ZN = 7                                   |  ZN = 7                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_2 |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 8                                   |  A1 = 9                                   
  A2 = 2                                   |  A2 = 9                                   
  B = 22                                   |  A3 = 11                                  
  ZN = 14                                  |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_2 |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 1463                                |  A1 = 9                                   
  A2 = 1463                                |  A2 = 5                                   
  B = 1463                                 |  A3 = 6                                   
  ZN = 1463                                |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_2 |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 200                                 |  A1 = 9                                   
  A2 = 13                                  |  A2 = 10                                  
  B = 13                                   |  A3 = 7                                   
  ZN = 13                                  |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai21_2 |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 187                                 |  A1 = 9                                   
  A2 = 14                                  |  A2 = 3                                   
  B = 2                                    |  A3 = 11                                  
  ZN = 6                                   |  ZN = 6                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 25                                   |  A1 = 4                                   
  Z = 4                                    |  A2 = 6                                   
  VDD = 275388                             |  A3 = 5                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 2                                    |  A1 = 6                                   
  Z = 4                                    |  A2 = 6                                   
  VDD = 275388                             |  A3 = 5                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 1463                                 |  A1 = 11                                  
  Z = 1463                                 |  A2 = 7                                   
  VDD = 275388                             |  A3 = 11                                  
  VNW = 275388                             |  ZN = 5                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 393                                  |  A1 = 4                                   
  Z = 393                                  |  A2 = 5                                   
  VDD = 275388                             |  A3 = 6                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 19                                   |  A1 = 4                                   
  Z = 48                                   |  A2 = 7                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  ZN = 5                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 8                                    |  A1 = 11                                  
  Z = 392                                  |  A2 = 5                                   
  VDD = 275388                             |  A3 = 6                                   
  VNW = 275388                             |  ZN = 7                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 6                                    |  A1 = 8                                   
  Z = 94                                   |  A2 = 8                                   
  VDD = 275388                             |  A3 = 6                                   
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 654                                  |  A1 = 11                                  
  Z = 71                                   |  A2 = 8                                   
  VDD = 275388                             |  A3 = 7                                   
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 1014                                 |  A1 = 8                                   
  Z = 9                                    |  A2 = 5                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 67                                   |  A1 = 3                                   
  Z = 41                                   |  A2 = 2                                   
  VDD = 275388                             |  A3 = 2                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 51                                   |  A1 = 10                                  
  Z = 18                                   |  A2 = 5                                   
  VDD = 275388                             |  A3 = 11                                  
  VNW = 275388                             |  ZN = 6                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 1014                                 |  A1 = 10                                  
  Z = 1014                                 |  A2 = 7                                   
  VDD = 275388                             |  A3 = 11                                  
  VNW = 275388                             |  ZN = 4                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 8                                    |  A1 = 5                                   
  Z = 1014                                 |  A2 = 7                                   
  VDD = 275388                             |  A3 = 6                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 200                                  |  A1 = 4                                   
  Z = 6                                    |  A2 = 2                                   
  VDD = 275388                             |  A3 = 2                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 38                                   |  A1 = 11                                  
  Z = 11                                   |  A2 = 4                                   
  VDD = 275388                             |  A3 = 11                                  
  VNW = 275388                             |  ZN = 4                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 52                                   |  A1 = 9                                   
  Z = 392                                  |  A2 = 11                                  
  VDD = 275388                             |  A3 = 4                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 1014                                 |  A1 = 9                                   
  Z = 1014                                 |  A2 = 3                                   
  VDD = 275388                             |  A3 = 2                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 148                                  |  A1 = 11                                  
  Z = 148                                  |  A2 = 10                                  
  VDD = 275388                             |  A3 = 11                                  
  VNW = 275388                             |  ZN = 6                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core1.b.arb_data_ou 
  I = 4                                    |  A1 = 9                                   
  Z = 2                                    |  A2 = 6                                   
  VDD = 275388                             |  A3 = 5                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core1.b.arb_data_ou 
  I = 38                                   |  A1 = 7                                   
  Z = 654                                  |  A2 = 2                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core1.b.arb_data_ou 
  I = 7                                    |  A1 = 2                                   
  Z = 148                                  |  A2 = 5                                   
  VDD = 275388                             |  A3 = 11                                  
  VNW = 275388                             |  ZN = 4                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core1.b.arb_data_ou 
  I = 11                                   |  A1 = 8                                   
  Z = 13                                   |  A2 = 4                                   
  VDD = 275388                             |  A3 = 7                                   
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core1.b.gen_square[ 
  I = 19                                   |  A1 = 11                                  
  Z = 59                                   |  A2 = 6                                   
  VDD = 275388                             |  A3 = 2                                   
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core1.b.gen_square[ 
  I = 8                                    |  A1 = 11                                  
  Z = 5                                    |  A2 = 5                                   
  VDD = 275388                             |  A3 = 4                                   
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core1.b.illegal_gf1 
  I = 699                                  |  A1 = 11                                  
  Z = 9                                    |  A2 = 11                                  
  VDD = 275388                             |  A3 = 11                                  
  VNW = 275388                             |  ZN = 5                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core1.b.illegal_gf1 
  I = 192                                  |  A1 = 2                                   
  Z = 187                                  |  A2 = 10                                  
  VDD = 275388                             |  A3 = 6                                   
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core1.b.illegal_gf1 
  I = 12                                   |  A1 = 4                                   
  Z = 95                                   |  A2 = 4                                   
  VDD = 275388                             |  A3 = 5                                   
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core1.b.illegal_gf1 
  I = 654                                  |  A1 = 6                                   
  Z = 192                                  |  A2 = 3                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core1.b.illegal_gf1 
  I = 8                                    |  A1 = 7                                   
  Z = 108                                  |  A2 = 4                                   
  VDD = 275388                             |  A3 = 4                                   
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 7                                    |  A1 = 11                                  
  Z = 654                                  |  A2 = 4                                   
  VDD = 275388                             |  A3 = 11                                  
  VNW = 275388                             |  ZN = 6                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 1463                                 |  A1 = 5                                   
  Z = 10                                   |  A2 = 6                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 6                                    |  A1 = 5                                   
  Z = 1463                                 |  A2 = 11                                  
  VDD = 275388                             |  A3 = 6                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 6                                    |  A1 = 10                                  
  Z = 25                                   |  A2 = 10                                  
  VDD = 275388                             |  A3 = 11                                  
  VNW = 275388                             |  ZN = 7                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 654                                  |  A1 = 9                                   
  Z = 654                                  |  A2 = 8                                   
  VDD = 275388                             |  A3 = 11                                  
  VNW = 275388                             |  ZN = 7                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 27                                   |  A1 = 10                                  
  Z = 27                                   |  A2 = 8                                   
  VDD = 275388                             |  A3 = 11                                  
  VNW = 275388                             |  ZN = 6                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 61                                   |  A1 = 4                                   
  Z = 61                                   |  A2 = 8                                   
  VDD = 275388                             |  A3 = 5                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 523                                  |  A1 = 7                                   
  Z = 523                                  |  A2 = 6                                   
  VDD = 275388                             |  A3 = 5                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 31                                   |  A1 = 11                                  
  Z = 27                                   |  A2 = 6                                   
  VDD = 275388                             |  A3 = 5                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 2                                    |  A1 = 6                                   
  Z = 1463                                 |  A2 = 8                                   
  VDD = 275388                             |  A3 = 6                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 200                                  |  A1 = 10                                  
  Z = 10                                   |  A2 = 3                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  ZN = 8                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 180                                  |  A1 = 6                                   
  Z = 180                                  |  A2 = 11                                  
  VDD = 275388                             |  A3 = 5                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 1014                                 |  A1 = 6                                   
  Z = 291                                  |  A2 = 3                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  ZN = 4                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 15                                   |  A1 = 11                                  
  Z = 15                                   |  A2 = 4                                   
  VDD = 275388                             |  A3 = 4                                   
  VNW = 275388                             |  ZN = 5                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 5                                    |  A1 = 11                                  
  Z = 6                                    |  A2 = 4                                   
  VDD = 275388                             |  A3 = 11                                  
  VNW = 275388                             |  ZN = 6                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 8                                    |  A1 = 11                                  
  Z = 2                                    |  A2 = 4                                   
  VDD = 275388                             |  A3 = 6                                   
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 12                                   |  A1 = 9                                   
  Z = 3                                    |  A2 = 3                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  ZN = 6                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 87                                   |  A1 = 11                                  
  Z = 87                                   |  A2 = 9                                   
  VDD = 275388                             |  A3 = 10                                  
  VNW = 275388                             |  ZN = 4                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 28                                   |  A1 = 10                                  
  Z = 28                                   |  A2 = 6                                   
  VDD = 275388                             |  A3 = 9                                   
  VNW = 275388                             |  ZN = 8                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.arb_data_ou 
  I = 26                                   |  A1 = 3                                   
  Z = 8                                    |  A2 = 5                                   
  VDD = 275388                             |  A3 = 5                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.arb_data_ou 
  I = 699                                  |  A1 = 8                                   
  Z = 699                                  |  A2 = 4                                   
  VDD = 275388                             |  A3 = 11                                  
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.arb_data_ou 
  I = 392                                  |  A1 = 11                                  
  Z = 192                                  |  A2 = 11                                  
  VDD = 275388                             |  A3 = 11                                  
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.arb_data_ou 
  I = 699                                  |  A1 = 5                                   
  Z = 699                                  |  A2 = 6                                   
  VDD = 275388                             |  A3 = 5                                   
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.arb_data_ou 
  I = 291                                  |  A1 = 2                                   
  Z = 291                                  |  A2 = 2                                   
  VDD = 275388                             |  A3 = 2                                   
  VNW = 275388                             |  ZN = 6                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.arb_data_ou 
  I = 2                                    |  A1 = 11                                  
  Z = 18                                   |  A2 = 5                                   
  VDD = 275388                             |  A3 = 5                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.gen_square[ 
  I = 14                                   |  A1 = 11                                  
  Z = 8                                    |  A2 = 11                                  
  VDD = 275388                             |  A3 = 11                                  
  VNW = 275388                             |  ZN = 9                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.gen_square[ 
  I = 1463                                 |  A1 = 8                                   
  Z = 1463                                 |  A2 = 5                                   
  VDD = 275388                             |  A3 = 5                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.gen_square[ 
  I = 2                                    |  A1 = 6                                   
  Z = 12                                   |  A2 = 11                                  
  VDD = 275388                             |  A3 = 5                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 11                                   |  A1 = 3                                   
  Z = 187                                  |  A2 = 5                                   
  VDD = 275388                             |  A3 = 5                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 26                                   |  A1 = 10                                  
  Z = 187                                  |  A2 = 6                                   
  VDD = 275388                             |  A3 = 4                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 393                                  |  A1 = 9                                   
  Z = 393                                  |  A2 = 5                                   
  VDD = 275388                             |  A3 = 11                                  
  VNW = 275388                             |  ZN = 5                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 5                                    |  A1 = 9                                   
  Z = 28                                   |  A2 = 11                                  
  VDD = 275388                             |  A3 = 11                                  
  VNW = 275388                             |  ZN = 6                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 97                                   |  A1 = 4                                   
  Z = 3                                    |  A2 = 5                                   
  VDD = 275388                             |  A3 = 5                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 1014                                 |  A1 = 5                                   
  Z = 1014                                 |  A2 = 4                                   
  VDD = 275388                             |  A3 = 6                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 112                                  |  A1 = 9                                   
  Z = 14                                   |  A2 = 4                                   
  VDD = 275388                             |  A3 = 11                                  
  VNW = 275388                             |  ZN = 4                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 5                                    |  A1 = 7                                   
  Z = 5                                    |  A2 = 4                                   
  VDD = 275388                             |  A3 = 9                                   
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 10                                   |  A1 = 8                                   
  Z = 1014                                 |  A2 = 4                                   
  VDD = 275388                             |  A3 = 9                                   
  VNW = 275388                             |  ZN = 6                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 392                                  |  A1 = 11                                  
  Z = 392                                  |  A2 = 3                                   
  VDD = 275388                             |  A3 = 5                                   
  VNW = 275388                             |  ZN = 6                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 4                                    |  A1 = 5                                   
  Z = 1014                                 |  A2 = 4                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 4                                    |  A1 = 2                                   
  Z = 8                                    |  A2 = 2                                   
  VDD = 275388                             |  A3 = 2                                   
  VNW = 275388                             |  ZN = 5                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 9                                    |  A1 = 4                                   
  Z = 2                                    |  A2 = 4                                   
  VDD = 275388                             |  A3 = 6                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 71                                   |  A1 = 8                                   
  Z = 192                                  |  A2 = 4                                   
  VDD = 275388                             |  A3 = 4                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 22                                   |  A1 = 8                                   
  Z = 8                                    |  A2 = 9                                   
  VDD = 275388                             |  A3 = 11                                  
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 243                                  |  A1 = 11                                  
  Z = 243                                  |  A2 = 7                                   
  VDD = 275388                             |  A3 = 9                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 5                                    |  A1 = 11                                  
  Z = 18                                   |  A2 = 5                                   
  VDD = 275388                             |  A3 = 7                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 9                                    |  A1 = 5                                   
  Z = 1463                                 |  A2 = 3                                   
  VDD = 275388                             |  A3 = 4                                   
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 1014                                 |  A1 = 3                                   
  Z = 53                                   |  A2 = 7                                   
  VDD = 275388                             |  A3 = 5                                   
  VNW = 275388                             |  ZN = 4                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 250                                  |  A1 = 7                                   
  Z = 250                                  |  A2 = 4                                   
  VDD = 275388                             |  A3 = 11                                  
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 6                                    |  A1 = 6                                   
  Z = 3                                    |  A2 = 7                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 3                                    |  A1 = 8                                   
  Z = 4                                    |  A2 = 3                                   
  VDD = 275388                             |  A3 = 5                                   
  VNW = 275388                             |  ZN = 4                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 12                                   |  A1 = 4                                   
  Z = 5                                    |  A2 = 4                                   
  VDD = 275388                             |  A3 = 4                                   
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 5                                    |  A1 = 8                                   
  Z = 5                                    |  A2 = 8                                   
  VDD = 275388                             |  A3 = 3                                   
  VNW = 275388                             |  ZN = 7                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 5                                    |  A1 = 11                                  
  Z = 3                                    |  A2 = 4                                   
  VDD = 275388                             |  A3 = 11                                  
  VNW = 275388                             |  ZN = 6                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 3                                    |  A1 = 5                                   
  Z = 5                                    |  A2 = 2                                   
  VDD = 275388                             |  A3 = 4                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 38                                  |  A1 = 6                                   
  A2 = 38                                  |  A2 = 3                                   
  ZN = 38                                  |  A3 = 3                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 1014                                |  A1 = 8                                   
  A2 = 1014                                |  A2 = 2                                   
  ZN = 1014                                |  A3 = 2                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 61                                  |  A1 = 6                                   
  A2 = 61                                  |  A2 = 8                                   
  ZN = 61                                  |  A3 = 4                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 164                                 |  A1 = 8                                   
  A2 = 164                                 |  A2 = 11                                  
  ZN = 6                                   |  A3 = 5                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 699                                 |  A1 = 5                                   
  A2 = 699                                 |  A2 = 5                                   
  ZN = 699                                 |  A3 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 291                                 |  A1 = 6                                   
  A2 = 29                                  |  A2 = 4                                   
  ZN = 291                                 |  A3 = 10                                  
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 40                                  |  A1 = 11                                  
  A2 = 2                                   |  A2 = 3                                   
  ZN = 11                                  |  A3 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 187                                 |  A1 = 8                                   
  A2 = 51                                  |  A2 = 4                                   
  ZN = 51                                  |  A3 = 10                                  
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 27                                  |  A1 = 7                                   
  A2 = 25                                  |  A2 = 2                                   
  ZN = 4                                   |  A3 = 2                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 291                                 |  A1 = 9                                   
  A2 = 291                                 |  A2 = 11                                  
  ZN = 291                                 |  A3 = 4                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 291                                 |  A1 = 11                                  
  A2 = 29                                  |  A2 = 6                                   
  ZN = 29                                  |  A3 = 2                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 22                                  |  A1 = 10                                  
  A2 = 14                                  |  A2 = 8                                   
  ZN = 14                                  |  A3 = 10                                  
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 15                                  |  A1 = 11                                  
  A2 = 9                                   |  A2 = 7                                   
  ZN = 9                                   |  A3 = 8                                   
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 90                                  |  A1 = 5                                   
  A2 = 8                                   |  A2 = 7                                   
  ZN = 8                                   |  A3 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 13                                  |  A1 = 6                                   
  A2 = 12                                  |  A2 = 8                                   
  ZN = 12                                  |  A3 = 3                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 28                                  |  A1 = 5                                   
  A2 = 4                                   |  A2 = 11                                  
  ZN = 28                                  |  A3 = 5                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 42                                  |  A1 = 11                                  
  A2 = 26                                  |  A2 = 8                                   
  ZN = 2                                   |  A3 = 11                                  
  VDD = 275388                             |  ZN = 7                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 113                                 |  A1 = 9                                   
  A2 = 7                                   |  A2 = 5                                   
  ZN = 2                                   |  A3 = 10                                  
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 4                                   |  A1 = 7                                   
  A2 = 2                                   |  A2 = 5                                   
  ZN = 26                                  |  A3 = 6                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 1014                                |  A1 = 11                                  
  A2 = 1014                                |  A2 = 11                                  
  ZN = 1014                                |  A3 = 11                                  
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 392                                 |  A1 = 11                                  
  A2 = 392                                 |  A2 = 7                                   
  ZN = 392                                 |  A3 = 8                                   
  VDD = 275388                             |  ZN = 7                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 148                                 |  A1 = 7                                   
  A2 = 3                                   |  A2 = 4                                   
  ZN = 148                                 |  A3 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 113                                 |  A1 = 11                                  
  A2 = 9                                   |  A2 = 4                                   
  ZN = 9                                   |  A3 = 6                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 13                                  |  A1 = 9                                   
  A2 = 13                                  |  A2 = 6                                   
  ZN = 13                                  |  A3 = 10                                  
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 523                                 |  A1 = 11                                  
  A2 = 523                                 |  A2 = 5                                   
  ZN = 523                                 |  A3 = 4                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 22                                  |  A1 = 8                                   
  A2 = 15                                  |  A2 = 5                                   
  ZN = 22                                  |  A3 = 6                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 15                                  |  A1 = 11                                  
  A2 = 6                                   |  A2 = 3                                   
  ZN = 3                                   |  A3 = 9                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 50                                  |  A1 = 7                                   
  A2 = 50                                  |  A2 = 4                                   
  ZN = 3                                   |  A3 = 6                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 699                                 |  A1 = 9                                   
  A2 = 699                                 |  A2 = 7                                   
  ZN = 699                                 |  A3 = 11                                  
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 87                                  |  A1 = 2                                   
  A2 = 87                                  |  A2 = 3                                   
  ZN = 87                                  |  A3 = 3                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core5.b.gen_square[ 
  A1 = 100                                 |  A1 = 5                                   
  A2 = 100                                 |  A2 = 11                                  
  ZN = 100                                 |  A3 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core5.b.gen_square[ 
  A1 = 29                                  |  A1 = 6                                   
  A2 = 200                                 |  A2 = 7                                   
  ZN = 200                                 |  A3 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core5.b.gen_square[ 
  A1 = 36                                  |  A1 = 11                                  
  A2 = 22                                  |  A2 = 11                                  
  ZN = 36                                  |  A3 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core5.b.gen_square[ 
  A1 = 58                                  |  A1 = 11                                  
  A2 = 58                                  |  A2 = 5                                   
  ZN = 58                                  |  A3 = 11                                  
  VDD = 275388                             |  ZN = 7                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core5.b.gen_square[ 
  A1 = 55                                  |  A1 = 11                                  
  A2 = 55                                  |  A2 = 5                                   
  ZN = 55                                  |  A3 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core5.b.gen_square[ 
  A1 = 27                                  |  A1 = 11                                  
  A2 = 29                                  |  A2 = 11                                  
  ZN = 29                                  |  A3 = 11                                  
  VDD = 275388                             |  ZN = 8                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 61                                  |  A1 = 11                                  
  A2 = 1014                                |  A2 = 11                                  
  ZN = 1014                                |  A3 = 4                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 33                                  |  A1 = 11                                  
  A2 = 10                                  |  A2 = 10                                  
  ZN = 10                                  |  A3 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 75                                  |  A1 = 11                                  
  A2 = 75                                  |  A2 = 8                                   
  ZN = 75                                  |  A3 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 1014                                |  A1 = 6                                   
  A2 = 1014                                |  A2 = 6                                   
  ZN = 1014                                |  A3 = 11                                  
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 17                                  |  A1 = 11                                  
  A2 = 18                                  |  A2 = 3                                   
  ZN = 18                                  |  A3 = 4                                   
  VDD = 275388                             |  ZN = 7                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core6.b.arb_data_ou 
  A1 = 54                                  |  A1 = 11                                  
  A2 = 54                                  |  A2 = 4                                   
  ZN = 54                                  |  A3 = 4                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core6.b.arb_data_ou 
  A1 = 1014                                |  A1 = 8                                   
  A2 = 6                                   |  A2 = 3                                   
  ZN = 6                                   |  A3 = 11                                  
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core6.b.arb_data_ou 
  A1 = 10                                  |  A1 = 11                                  
  A2 = 4                                   |  A2 = 4                                   
  ZN = 19                                  |  A3 = 11                                  
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core6.b.arb_data_ou 
  A1 = 9                                   |  A1 = 11                                  
  A2 = 2                                   |  A2 = 9                                   
  ZN = 200                                 |  A3 = 11                                  
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core6.b.arb_data_ou 
  A1 = 699                                 |  A1 = 11                                  
  A2 = 699                                 |  A2 = 5                                   
  ZN = 699                                 |  A3 = 11                                  
  VDD = 275388                             |  ZN = 8                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core6.b.arb_data_ou 
  A1 = 192                                 |  A1 = 8                                   
  A2 = 30                                  |  A2 = 4                                   
  ZN = 192                                 |  A3 = 11                                  
  VDD = 275388                             |  ZN = 7                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core6.b.arb_data_ou 
  A1 = 17                                  |  A1 = 9                                   
  A2 = 8                                   |  A2 = 3                                   
  ZN = 8                                   |  A3 = 9                                   
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 23                                  |  A1 = 11                                  
  A2 = 13                                  |  A2 = 5                                   
  ZN = 13                                  |  A3 = 11                                  
  VDD = 275388                             |  ZN = 7                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 10                                  |  A1 = 5                                   
  A2 = 5                                   |  A2 = 6                                   
  ZN = 5                                   |  A3 = 4                                   
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 11                                  |  A1 = 9                                   
  A2 = 54                                  |  A2 = 4                                   
  ZN = 54                                  |  A3 = 6                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 40                                  |  A1 = 9                                   
  A2 = 7                                   |  A2 = 4                                   
  ZN = 7                                   |  A3 = 5                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 11                                  |  A1 = 11                                  
  A2 = 9                                   |  A2 = 5                                   
  ZN = 9                                   |  A3 = 6                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 22                                  |  A1 = 5                                   
  A2 = 10                                  |  A2 = 11                                  
  ZN = 10                                  |  A3 = 6                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 10                                  |  A1 = 7                                   
  A2 = 1463                                |  A2 = 6                                   
  ZN = 1463                                |  A3 = 9                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 50                                  |  A1 = 9                                   
  A2 = 50                                  |  A2 = 10                                  
  ZN = 50                                  |  A3 = 11                                  
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 200                                 |  A1 = 9                                   
  A2 = 200                                 |  A2 = 8                                   
  ZN = 9                                   |  A3 = 11                                  
  VDD = 275388                             |  ZN = 8                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 654                                 |  A1 = 9                                   
  A2 = 654                                 |  A2 = 8                                   
  ZN = 654                                 |  A3 = 4                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 41                                  |  A1 = 7                                   
  A2 = 8                                   |  A2 = 6                                   
  ZN = 8                                   |  A3 = 11                                  
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 87                                  |  A1 = 9                                   
  A2 = 87                                  |  A2 = 4                                   
  ZN = 87                                  |  A3 = 11                                  
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 392                                 |  A1 = 9                                   
  A2 = 392                                 |  A2 = 4                                   
  ZN = 18                                  |  A3 = 11                                  
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 180                                 |  A1 = 9                                   
  A2 = 10                                  |  A2 = 5                                   
  ZN = 10                                  |  A3 = 11                                  
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 243                                 |  A1 = 11                                  
  A2 = 243                                 |  A2 = 5                                   
  ZN = 243                                 |  A3 = 11                                  
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 243                                 |  A1 = 5                                   
  A2 = 243                                 |  A2 = 11                                  
  ZN = 3                                   |  A3 = 8                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 699                                 |  A1 = 5                                   
  A2 = 699                                 |  A2 = 9                                   
  ZN = 699                                 |  A3 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 654                                 |  A1 = 6                                   
  A2 = 7                                   |  A2 = 3                                   
  ZN = 23                                  |  A3 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 37                                  |  A1 = 11                                  
  A2 = 30                                  |  A2 = 5                                   
  ZN = 30                                  |  A3 = 6                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 15                                  |  A1 = 6                                   
  A2 = 13                                  |  A2 = 6                                   
  ZN = 13                                  |  A3 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 17                                  |  A1 = 10                                  
  A2 = 5                                   |  A2 = 3                                   
  ZN = 243                                 |  A3 = 4                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 1014                                |  A1 = 9                                   
  A2 = 12                                  |  A2 = 4                                   
  ZN = 13                                  |  A3 = 9                                   
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 393                                 |  A1 = 5                                   
  A2 = 393                                 |  A2 = 5                                   
  ZN = 1                                   |  A3 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 14                                  |  A1 = 11                                  
  A2 = 8                                   |  A2 = 8                                   
  ZN = 8                                   |  A3 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 17                                  |  A1 = 7                                   
  A2 = 12                                  |  A2 = 3                                   
  ZN = 2                                   |  A3 = 11                                  
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core7.b.arb_data_ou 
  A1 = 14                                  |  A1 = 11                                  
  A2 = 14                                  |  A2 = 6                                   
  ZN = 2                                   |  A3 = 4                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core7.b.gen_square[ 
  A1 = 11                                  |  A1 = 7                                   
  A2 = 15                                  |  A2 = 11                                  
  ZN = 3                                   |  A3 = 8                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core7.b.gen_square[ 
  A1 = 15                                  |  A1 = 11                                  
  A2 = 31                                  |  A2 = 4                                   
  ZN = 15                                  |  A3 = 11                                  
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core7.b.gen_square[ 
  A1 = 10                                  |  A1 = 8                                   
  A2 = 5                                   |  A2 = 6                                   
  ZN = 10                                  |  A3 = 9                                   
  VDD = 275388                             |  ZN = 7                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core7.b.gen_square[ 
  A1 = 36                                  |  A1 = 11                                  
  A2 = 60                                  |  A2 = 4                                   
  ZN = 6                                   |  A3 = 9                                   
  VDD = 275388                             |  ZN = 7                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core7.b.gen_square[ 
  A1 = 1463                                |  A1 = 8                                   
  A2 = 1463                                |  A2 = 4                                   
  ZN = 1463                                |  A3 = 9                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core7.b.illegal_gf1 
  A1 = 60                                  |  A1 = 11                                  
  A2 = 60                                  |  A2 = 3                                   
  ZN = 10                                  |  A3 = 11                                  
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core7.b.illegal_gf1 
  A1 = 8                                   |  A1 = 6                                   
  A2 = 7                                   |  A2 = 5                                   
  ZN = 8                                   |  A3 = 2                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core7.b.illegal_gf1 
  A1 = 25                                  |  A1 = 11                                  
  A2 = 27                                  |  A2 = 11                                  
  ZN = 27                                  |  A3 = 11                                  
  VDD = 275388                             |  ZN = 8                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core7.b.illegal_gf1 
  A1 = 112                                 |  A1 = 8                                   
  A2 = 654                                 |  A2 = 6                                   
  ZN = 112                                 |  A3 = 9                                   
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core7.b.illegal_gf1 
  A1 = 393                                 |  A1 = 11                                  
  A2 = 393                                 |  A2 = 5                                   
  ZN = 2                                   |  A3 = 6                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core7.b.illegal_gf1 
  A1 = 39                                  |  A1 = 11                                  
  A2 = 79                                  |  A2 = 5                                   
  ZN = 79                                  |  A3 = 2                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core7.b.illegal_gf1 
  A1 = 21                                  |  A1 = 10                                  
  A2 = 13                                  |  A2 = 10                                  
  ZN = 13                                  |  A3 = 8                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core1.b.gen_square[ 
  A1 = 59                                  |  A1 = 4                                   
  A2 = 2                                   |  A2 = 4                                   
  ZN = 47                                  |  A3 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core1.b.gen_square[ 
  A1 = 10                                  |  A1 = 11                                  
  A2 = 8                                   |  A2 = 11                                  
  ZN = 10                                  |  A3 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core3.b.gen_square[ 
  A1 = 48                                  |  A1 = 11                                  
  A2 = 96                                  |  A2 = 11                                  
  ZN = 96                                  |  A3 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 1014                                |  A1 = 3                                   
  A2 = 1014                                |  A2 = 2                                   
  ZN = 1014                                |  A3 = 4                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 1463                                |  A1 = 6                                   
  A2 = 1463                                |  A2 = 6                                   
  ZN = 1463                                |  A3 = 4                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 31                                  |  A1 = 5                                   
  A2 = 31                                  |  A2 = 5                                   
  ZN = 31                                  |  A3 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 9                                   |  A1 = 3                                   
  A2 = 61                                  |  A2 = 4                                   
  ZN = 9                                   |  A3 = 11                                  
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core7.b.gen_square[ 
  A1 = 14                                  |  A1 = 4                                   
  A2 = 17                                  |  A2 = 8                                   
  ZN = 17                                  |  A3 = 4                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core0.b.arb_data_ou 
  A1 = 18                                  |  I = 7                                    
  A2 = 13                                  |  ZN = 2                                   
  ZN = 7                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core0.b.arb_data_ou 
  A1 = 1014                                |  I = 10                                   
  A2 = 1014                                |  ZN = 3                                   
  ZN = 1014                                |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core0.b.arb_data_ou 
  A1 = 9                                   |  I = 5                                    
  A2 = 5                                   |  ZN = 2                                   
  ZN = 9                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core0.b.arb_data_ou 
  A1 = 143                                 |  I = 11                                   
  A2 = 143                                 |  ZN = 5                                   
  ZN = 143                                 |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core0.b.arb_data_ou 
  A1 = 17                                  |  I = 5                                    
  A2 = 7                                   |  ZN = 7                                   
  ZN = 7                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core0.b.arb_data_ou 
  A1 = 9                                   |  I = 10                                   
  A2 = 10                                  |  ZN = 6                                   
  ZN = 10                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core0.b.arb_data_ou 
  A1 = 164                                 |  I = 8                                    
  A2 = 10                                  |  ZN = 5                                   
  ZN = 10                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core0.b.arb_data_ou 
  A1 = 16                                  |  I = 7                                    
  A2 = 15                                  |  ZN = 4                                   
  ZN = 15                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 15                                  |  I = 7                                    
  A2 = 61                                  |  ZN = 3                                   
  ZN = 61                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 10                                  |  I = 6                                    
  A2 = 6                                   |  ZN = 7                                   
  ZN = 10                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 53                                  |  I = 8                                    
  A2 = 291                                 |  ZN = 4                                   
  ZN = 291                                 |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 11                                  |  I = 7                                    
  A2 = 17                                  |  ZN = 5                                   
  ZN = 17                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 116                                 |  I = 8                                    
  A2 = 19                                  |  ZN = 2                                   
  ZN = 19                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 33                                  |  I = 9                                    
  A2 = 16                                  |  ZN = 3                                   
  ZN = 16                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 11                                  |  I = 3                                    
  A2 = 16                                  |  ZN = 2                                   
  ZN = 16                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 15                                  |  I = 11                                   
  A2 = 6                                   |  ZN = 5                                   
  ZN = 6                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 51                                  |  I = 9                                    
  A2 = 3                                   |  ZN = 2                                   
  ZN = 4                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 58                                  |  I = 7                                    
  A2 = 58                                  |  ZN = 5                                   
  ZN = 58                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 699                                 |  I = 11                                   
  A2 = 699                                 |  ZN = 2                                   
  ZN = 699                                 |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 200                                 |  I = 2                                    
  A2 = 1014                                |  ZN = 3                                   
  ZN = 1014                                |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core0.b.gen_square[ 
  A1 = 17                                  |  I = 5                                    
  A2 = 15                                  |  ZN = 3                                   
  ZN = 15                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 20                                  |  I = 11                                   
  A2 = 13                                  |  ZN = 4                                   
  ZN = 13                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 172                                 |  I = 7                                    
  A2 = 172                                 |  ZN = 5                                   
  ZN = 172                                 |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 1463                                |  I = 11                                   
  A2 = 6                                   |  ZN = 5                                   
  ZN = 6                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 22                                  |  I = 9                                    
  A2 = 6                                   |  ZN = 7                                   
  ZN = 4                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 21                                  |  I = 10                                   
  A2 = 12                                  |  ZN = 5                                   
  ZN = 12                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 40                                  |  I = 6                                    
  A2 = 9                                   |  ZN = 3                                   
  ZN = 9                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 1463                                |  I = 3                                    
  A2 = 1463                                |  ZN = 3                                   
  ZN = 1463                                |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 79                                  |  I = 9                                    
  A2 = 79                                  |  ZN = 5                                   
  ZN = 4                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 1014                                |  I = 3                                    
  A2 = 1014                                |  ZN = 2                                   
  ZN = 1014                                |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 16                                  |  I = 11                                   
  A2 = 60                                  |  ZN = 4                                   
  ZN = 60                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 27                                  |  I = 9                                    
  A2 = 27                                  |  ZN = 5                                   
  ZN = 3                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 91                                  |  I = 4                                    
  A2 = 25                                  |  ZN = 2                                   
  ZN = 193                                 |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 68                                  |  I = 10                                   
  A2 = 68                                  |  ZN = 3                                   
  ZN = 68                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core0.b.illegal_gf1 
  A1 = 20                                  |  I = 6                                    
  A2 = 17                                  |  ZN = 4                                   
  ZN = 2                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core1.b.arb_data_ou 
  A1 = 393                                 |  I = 11                                   
  A2 = 393                                 |  ZN = 5                                   
  ZN = 393                                 |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core1.b.arb_data_ou 
  A1 = 25                                  |  I = 8                                    
  A2 = 16                                  |  ZN = 5                                   
  ZN = 16                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core1.b.arb_data_ou 
  A1 = 56                                  |  I = 9                                    
  A2 = 56                                  |  ZN = 3                                   
  ZN = 56                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core1.b.gen_square[ 
  A1 = 15                                  |  I = 8                                    
  A2 = 16                                  |  ZN = 7                                   
  ZN = 16                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core1.b.illegal_gf1 
  A1 = 113                                 |  I = 11                                   
  A2 = 113                                 |  ZN = 4                                   
  ZN = 113                                 |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core1.b.illegal_gf1 
  A1 = 200                                 |  I = 11                                   
  A2 = 200                                 |  ZN = 2                                   
  ZN = 200                                 |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core1.b.illegal_gf1 
  A1 = 9                                   |  I = 9                                    
  A2 = 8                                   |  ZN = 6                                   
  ZN = 8                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core1.b.illegal_gf1 
  A1 = 68                                  |  I = 8                                    
  A2 = 68                                  |  ZN = 4                                   
  ZN = 68                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core1.b.illegal_gf1 
  A1 = 18                                  |  I = 7                                    
  A2 = 12                                  |  ZN = 8                                   
  ZN = 18                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.arb_data_ou 
  A1 = 1463                                |  I = 9                                    
  A2 = 1463                                |  ZN = 4                                   
  ZN = 1463                                |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.arb_data_ou 
  A1 = 1463                                |  I = 11                                   
  A2 = 1463                                |  ZN = 3                                   
  ZN = 1463                                |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.arb_data_ou 
  A1 = 1014                                |  I = 9                                    
  A2 = 1014                                |  ZN = 6                                   
  ZN = 1014                                |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.arb_data_ou 
  A1 = 113                                 |  I = 11                                   
  A2 = 113                                 |  ZN = 3                                   
  ZN = 113                                 |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.arb_data_ou 
  A1 = 60                                  |  I = 10                                   
  A2 = 60                                  |  ZN = 5                                   
  ZN = 60                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.arb_data_ou 
  A1 = 40                                  |  I = 6                                    
  A2 = 45                                  |  ZN = 2                                   
  ZN = 45                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.gen_square[ 
  A1 = 68                                  |  I = 8                                    
  A2 = 68                                  |  ZN = 4                                   
  ZN = 68                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.gen_square[ 
  A1 = 1014                                |  I = 7                                    
  A2 = 23                                  |  ZN = 5                                   
  ZN = 61                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.gen_square[ 
  A1 = 1014                                |  I = 5                                    
  A2 = 1014                                |  ZN = 5                                   
  ZN = 2                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.gen_square[ 
  A1 = 523                                 |  I = 10                                   
  A2 = 523                                 |  ZN = 6                                   
  ZN = 523                                 |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.gen_square[ 
  A1 = 33                                  |  I = 9                                    
  A2 = 9                                   |  ZN = 4                                   
  ZN = 9                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.gen_square[ 
  A1 = 6                                   |  I = 9                                    
  A2 = 4                                   |  ZN = 9                                   
  ZN = 7                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.gen_square[ 
  A1 = 218                                 |  I = 10                                   
  A2 = 218                                 |  ZN = 2                                   
  ZN = 218                                 |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.gen_square[ 
  A1 = 1463                                |  I = 8                                    
  A2 = 1463                                |  ZN = 7                                   
  ZN = 1463                                |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.gen_square[ 
  A1 = 6                                   |  I = 10                                   
  A2 = 164                                 |  ZN = 6                                   
  ZN = 164                                 |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 13                                  |  I = 10                                   
  A2 = 19                                  |  ZN = 4                                   
  ZN = 7                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 10                                  |  I = 11                                   
  A2 = 7                                   |  ZN = 2                                   
  ZN = 7                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 1463                                |  I = 8                                    
  A2 = 8                                   |  ZN = 3                                   
  ZN = 8                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 15                                  |  I = 9                                    
  A2 = 9                                   |  ZN = 5                                   
  ZN = 15                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 79                                  |  I = 7                                    
  A2 = 6                                   |  ZN = 3                                   
  ZN = 51                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 50                                  |  I = 7                                    
  A2 = 50                                  |  ZN = 5                                   
  ZN = 50                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 24                                  |  I = 4                                    
  A2 = 26                                  |  ZN = 2                                   
  ZN = 4                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 1014                                |  I = 11                                   
  A2 = 291                                 |  ZN = 5                                   
  ZN = 1014                                |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 15                                  |  I = 11                                   
  A2 = 7                                   |  ZN = 2                                   
  ZN = 7                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 24                                  |  I = 8                                    
  A2 = 24                                  |  ZN = 4                                   
  ZN = 24                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 31                                  |  I = 8                                    
  A2 = 35                                  |  ZN = 3                                   
  ZN = 35                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 53                                  |  I = 10                                   
  A2 = 53                                  |  ZN = 4                                   
  ZN = 53                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 44                                  |  I = 9                                    
  A2 = 44                                  |  ZN = 5                                   
  ZN = 47                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 16                                  |  I = 8                                    
  A2 = 13                                  |  ZN = 3                                   
  ZN = 13                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 10                                  |  I = 10                                   
  A2 = 392                                 |  ZN = 4                                   
  ZN = 392                                 |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 20                                  |  I = 9                                    
  A2 = 39                                  |  ZN = 3                                   
  ZN = 3                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 79                                  |  I = 7                                    
  A2 = 40                                  |  ZN = 5                                   
  ZN = 5                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 11                                  |  I = 9                                    
  A2 = 111                                 |  ZN = 3                                   
  ZN = 11                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 393                                 |  I = 8                                    
  A2 = 393                                 |  ZN = 5                                   
  ZN = 393                                 |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 11                                  |  I = 3                                    
  A2 = 18                                  |  ZN = 3                                   
  ZN = 18                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 9                                   |  I = 8                                    
  A2 = 14                                  |  ZN = 3                                   
  ZN = 14                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 1014                                |  I = 8                                    
  A2 = 7                                   |  ZN = 3                                   
  ZN = 7                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 61                                  |  I = 7                                    
  A2 = 11                                  |  ZN = 5                                   
  ZN = 2                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 1463                                |  I = 10                                   
  A2 = 1463                                |  ZN = 6                                   
  ZN = 1463                                |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 33                                  |  I = 11                                   
  A2 = 12                                  |  ZN = 7                                   
  ZN = 3                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core3.b.arb_data_ou 
  A1 = 10                                  |  I = 11                                   
  A2 = 11                                  |  ZN = 3                                   
  ZN = 10                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core3.b.arb_data_ou 
  A1 = 18                                  |  I = 5                                    
  A2 = 9                                   |  ZN = 3                                   
  ZN = 9                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core3.b.arb_data_ou 
  A1 = 19                                  |  I = 7                                    
  A2 = 1463                                |  ZN = 4                                   
  ZN = 1463                                |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core3.b.arb_data_ou 
  A1 = 4                                   |  I = 9                                    
  A2 = 3                                   |  ZN = 3                                   
  ZN = 3                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core3.b.arb_data_ou 
  A1 = 6                                   |  I = 9                                    
  A2 = 4                                   |  ZN = 4                                   
  ZN = 3                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core3.b.arb_data_ou 
  A1 = 3                                   |  I = 8                                    
  A2 = 2                                   |  ZN = 5                                   
  ZN = 393                                 |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core3.b.arb_data_ou 
  A1 = 6                                   |  I = 11                                   
  A2 = 3                                   |  ZN = 6                                   
  ZN = 1                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core3.b.arb_data_ou 
  A1 = 7                                   |  I = 10                                   
  A2 = 11                                  |  ZN = 5                                   
  ZN = 4                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core3.b.arb_data_ou 
  A1 = 392                                 |  I = 11                                   
  A2 = 3                                   |  ZN = 4                                   
  ZN = 3                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core3.b.gen_square[ 
  A1 = 1463                                |  I = 8                                    
  A2 = 4                                   |  ZN = 4                                   
  ZN = 2                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core3.b.gen_square[ 
  A1 = 3                                   |  I = 7                                    
  A2 = 148                                 |  ZN = 5                                   
  ZN = 4                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core3.b.gen_square[ 
  A1 = 4                                   |  I = 9                                    
  A2 = 4                                   |  ZN = 2                                   
  ZN = 123                                 |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core3.b.gen_square[ 
  A1 = 1463                                |  I = 9                                    
  A2 = 4                                   |  ZN = 6                                   
  ZN = 3                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core3.b.gen_square[ 
  A1 = 3                                   |  I = 6                                    
  A2 = 142                                 |  ZN = 3                                   
  ZN = 5                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core3.b.gen_square[ 
  A1 = 4                                   |  I = 8                                    
  A2 = 9                                   |  ZN = 7                                   
  ZN = 3                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core3.b.gen_square[ 
  A1 = 4                                   |  I = 9                                    
  A2 = 16                                  |  ZN = 3                                   
  ZN = 3                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 2                                   |  I = 11                                   
  A2 = 2                                   |  ZN = 5                                   
  ZN = 3                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 4                                   |  I = 9                                    
  A2 = 3                                   |  ZN = 6                                   
  ZN = 4                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 1014                                |  I = 11                                   
  A2 = 41                                  |  ZN = 5                                   
  ZN = 4                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 39                                  |  I = 9                                    
  A2 = 6                                   |  ZN = 7                                   
  ZN = 2                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai31_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 218                                 |  I = 9                                    
  A2 = 218                                 |  ZN = 4                                   
  A3 = 5                                   |  VDD = 280586                             
  B = 7                                    |  VNW = 280586                             
  ZN = 7                                   |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai31_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 10                                  |  I = 5                                    
  A2 = 17                                  |  ZN = 3                                   
  A3 = 10                                  |  VDD = 280586                             
  B = 1                                    |  VNW = 280586                             
  ZN = 10                                  |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai31_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 53                                  |  I = 8                                    
  A2 = 291                                 |  ZN = 6                                   
  A3 = 3                                   |  VDD = 280586                             
  B = 53                                   |  VNW = 280586                             
  ZN = 2                                   |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai31_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 34                                  |  I = 8                                    
  A2 = 24                                  |  ZN = 4                                   
  A3 = 24                                  |  VDD = 280586                             
  B = 12                                   |  VNW = 280586                             
  ZN = 12                                  |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai31_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 18                                  |  I = 3                                    
  A2 = 10                                  |  ZN = 3                                   
  A3 = 5                                   |  VDD = 280586                             
  B = 1014                                 |  VNW = 280586                             
  ZN = 10                                  |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai31_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 51                                  |  I = 8                                    
  A2 = 51                                  |  ZN = 3                                   
  A3 = 7                                   |  VDD = 280586                             
  B = 51                                   |  VNW = 280586                             
  ZN = 51                                  |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai31_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 16                                  |  I = 9                                    
  A2 = 25                                  |  ZN = 3                                   
  A3 = 1                                   |  VDD = 280586                             
  B = 4                                    |  VNW = 280586                             
  ZN = 4                                   |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai31_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 392                                 |  I = 9                                    
  A2 = 392                                 |  ZN = 4                                   
  A3 = 392                                 |  VDD = 280586                             
  B = 8                                    |  VNW = 280586                             
  ZN = 8                                   |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai31_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 1463                                |  I = 7                                    
  A2 = 393                                 |  ZN = 6                                   
  A3 = 393                                 |  VDD = 280586                             
  B = 393                                  |  VNW = 280586                             
  ZN = 393                                 |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai31_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 94                                  |  I = 11                                   
  A2 = 94                                  |  ZN = 7                                   
  A3 = 94                                  |  VDD = 280586                             
  B = 1014                                 |  VNW = 280586                             
  ZN = 94                                  |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai31_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 11                                  |  I = 8                                    
  A2 = 26                                  |  ZN = 7                                   
  A3 = 11                                  |  VDD = 280586                             
  B = 26                                   |  VNW = 280586                             
  ZN = 5                                   |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai31_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 291                                 |  I = 9                                    
  A2 = 291                                 |  ZN = 4                                   
  A3 = 4                                   |  VDD = 280586                             
  B = 7                                    |  VNW = 280586                             
  ZN = 4                                   |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai31_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 10                                  |  I = 7                                    
  A2 = 113                                 |  ZN = 7                                   
  A3 = 2                                   |  VDD = 280586                             
  B = 113                                  |  VNW = 280586                             
  ZN = 2                                   |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai31_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 4                                   |  I = 9                                    
  A2 = 10                                  |  ZN = 5                                   
  A3 = 2                                   |  VDD = 280586                             
  B = 41                                   |  VNW = 280586                             
  ZN = 4                                   |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai31_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 16                                  |  I = 7                                    
  A2 = 18                                  |  ZN = 6                                   
  A3 = 18                                  |  VDD = 280586                             
  B = 7                                    |  VNW = 280586                             
  ZN = 18                                  |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai31_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 79                                  |  I = 11                                   
  A2 = 79                                  |  ZN = 4                                   
  A3 = 79                                  |  VDD = 280586                             
  B = 187                                  |  VNW = 280586                             
  ZN = 79                                  |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai31_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 9                                   |  I = 11                                   
  A2 = 9                                   |  ZN = 2                                   
  A3 = 3                                   |  VDD = 280586                             
  B = 2                                    |  VNW = 280586                             
  ZN = 2                                   |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai31_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 5                                   |  I = 7                                    
  A2 = 7                                   |  ZN = 3                                   
  A3 = 10                                  |  VDD = 280586                             
  B = 2                                    |  VNW = 280586                             
  ZN = 2                                   |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 19                                   |  I = 11                                   
  Z = 19                                   |  ZN = 6                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 523                                  |  I = 11                                   
  Z = 523                                  |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 7                                    |  I = 8                                    
  Z = 654                                  |  ZN = 7                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 19                                   |  I = 6                                    
  Z = 19                                   |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 7                                    |  I = 10                                   
  Z = 9                                    |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 2                                    |  I = 9                                    
  Z = 148                                  |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 9                                    |  I = 8                                    
  Z = 8                                    |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 4                                    |  I = 11                                   
  Z = 15                                   |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 164                                  |  I = 9                                    
  Z = 164                                  |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 13                                   |  I = 10                                   
  Z = 13                                   |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 10                                   |  I = 11                                   
  Z = 194                                  |  ZN = 6                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 187                                  |  I = 8                                    
  Z = 187                                  |  ZN = 6                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 10                                   |  I = 9                                    
  Z = 5                                    |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 193                                  |  I = 7                                    
  Z = 193                                  |  ZN = 8                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 8                                    |  I = 8                                    
  Z = 8                                    |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 6                                    |  I = 9                                    
  Z = 42                                   |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 1014                                 |  I = 7                                    
  Z = 1014                                 |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 3                                    |  I = 8                                    
  Z = 7                                    |  ZN = 6                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 90                                   |  I = 11                                   
  Z = 90                                   |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 1014                                 |  I = 10                                   
  Z = 1                                    |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 392                                  |  I = 9                                    
  Z = 392                                  |  ZN = 8                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 393                                  |  I = 6                                    
  Z = 42                                   |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 10                                   |  I = 10                                   
  Z = 392                                  |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 1463                                 |  I = 10                                   
  Z = 1463                                 |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 392                                  |  I = 10                                   
  Z = 10                                   |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 1014                                 |  I = 3                                    
  Z = 4                                    |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 699                                  |  I = 8                                    
  Z = 699                                  |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 1014                                 |  I = 5                                    
  Z = 94                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 9                                    |  I = 9                                    
  Z = 10                                   |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 5                                    |  I = 11                                   
  Z = 5                                    |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 3                                    |  I = 11                                   
  Z = 6                                    |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 53                                   |  I = 11                                   
  Z = 53                                   |  ZN = 8                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 48                                   |  I = 11                                   
  Z = 1014                                 |  ZN = 7                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 291                                  |  I = 11                                   
  Z = 5                                    |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 1463                                 |  I = 8                                    
  Z = 1463                                 |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 96                                   |  I = 11                                   
  Z = 96                                   |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 193                                  |  I = 8                                    
  Z = 1463                                 |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 523                                  |  I = 7                                    
  Z = 523                                  |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 291                                  |  I = 7                                    
  Z = 96                                   |  ZN = 7                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 699                                  |  I = 11                                   
  Z = 699                                  |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 193                                  |  I = 3                                    
  Z = 1463                                 |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 1463                                 |  I = 9                                    
  Z = 193                                  |  ZN = 8                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 523                                  |  I = 10                                   
  Z = 523                                  |  ZN = 6                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 21                                   |  I = 10                                   
  Z = 21                                   |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 6                                    |  I = 11                                   
  Z = 6                                    |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 523                                  |  I = 9                                    
  Z = 523                                  |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 1463                                 |  I = 6                                    
  Z = 193                                  |  ZN = 6                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 8                                    |  I = 11                                   
  Z = 1463                                 |  ZN = 6                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 291                                  |  I = 11                                   
  Z = 291                                  |  ZN = 8                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 8                                    |  I = 10                                   
  Z = 8                                    |  ZN = 6                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 95                                   |  I = 10                                   
  Z = 95                                   |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 6                                    |  I = 4                                    
  Z = 6                                    |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 22                                   |  I = 7                                    
  Z = 22                                   |  ZN = 7                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 5                                    |  I = 5                                    
  Z = 5                                    |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 113                                  |  I = 6                                    
  Z = 113                                  |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 654                                  |  I = 8                                    
  Z = 654                                  |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core5.b.gen_square[ 
  I = 8                                    |  I = 11                                   
  Z = 8                                    |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core5.b.gen_square[ 
  I = 44                                   |  I = 11                                   
  Z = 654                                  |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core5.b.gen_square[ 
  I = 194                                  |  I = 7                                    
  Z = 194                                  |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core5.b.gen_square[ 
  I = 10                                   |  I = 11                                   
  Z = 43                                   |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core5.b.gen_square[ 
  I = 10                                   |  I = 7                                    
  Z = 10                                   |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core5.b.gen_square[ 
  I = 113                                  |  I = 8                                    
  Z = 113                                  |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core5.b.gen_square[ 
  I = 16                                   |  I = 11                                   
  Z = 16                                   |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 5                                    |  I = 10                                   
  Z = 5                                    |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 654                                  |  I = 11                                   
  Z = 7                                    |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 3                                    |  I = 10                                   
  Z = 3                                    |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 4                                    |  I = 11                                   
  Z = 2                                    |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 4                                    |  I = 9                                    
  Z = 2                                    |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 4                                    |  I = 8                                    
  Z = 4                                    |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 291                                 |  I = 5                                    
  A2 = 291                                 |  ZN = 2                                   
  Z = 291                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 1463                                |  I = 11                                   
  A2 = 1463                                |  ZN = 5                                   
  Z = 1463                                 |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 48                                  |  I = 11                                   
  A2 = 96                                  |  ZN = 5                                   
  Z = 1014                                 |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 18                                  |  I = 7                                    
  A2 = 26                                  |  ZN = 4                                   
  Z = 21                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 200                                 |  I = 3                                    
  A2 = 1014                                |  ZN = 3                                   
  Z = 200                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 16                                  |  I = 11                                   
  A2 = 15                                  |  ZN = 5                                   
  Z = 4                                    |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.arb_data_ou 
  A1 = 192                                 |  I = 11                                   
  A2 = 192                                 |  ZN = 4                                   
  Z = 35                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.arb_data_ou 
  A1 = 22                                  |  I = 7                                    
  A2 = 27                                  |  ZN = 3                                   
  Z = 22                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.arb_data_ou 
  A1 = 123                                 |  I = 9                                    
  A2 = 22                                  |  ZN = 7                                   
  Z = 12                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.arb_data_ou 
  A1 = 1014                                |  I = 8                                    
  A2 = 12                                  |  ZN = 4                                   
  Z = 12                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.arb_data_ou 
  A1 = 36                                  |  I = 8                                    
  A2 = 14                                  |  ZN = 3                                   
  Z = 36                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.arb_data_ou 
  A1 = 1014                                |  I = 9                                    
  A2 = 1014                                |  ZN = 5                                   
  Z = 1014                                 |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.arb_data_ou 
  A1 = 1463                                |  I = 11                                   
  A2 = 12                                  |  ZN = 6                                   
  Z = 1463                                 |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.arb_data_ou 
  A1 = 193                                 |  I = 9                                    
  A2 = 91                                  |  ZN = 6                                   
  Z = 91                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.arb_data_ou 
  A1 = 34                                  |  I = 8                                    
  A2 = 34                                  |  ZN = 3                                   
  Z = 24                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 392                                 |  I = 11                                   
  A2 = 392                                 |  ZN = 2                                   
  Z = 117                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 1014                                |  I = 5                                    
  A2 = 1014                                |  ZN = 2                                   
  Z = 1                                    |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 1463                                |  I = 8                                    
  A2 = 250                                 |  ZN = 3                                   
  Z = 1463                                 |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 10                                  |  I = 7                                    
  A2 = 11                                  |  ZN = 4                                   
  Z = 18                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 2                                   |  I = 11                                   
  A2 = 2                                   |  ZN = 2                                   
  Z = 2                                    |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 6                                   |  I = 7                                    
  A2 = 25                                  |  ZN = 8                                   
  Z = 5                                    |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 24                                  |  I = 9                                    
  A2 = 22                                  |  ZN = 2                                   
  Z = 117                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 523                                 |  I = 3                                    
  A2 = 523                                 |  ZN = 2                                   
  Z = 523                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 10                                  |  I = 11                                   
  A2 = 17                                  |  ZN = 2                                   
  Z = 56                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 164                                 |  I = 9                                    
  A2 = 164                                 |  ZN = 7                                   
  Z = 34                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 1014                                |  I = 11                                   
  A2 = 3                                   |  ZN = 7                                   
  Z = 18                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 31                                  |  I = 9                                    
  A2 = 10                                  |  ZN = 5                                   
  Z = 31                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 10                                  |  I = 8                                    
  A2 = 148                                 |  ZN = 8                                   
  Z = 148                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 8                                   |  I = 3                                    
  A2 = 18                                  |  ZN = 2                                   
  Z = 1014                                 |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 1014                                |  I = 3                                    
  A2 = 8                                   |  ZN = 3                                   
  Z = 8                                    |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 6                                   |  I = 10                                   
  A2 = 13                                  |  ZN = 2                                   
  Z = 44                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 523                                 |  I = 11                                   
  A2 = 523                                 |  ZN = 4                                   
  Z = 523                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 5                                   |  I = 8                                    
  A2 = 9                                   |  ZN = 4                                   
  Z = 22                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 68                                  |  I = 8                                    
  A2 = 68                                  |  ZN = 3                                   
  Z = 68                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 15                                  |  I = 9                                    
  A2 = 13                                  |  ZN = 3                                   
  Z = 291                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 100                                 |  I = 8                                    
  A2 = 100                                 |  ZN = 4                                   
  Z = 2                                    |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 117                                 |  I = 11                                   
  A2 = 117                                 |  ZN = 5                                   
  Z = 38                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 13                                  |  I = 8                                    
  A2 = 8                                   |  ZN = 4                                   
  Z = 8                                    |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 2                                   |  I = 8                                    
  A2 = 2                                   |  ZN = 5                                   
  Z = 192                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 1463                                |  I = 9                                    
  A2 = 1463                                |  ZN = 4                                   
  Z = 6                                    |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 10                                  |  I = 11                                   
  A2 = 43                                  |  ZN = 5                                   
  Z = 43                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 1463                                |  I = 6                                    
  A2 = 250                                 |  ZN = 5                                   
  Z = 250                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 97                                  |  I = 11                                   
  A2 = 97                                  |  ZN = 4                                   
  Z = 1                                    |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 12                                  |  I = 7                                    
  A2 = 11                                  |  ZN = 7                                   
  Z = 11                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 192                                 |  I = 8                                    
  A2 = 192                                 |  ZN = 7                                   
  Z = 5                                    |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 61                                  |  I = 9                                    
  A2 = 1014                                |  ZN = 3                                   
  Z = 1014                                 |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 523                                 |  I = 10                                   
  A2 = 523                                 |  ZN = 4                                   
  Z = 523                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 113                                 |  I = 6                                    
  A2 = 113                                 |  ZN = 5                                   
  Z = 3                                    |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 392                                 |  I = 11                                   
  A2 = 392                                 |  ZN = 4                                   
  Z = 392                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 180                                 |  I = 9                                    
  A2 = 180                                 |  ZN = 7                                   
  Z = 180                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 24                                  |  I = 9                                    
  A2 = 5                                   |  ZN = 5                                   
  Z = 70                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 38                                  |  I = 3                                    
  A2 = 31                                  |  ZN = 2                                   
  Z = 3                                    |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 1014                                |  I = 9                                    
  A2 = 13                                  |  ZN = 5                                   
  Z = 94                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 7                                   |  I = 11                                   
  A2 = 2                                   |  ZN = 3                                   
  Z = 2                                    |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 61                                  |  I = 7                                    
  A2 = 2                                   |  ZN = 4                                   
  Z = 2                                    |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core7.b.arb_data_ou 
  A1 = 4                                   |  I = 9                                    
  A2 = 4                                   |  ZN = 2                                   
  Z = 7                                    |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_1:i |Instance: \i_chip_core.core7.b.arb_data_ou 
  A1 = 63                                  |  I = 8                                    
  A2 = 4                                   |  ZN = 3                                   
  Z = 3                                    |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__and3_1: |Instance: \i_chip_core.core7.b.arb_data_ou 
  A1 = 1463                                |  I = 11                                   
  A2 = 1463                                |  ZN = 5                                   
  A3 = 1463                                |  VDD = 280586                             
  Z = 1463                                 |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__and3_1: |Instance: \i_chip_core.core7.b.arb_data_ou 
  A1 = 187                                 |  I = 11                                   
  A2 = 187                                 |  ZN = 6                                   
  A3 = 7                                   |  VDD = 280586                             
  Z = 187                                  |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__and3_1: |Instance: \i_chip_core.core7.b.gen_square[ 
  A1 = 193                                 |  I = 11                                   
  A2 = 91                                  |  ZN = 2                                   
  A3 = 193                                 |  VDD = 280586                             
  Z = 193                                  |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__and3_1: |Instance: \i_chip_core.core7.b.gen_square[ 
  A1 = 31                                  |  I = 11                                   
  A2 = 35                                  |  ZN = 6                                   
  A3 = 31                                  |  VDD = 280586                             
  Z = 31                                   |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__and3_1: |Instance: \i_chip_core.core7.b.gen_square[ 
  A1 = 7                                   |  I = 11                                   
  A2 = 7                                   |  ZN = 4                                   
  A3 = 18                                  |  VDD = 280586                             
  Z = 7                                    |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__and3_1: |Instance: \i_chip_core.core7.b.gen_square[ 
  A1 = 12                                  |  I = 8                                    
  A2 = 19                                  |  ZN = 3                                   
  A3 = 19                                  |  VDD = 280586                             
  Z = 12                                   |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__and3_1: |Instance: \i_chip_core.core7.b.gen_square[ 
  A1 = 61                                  |  I = 3                                    
  A2 = 15                                  |  ZN = 3                                   
  A3 = 61                                  |  VDD = 280586                             
  Z = 61                                   |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__and3_1: |Instance: \i_chip_core.core7.b.gen_square[ 
  A1 = 51                                  |  I = 7                                    
  A2 = 8                                   |  ZN = 6                                   
  A3 = 11                                  |  VDD = 280586                             
  Z = 11                                   |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__and3_1: |Instance: \i_chip_core.core7.b.gen_square[ 
  A1 = 1014                                |  I = 7                                    
  A2 = 1014                                |  ZN = 4                                   
  A3 = 1014                                |  VDD = 280586                             
  Z = 1014                                 |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__and3_1: |Instance: \i_chip_core.core7.b.gen_square[ 
  A1 = 192                                 |  I = 6                                    
  A2 = 61                                  |  ZN = 8                                   
  A3 = 3                                   |  VDD = 280586                             
  Z = 61                                   |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand4_1 |Instance: \i_chip_core.core7.b.gen_square[ 
  A1 = 95                                  |  I = 8                                    
  A2 = 95                                  |  ZN = 5                                   
  A3 = 95                                  |  VDD = 280586                             
  A4 = 95                                  |  VNW = 280586                             
  ZN = 95                                  |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand4_1 |Instance: \i_chip_core.core7.b.gen_square[ 
  A1 = 44                                  |  I = 11                                   
  A2 = 44                                  |  ZN = 4                                   
  A3 = 20                                  |  VDD = 280586                             
  A4 = 44                                  |  VNW = 280586                             
  ZN = 3                                   |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand4_1 |Instance: \i_chip_core.core7.b.gen_square[ 
  A1 = 95                                  |  I = 8                                    
  A2 = 95                                  |  ZN = 5                                   
  A3 = 95                                  |  VDD = 280586                             
  A4 = 95                                  |  VNW = 280586                             
  ZN = 2                                   |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand4_1 |Instance: \i_chip_core.core7.b.gen_square[ 
  A1 = 654                                 |  I = 9                                    
  A2 = 654                                 |  ZN = 4                                   
  A3 = 15                                  |  VDD = 280586                             
  A4 = 71                                  |  VNW = 280586                             
  ZN = 654                                 |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand4_1 |Instance: \i_chip_core.core7.b.gen_square[ 
  A1 = 16                                  |  I = 9                                    
  A2 = 43                                  |  ZN = 4                                   
  A3 = 16                                  |  VDD = 280586                             
  A4 = 200                                 |  VNW = 280586                             
  ZN = 16                                  |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand4_1 |Instance: \i_chip_core.core7.b.gen_square[ 
  A1 = 52                                  |  I = 4                                    
  A2 = 11                                  |  ZN = 2                                   
  A3 = 52                                  |  VDD = 280586                             
  A4 = 21                                  |  VNW = 280586                             
  ZN = 11                                  |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand4_1 |Instance: \i_chip_core.core7.b.gen_square[ 
  A1 = 194                                 |  I = 11                                   
  A2 = 194                                 |  ZN = 4                                   
  A3 = 194                                 |  VDD = 280586                             
  A4 = 194                                 |  VNW = 280586                             
  ZN = 194                                 |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand4_1 |Instance: \i_chip_core.core7.b.illegal_gf1 
  A1 = 26                                  |  I = 2                                    
  A2 = 113                                 |  ZN = 5                                   
  A3 = 16                                  |  VDD = 280586                             
  A4 = 18                                  |  VNW = 280586                             
  ZN = 26                                  |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand4_1 |Instance: \i_chip_core.core7.b.illegal_gf1 
  A1 = 250                                 |  I = 6                                    
  A2 = 250                                 |  ZN = 5                                   
  A3 = 10                                  |  VDD = 280586                             
  A4 = 18                                  |  VNW = 280586                             
  ZN = 250                                 |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand4_1 |Instance: \i_chip_core.core7.b.illegal_gf1 
  A1 = 68                                  |  I = 11                                   
  A2 = 2                                   |  ZN = 3                                   
  A3 = 68                                  |  VDD = 280586                             
  A4 = 12                                  |  VNW = 280586                             
  ZN = 4                                   |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand4_1 |Instance: \i_chip_core.core7.b.illegal_gf1 
  A1 = 9                                   |  I = 9                                    
  A2 = 4                                   |  ZN = 4                                   
  A3 = 10                                  |  VDD = 280586                             
  A4 = 7                                   |  VNW = 280586                             
  ZN = 5                                   |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand4_1 |Instance: \i_chip_core.core7.b.illegal_gf1 
  A1 = 11                                  |  I = 5                                    
  A2 = 5                                   |  ZN = 2                                   
  A3 = 11                                  |  VDD = 280586                             
  A4 = 5                                   |  VNW = 280586                             
  ZN = 4                                   |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi221_ |Instance: \i_chip_core.core7.b.illegal_gf1 
  A1 = 20                                  |  I = 11                                   
  A2 = 3                                   |  ZN = 7                                   
  B1 = 4                                   |  VDD = 280586                             
  B2 = 3                                   |  VNW = 280586                             
  C = 5                                    |  VPW = 280584                             
  ZN = 4                                   |  VSS = 280584                             
  VDD = 275388                             |                                           
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi221_ |Instance: \i_chip_core.core7.b.illegal_gf1 
  A1 = 17                                  |  I = 8                                    
  A2 = 38                                  |  ZN = 5                                   
  B1 = 38                                  |  VDD = 280586                             
  B2 = 2                                   |  VNW = 280586                             
  C = 8                                    |  VPW = 280584                             
  ZN = 2                                   |  VSS = 280584                             
  VDD = 275388                             |                                           
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi221_ |Instance: \i_chip_core.core7.b.illegal_gf1 
  A1 = 654                                 |  I = 8                                    
  A2 = 654                                 |  ZN = 4                                   
  B1 = 654                                 |  VDD = 280586                             
  B2 = 654                                 |  VNW = 280586                             
  C = 654                                  |  VPW = 280584                             
  ZN = 654                                 |  VSS = 280584                             
  VDD = 275388                             |                                           
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi221_ |Instance: \i_chip_core.core7.b.illegal_gf1 
  A1 = 142                                 |  I = 5                                    
  A2 = 8                                   |  ZN = 2                                   
  B1 = 6                                   |  VDD = 280586                             
  B2 = 2                                   |  VNW = 280586                             
  C = 4                                    |  VPW = 280584                             
  ZN = 3                                   |  VSS = 280584                             
  VDD = 275388                             |                                           
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi221_ |Instance: \i_chip_core.core7.b.illegal_gf1 
  A1 = 7                                   |  I = 4                                    
  A2 = 4                                   |  ZN = 2                                   
  B1 = 8                                   |  VDD = 280586                             
  B2 = 21                                  |  VNW = 280586                             
  C = 4                                    |  VPW = 280584                             
  ZN = 2                                   |  VSS = 280584                             
  VDD = 275388                             |                                           
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi221_ |Instance: \i_chip_core.core7.b.illegal_gf1 
  A1 = 30                                  |  I = 11                                   
  A2 = 6                                   |  ZN = 2                                   
  B1 = 6                                   |  VDD = 280586                             
  B2 = 5                                   |  VNW = 280586                             
  C = 5                                    |  VPW = 280584                             
  ZN = 3                                   |  VSS = 280584                             
  VDD = 275388                             |                                           
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi221_ |Instance: \i_chip_core.core7.b.illegal_gf1 
  A1 = 5                                   |  I = 9                                    
  A2 = 1014                                |  ZN = 4                                   
  B1 = 4                                   |  VDD = 280586                             
  B2 = 94                                  |  VNW = 280586                             
  C = 2                                    |  VPW = 280584                             
  ZN = 2                                   |  VSS = 280584                             
  VDD = 275388                             |                                           
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi221_ |Instance: \i_chip_core.core0.b.arb_data_ou 
  A1 = 4                                   |  A1 = 10                                  
  A2 = 5                                   |  A2 = 7                                   
  B1 = 6                                   |  ZN = 5                                   
  B2 = 2                                   |  VDD = 280586                             
  C = 1                                    |  VNW = 280586                             
  ZN = 2                                   |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:m |Instance: \i_chip_core.core0.b.arb_data_ou 
  I = 5                                    |  A1 = 3                                   
  Z = 291                                  |  A2 = 7                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core0.b.arb_data_ou 
  I = 113                                  |  A1 = 8                                   
  Z = 113                                  |  A2 = 10                                  
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core0.b.arb_data_ou 
  I = 44                                   |  A1 = 5                                   
  Z = 15                                   |  A2 = 10                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core0.b.arb_data_ou 
  I = 3                                    |  A1 = 4                                   
  Z = 41                                   |  A2 = 4                                   
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:m |Instance: \i_chip_core.core0.b.arb_data_ou 
  I = 4                                    |  A1 = 11                                  
  Z = 10                                   |  A2 = 4                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 8                                    |  A1 = 11                                  
  Z = 21                                   |  A2 = 11                                  
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 48                                   |  A1 = 9                                   
  Z = 48                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 7                                    |  A1 = 7                                   
  Z = 8                                    |  A2 = 8                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 79                                   |  A1 = 7                                   
  Z = 12                                   |  A2 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:m |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 112                                  |  A1 = 9                                   
  Z = 14                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:m |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 200                                  |  A1 = 4                                   
  Z = 16                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 9                                    |  A1 = 5                                   
  Z = 4                                    |  A2 = 7                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:m |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 113                                  |  A1 = 4                                   
  Z = 113                                  |  A2 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:m |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 9                                    |  A1 = 3                                   
  Z = 12                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:m |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 250                                  |  A1 = 5                                   
  Z = 1463                                 |  A2 = 2                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 1463                                 |  A1 = 7                                   
  Z = 1463                                 |  A2 = 5                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 393                                  |  A1 = 5                                   
  Z = 2                                    |  A2 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:m |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 95                                   |  A1 = 9                                   
  Z = 7                                    |  A2 = 4                                   
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:m |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 7                                    |  A1 = 11                                  
  Z = 8                                    |  A2 = 11                                  
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 392                                  |  A1 = 9                                   
  Z = 392                                  |  A2 = 9                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 16                                   |  A1 = 6                                   
  Z = 9                                    |  A2 = 6                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 24                                   |  A1 = 4                                   
  Z = 11                                   |  A2 = 7                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 44                                   |  A1 = 8                                   
  Z = 44                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:m |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 44                                   |  A1 = 11                                  
  Z = 44                                   |  A2 = 4                                   
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 250                                  |  A1 = 4                                   
  Z = 1463                                 |  A2 = 2                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 19                                   |  A1 = 5                                   
  Z = 17                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 5                                    |  A1 = 11                                  
  Z = 3                                    |  A2 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 7                                    |  A1 = 5                                   
  Z = 38                                   |  A2 = 2                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:m |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 291                                  |  A1 = 4                                   
  Z = 108                                  |  A2 = 7                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 19                                   |  A1 = 3                                   
  Z = 19                                   |  A2 = 2                                   
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 1463                                 |  A1 = 8                                   
  Z = 1463                                 |  A2 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:m |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 42                                   |  A1 = 5                                   
  Z = 123                                  |  A2 = 5                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:m |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 7                                    |  A1 = 9                                   
  Z = 8                                    |  A2 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 27                                   |  A1 = 5                                   
  Z = 187                                  |  A2 = 7                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:m |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 4                                    |  A1 = 7                                   
  Z = 9                                    |  A2 = 4                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 1014                                 |  A1 = 10                                  
  Z = 1014                                 |  A2 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:m |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 38                                   |  A1 = 6                                   
  Z = 19                                   |  A2 = 6                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:m |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 3                                    |  A1 = 4                                   
  Z = 33                                   |  A2 = 4                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 192                                  |  A1 = 9                                   
  Z = 192                                  |  A2 = 10                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 39                                   |  A1 = 4                                   
  Z = 5                                    |  A2 = 6                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 11                                   |  A1 = 5                                   
  Z = 7                                    |  A2 = 7                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 4                                    |  A1 = 5                                   
  Z = 1463                                 |  A2 = 7                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 39                                   |  A1 = 5                                   
  Z = 39                                   |  A2 = 6                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 1463                                 |  A1 = 5                                   
  Z = 1463                                 |  A2 = 2                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:m |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 3                                    |  A1 = 5                                   
  Z = 6                                    |  A2 = 4                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 19                                   |  A1 = 5                                   
  Z = 1463                                 |  A2 = 3                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 60                                   |  A1 = 5                                   
  Z = 10                                   |  A2 = 11                                  
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 699                                  |  A1 = 8                                   
  Z = 699                                  |  A2 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 10                                   |  A1 = 3                                   
  Z = 6                                    |  A2 = 3                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 1463                                 |  A1 = 6                                   
  Z = 1463                                 |  A2 = 7                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:m |Instance: \i_chip_core.core1.b.arb_data_ou 
  I = 18                                   |  A1 = 9                                   
  Z = 8                                    |  A2 = 6                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core1.b.arb_data_ou 
  I = 12                                   |  A1 = 6                                   
  Z = 20                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core1.b.arb_data_ou 
  I = 6                                    |  A1 = 8                                   
  Z = 116                                  |  A2 = 8                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core1.b.arb_data_ou 
  I = 32                                   |  A1 = 6                                   
  Z = 20                                   |  A2 = 9                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core1.b.arb_data_ou 
  I = 1014                                 |  A1 = 2                                   
  Z = 200                                  |  A2 = 6                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:m |Instance: \i_chip_core.core1.b.arb_data_ou 
  I = 28                                   |  A1 = 11                                  
  Z = 30                                   |  A2 = 6                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:m |Instance: \i_chip_core.core1.b.arb_data_ou 
  I = 71                                   |  A1 = 5                                   
  Z = 31                                   |  A2 = 5                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:m |Instance: \i_chip_core.core1.b.gen_square[ 
  I = 1463                                 |  A1 = 6                                   
  Z = 193                                  |  A2 = 9                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core1.b.gen_square[ 
  I = 654                                  |  A1 = 11                                  
  Z = 654                                  |  A2 = 6                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core1.b.gen_square[ 
  I = 1014                                 |  A1 = 5                                   
  Z = 3                                    |  A2 = 3                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core1.b.gen_square[ 
  I = 38                                   |  A1 = 5                                   
  Z = 97                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core1.b.gen_square[ 
  I = 48                                   |  A1 = 8                                   
  Z = 96                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core1.b.illegal_gf1 
  I = 1463                                 |  A1 = 9                                   
  Z = 1463                                 |  A2 = 7                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core1.b.illegal_gf1 
  I = 15                                   |  A1 = 5                                   
  Z = 15                                   |  A2 = 10                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core1.b.illegal_gf1 
  I = 25                                   |  A1 = 7                                   
  Z = 25                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core1.b.illegal_gf1 
  I = 1463                                 |  A1 = 4                                   
  Z = 1463                                 |  A2 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core1.b.illegal_gf1 
  I = 393                                  |  A1 = 3                                   
  Z = 10                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 7                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core1.b.illegal_gf1 
  I = 8                                    |  A1 = 3                                   
  Z = 44                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:m |Instance: \i_chip_core.core1.b.illegal_gf1 
  I = 218                                  |  A1 = 8                                   
  Z = 218                                  |  A2 = 8                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core1.b.illegal_gf1 
  I = 699                                  |  A1 = 11                                  
  Z = 699                                  |  A2 = 3                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core1.b.illegal_gf1 
  I = 4                                    |  A1 = 9                                   
  Z = 6                                    |  A2 = 11                                  
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core1.b.illegal_gf1 
  I = 48                                   |  A1 = 11                                  
  Z = 48                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core1.b.illegal_gf1 
  I = 19                                   |  A1 = 4                                   
  Z = 13                                   |  A2 = 5                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core2.b.arb_data_ou 
  I = 1                                    |  A1 = 7                                   
  Z = 192                                  |  A2 = 9                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core2.b.arb_data_ou 
  I = 16                                   |  A1 = 11                                  
  Z = 523                                  |  A2 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core2.b.arb_data_ou 
  I = 6                                    |  A1 = 4                                   
  Z = 123                                  |  A2 = 8                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core2.b.arb_data_ou 
  I = 1463                                 |  A1 = 6                                   
  Z = 1463                                 |  A2 = 2                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 19                                   |  A1 = 8                                   
  Z = 19                                   |  A2 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 19                                   |  A1 = 6                                   
  Z = 1014                                 |  A2 = 5                                   
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 699                                  |  A1 = 6                                   
  Z = 6                                    |  A2 = 8                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 63                                   |  A1 = 6                                   
  Z = 9                                    |  A2 = 4                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 2                                    |  A1 = 9                                   
  Z = 192                                  |  A2 = 3                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 148                                  |  A1 = 4                                   
  Z = 148                                  |  A2 = 4                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 8                                    |  A1 = 4                                   
  Z = 8                                    |  A2 = 8                                   
  VDD = 275388                             |  ZN = 8                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:m |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 8                                    |  A1 = 6                                   
  Z = 25                                   |  A2 = 5                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 9                                    |  A1 = 5                                   
  Z = 1463                                 |  A2 = 6                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 2                                    |  A1 = 2                                   
  Z = 3                                    |  A2 = 6                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:m |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 699                                  |  A1 = 8                                   
  Z = 699                                  |  A2 = 9                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 108                                  |  A1 = 3                                   
  Z = 4                                    |  A2 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 3                                    |  A1 = 10                                  
  Z = 8                                    |  A2 = 5                                   
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 192                                  |  A1 = 10                                  
  Z = 8                                    |  A2 = 11                                  
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 291                                  |  A1 = 6                                   
  Z = 5                                    |  A2 = 9                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 13                                   |  A1 = 4                                   
  Z = 31                                   |  A2 = 8                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 123                                  |  A1 = 10                                  
  Z = 123                                  |  A2 = 6                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 193                                  |  A1 = 11                                  
  Z = 193                                  |  A2 = 5                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 44                                   |  A1 = 8                                   
  Z = 44                                   |  A2 = 11                                  
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 4                                    |  A1 = 3                                   
  Z = 15                                   |  A2 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 90                                   |  A1 = 8                                   
  Z = 8                                    |  A2 = 11                                  
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:m |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 218                                  |  A1 = 3                                   
  Z = 218                                  |  A2 = 3                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 97                                   |  A1 = 3                                   
  Z = 17                                   |  A2 = 4                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 291                                  |  A1 = 4                                   
  Z = 16                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 10                                   |  A1 = 5                                   
  Z = 10                                   |  A2 = 7                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 1463                                 |  A1 = 7                                   
  Z = 1463                                 |  A2 = 4                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 1463                                 |  A1 = 5                                   
  Z = 16                                   |  A2 = 4                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 192                                  |  A1 = 6                                   
  Z = 192                                  |  A2 = 8                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 4                                    |  A1 = 4                                   
  Z = 9                                    |  A2 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:m |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 35                                   |  A1 = 4                                   
  Z = 4                                    |  A2 = 9                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 21                                   |  A1 = 9                                   
  Z = 1463                                 |  A2 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 654                                  |  A1 = 4                                   
  Z = 60                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 7                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 40                                   |  A1 = 3                                   
  Z = 40                                   |  A2 = 11                                  
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 654                                  |  A1 = 11                                  
  Z = 654                                  |  A2 = 6                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 3                                    |  A1 = 7                                   
  Z = 7                                    |  A2 = 10                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 113                                  |  A1 = 4                                   
  Z = 6                                    |  A2 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:m |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 123                                  |  A1 = 10                                  
  Z = 13                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 9                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 4                                    |  A1 = 11                                  
  Z = 12                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 11                                  
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 40                                   |  A1 = 10                                  
  Z = 392                                  |  A2 = 3                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 79                                   |  A1 = 7                                   
  Z = 10                                   |  A2 = 6                                   
  VDD = 275388                             |  ZN = 7                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 1463                                 |  A1 = 11                                  
  Z = 1463                                 |  A2 = 3                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 192                                  |  A1 = 5                                   
  Z = 11                                   |  A2 = 12                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 699                                  |  A1 = 3                                   
  Z = 699                                  |  A2 = 10                                  
  VDD = 275388                             |  ZN = 9                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core3.b.arb_data_ou 
  I = 113                                  |  A1 = 9                                   
  Z = 113                                  |  A2 = 5                                   
  VDD = 275388                             |  ZN = 7                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core3.b.arb_data_ou 
  I = 8                                    |  A1 = 10                                  
  Z = 20                                   |  A2 = 7                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core3.b.arb_data_ou 
  I = 10                                   |  A1 = 10                                  
  Z = 9                                    |  A2 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:m |Instance: \i_chip_core.core3.b.arb_data_ou 
  I = 61                                   |  A1 = 3                                   
  Z = 15                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core3.b.arb_data_ou 
  I = 116                                  |  A1 = 6                                   
  Z = 22                                   |  A2 = 4                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core3.b.arb_data_ou 
  I = 1014                                 |  A1 = 8                                   
  Z = 32                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core3.b.arb_data_ou 
  I = 10                                   |  A1 = 6                                   
  Z = 7                                    |  A2 = 9                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core3.b.arb_data_ou 
  I = 1463                                 |  A1 = 5                                   
  Z = 1463                                 |  A2 = 2                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core3.b.arb_data_ou 
  I = 24                                   |  A1 = 5                                   
  Z = 36                                   |  A2 = 2                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:f |Instance: \i_chip_core.core3.b.arb_data_ou 
  I = 1014                                 |  A1 = 11                                  
  Z = 1014                                 |  A2 = 9                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core3.b.gen_square[ 
  I = 27                                   |  A1 = 5                                   
  Z = 27                                   |  A2 = 10                                  
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:m |Instance: \i_chip_core.core3.b.gen_square[ 
  I = 393                                  |  A1 = 3                                   
  Z = 393                                  |  A2 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core3.b.gen_square[ 
  I = 523                                  |  A1 = 3                                   
  Z = 523                                  |  A2 = 4                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core3.b.gen_square[ 
  I = 25                                   |  A1 = 11                                  
  Z = 25                                   |  A2 = 11                                  
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core3.b.gen_square[ 
  I = 5                                    |  A1 = 10                                  
  Z = 45                                   |  A2 = 6                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core3.b.gen_square[ 
  I = 5                                    |  A1 = 3                                   
  Z = 3                                    |  A2 = 11                                  
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core3.b.gen_square[ 
  I = 2                                    |  A1 = 6                                   
  Z = 243                                  |  A2 = 3                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core3.b.gen_square[ 
  I = 11                                   |  A1 = 7                                   
  Z = 9                                    |  A2 = 3                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:m |Instance: \i_chip_core.core3.b.gen_square[ 
  I = 2                                    |  A1 = 6                                   
  Z = 12                                   |  A2 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core3.b.gen_square[ 
  I = 192                                  |  A1 = 6                                   
  Z = 192                                  |  A2 = 11                                  
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:m |Instance: \i_chip_core.core3.b.gen_square[ 
  I = 3                                    |  A1 = 4                                   
  Z = 8                                    |  A2 = 2                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core3.b.gen_square[ 
  I = 3                                    |  A1 = 9                                   
  Z = 9                                    |  A2 = 5                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 9                                    |  A1 = 6                                   
  Z = 10                                   |  A2 = 2                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 10                                   |  A1 = 9                                   
  Z = 9                                    |  A2 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 8                                    |  A1 = 10                                  
  Z = 10                                   |  A2 = 4                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 4                                    |  A1 = 5                                   
  Z = 38                                   |  A2 = 6                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:m |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 4                                    |  A1 = 8                                   
  Z = 187                                  |  A2 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 30                                   |  A1 = 7                                   
  Z = 30                                   |  A2 = 9                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:m |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 117                                  |  A1 = 6                                   
  Z = 117                                  |  A2 = 5                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 123                                  |  A1 = 5                                   
  Z = 10                                   |  A2 = 6                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 3                                    |  A1 = 6                                   
  Z = 30                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 1014                                 |  A1 = 4                                   
  Z = 16                                   |  A2 = 5                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 7                                    |  A1 = 3                                   
  Z = 654                                  |  A2 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 30                                   |  A1 = 11                                  
  Z = 30                                   |  A2 = 11                                  
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:i |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 17                                   |  A1 = 6                                   
  Z = 6                                    |  A2 = 9                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:w |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 2                                    |  A1 = 4                                   
  Z = 193                                  |  A2 = 3                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:m |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 192                                  |  A1 = 3                                   
  Z = 4                                    |  A2 = 3                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:m |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 3                                    |  A1 = 5                                   
  Z = 5                                    |  A2 = 2                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_2:m |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 3                                    |  A1 = 6                                   
  Z = 6                                    |  A2 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 291                                  |  A1 = 2                                   
  Z = 8                                    |  A2 = 4                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 39                                   |  A1 = 8                                   
  Z = 19                                   |  A2 = 4                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 40                                   |  A1 = 4                                   
  Z = 40                                   |  A2 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 200                                  |  A1 = 3                                   
  Z = 15                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 43                                   |  A1 = 11                                  
  Z = 291                                  |  A2 = 3                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 10                                   |  A1 = 3                                   
  Z = 10                                   |  A2 = 6                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 5                                    |  A1 = 4                                   
  Z = 39                                   |  A2 = 4                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 19                                   |  A1 = 11                                  
  Z = 19                                   |  A2 = 5                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 1463                                 |  A1 = 8                                   
  Z = 1463                                 |  A2 = 3                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 9                                    |  A1 = 11                                  
  Z = 113                                  |  A2 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:i |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 392                                  |  A1 = 9                                   
  Z = 392                                  |  A2 = 7                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:i |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 699                                  |  A1 = 3                                   
  Z = 15                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 4                                    |  A1 = 3                                   
  Z = 17                                   |  A2 = 2                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 122                                  |  A1 = 11                                  
  Z = 122                                  |  A2 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 523                                  |  A1 = 11                                  
  Z = 97                                   |  A2 = 11                                  
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 200                                  |  A1 = 4                                   
  Z = 35                                   |  A2 = 4                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 29                                   |  A1 = 9                                   
  Z = 13                                   |  A2 = 11                                  
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 699                                  |  A1 = 7                                   
  Z = 699                                  |  A2 = 4                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 250                                  |  A1 = 8                                   
  Z = 38                                   |  A2 = 9                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 7                                    |  A1 = 5                                   
  Z = 699                                  |  A2 = 4                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 10                                   |  A1 = 11                                  
  Z = 218                                  |  A2 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 38                                   |  A1 = 6                                   
  Z = 36                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 1463                                 |  A1 = 6                                   
  Z = 1463                                 |  A2 = 4                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 12                                   |  A1 = 9                                   
  Z = 4                                    |  A2 = 11                                  
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 523                                  |  A1 = 5                                   
  Z = 523                                  |  A2 = 4                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 192                                  |  A1 = 3                                   
  Z = 28                                   |  A2 = 2                                   
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 523                                  |  A1 = 5                                   
  Z = 2                                    |  A2 = 4                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 148                                  |  A1 = 11                                  
  Z = 16                                   |  A2 = 6                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 1014                                 |  A1 = 7                                   
  Z = 1014                                 |  A2 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 523                                  |  A1 = 7                                   
  Z = 523                                  |  A2 = 5                                   
  VDD = 275388                             |  ZN = 8                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 393                                  |  A1 = 7                                   
  Z = 250                                  |  A2 = 3                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 1463                                 |  A1 = 4                                   
  Z = 3                                    |  A2 = 5                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 96                                   |  A1 = 11                                  
  Z = 36                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:i |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 79                                   |  A1 = 7                                   
  Z = 3                                    |  A2 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 12                                   |  A1 = 4                                   
  Z = 5                                    |  A2 = 4                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 4                                    |  A1 = 6                                   
  Z = 2                                    |  A2 = 3                                   
  VDD = 275388                             |  ZN = 8                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 3                                    |  A1 = 4                                   
  Z = 3                                    |  A2 = 3                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 30                                   |  A1 = 6                                   
  Z = 55                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 7                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 13                                   |  A1 = 2                                   
  Z = 654                                  |  A2 = 2                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 6                                    |  A1 = 5                                   
  Z = 7                                    |  A2 = 6                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 3                                    |  A1 = 5                                   
  Z = 16                                   |  A2 = 9                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 4                                    |  A1 = 7                                   
  Z = 12                                   |  A2 = 8                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 1463                                 |  A1 = 5                                   
  Z = 40                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 7                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 38                                   |  A1 = 4                                   
  Z = 24                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 143                                  |  A1 = 5                                   
  Z = 40                                   |  A2 = 5                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 22                                   |  A1 = 6                                   
  Z = 523                                  |  A2 = 7                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 11                                   |  A1 = 5                                   
  Z = 60                                   |  A2 = 10                                  
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 1463                                 |  A1 = 6                                   
  Z = 4                                    |  A2 = 11                                  
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 172                                  |  A1 = 3                                   
  Z = 7                                    |  A2 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 13                                   |  A1 = 5                                   
  Z = 5                                    |  A2 = 8                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 113                                  |  A1 = 9                                   
  Z = 75                                   |  A2 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 392                                  |  A1 = 3                                   
  Z = 7                                    |  A2 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 8                                    |  A1 = 6                                   
  Z = 250                                  |  A2 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 654                                  |  A1 = 2                                   
  Z = 654                                  |  A2 = 2                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 61                                   |  A1 = 7                                   
  Z = 111                                  |  A2 = 10                                  
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 4                                    |  A1 = 4                                   
  Z = 3                                    |  A2 = 11                                  
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 699                                  |  A1 = 7                                   
  Z = 60                                   |  A2 = 7                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 393                                  |  A1 = 11                                  
  Z = 250                                  |  A2 = 5                                   
  VDD = 275388                             |  ZN = 7                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 44                                   |  A1 = 4                                   
  Z = 44                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 3                                    |  A1 = 7                                   
  Z = 113                                  |  A2 = 7                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 113                                  |  A1 = 11                                  
  Z = 7                                    |  A2 = 11                                  
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 3                                    |  A1 = 7                                   
  Z = 87                                   |  A2 = 9                                   
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 61                                   |  A1 = 11                                  
  Z = 1014                                 |  A2 = 5                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 61                                   |  A1 = 7                                   
  Z = 41                                   |  A2 = 2                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 291                                  |  A1 = 4                                   
  Z = 200                                  |  A2 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 1014                                 |  A1 = 6                                   
  Z = 3                                    |  A2 = 5                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 42                                   |  A1 = 3                                   
  Z = 393                                  |  A2 = 4                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 18                                   |  A1 = 5                                   
  Z = 60                                   |  A2 = 5                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 12                                   |  A1 = 4                                   
  Z = 38                                   |  A2 = 4                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 523                                  |  A1 = 7                                   
  Z = 4                                    |  A2 = 5                                   
  VDD = 275388                             |  ZN = 7                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 1463                                 |  A1 = 8                                   
  Z = 1463                                 |  A2 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 3                                    |  A1 = 9                                   
  Z = 250                                  |  A2 = 11                                  
  VDD = 275388                             |  ZN = 9                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:i |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 44                                   |  A1 = 3                                   
  Z = 1014                                 |  A2 = 3                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 1014                                 |  A1 = 11                                  
  Z = 1014                                 |  A2 = 2                                   
  VDD = 275388                             |  ZN = 7                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 12                                   |  A1 = 9                                   
  Z = 12                                   |  A2 = 6                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 39                                   |  A1 = 5                                   
  Z = 17                                   |  A2 = 6                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 1014                                 |  A1 = 10                                  
  Z = 13                                   |  A2 = 10                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 16                                   |  A1 = 9                                   
  Z = 15                                   |  A2 = 4                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 7                                    |  A1 = 8                                   
  Z = 7                                    |  A2 = 11                                  
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 193                                  |  A1 = 7                                   
  Z = 14                                   |  A2 = 5                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 8                                    |  A1 = 3                                   
  Z = 13                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 4                                    |  A1 = 4                                   
  Z = 67                                   |  A2 = 2                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 96                                   |  A1 = 11                                  
  Z = 291                                  |  A2 = 2                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 1463                                 |  A1 = 9                                   
  Z = 393                                  |  A2 = 5                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 1463                                 |  A1 = 7                                   
  Z = 1463                                 |  A2 = 3                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 392                                  |  A1 = 3                                   
  Z = 113                                  |  A2 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:i |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 523                                  |  A1 = 4                                   
  Z = 523                                  |  A2 = 7                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:i |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 3                                    |  A1 = 5                                   
  Z = 4                                    |  A2 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 523                                  |  A1 = 6                                   
  Z = 8                                    |  A2 = 6                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 20                                   |  A1 = 5                                   
  Z = 10                                   |  A2 = 2                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 95                                   |  A1 = 8                                   
  Z = 22                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 8                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 14                                   |  A1 = 8                                   
  Z = 79                                   |  A2 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:i |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 17                                   |  A1 = 3                                   
  Z = 3                                    |  A2 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 1463                                 |  A1 = 5                                   
  Z = 1463                                 |  A2 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 7                                    |  A1 = 11                                  
  Z = 11                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 19                                   |  A1 = 7                                   
  Z = 1463                                 |  A2 = 11                                  
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 15                                   |  A1 = 11                                  
  Z = 8                                    |  A2 = 4                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 16                                   |  A1 = 3                                   
  Z = 60                                   |  A2 = 5                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 7                                    |  A1 = 5                                   
  Z = 7                                    |  A2 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 32                                   |  A1 = 5                                   
  Z = 14                                   |  A2 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 32                                   |  A1 = 4                                   
  Z = 32                                   |  A2 = 6                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 113                                  |  A1 = 7                                   
  Z = 113                                  |  A2 = 6                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 654                                  |  A1 = 11                                  
  Z = 71                                   |  A2 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 117                                  |  A1 = 2                                   
  Z = 8                                    |  A2 = 6                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 9                                    |  A1 = 5                                   
  Z = 37                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 1463                                 |  A1 = 3                                   
  Z = 1463                                 |  A2 = 3                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 1463                                 |  A1 = 7                                   
  Z = 1463                                 |  A2 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core5.b.arb_data_ou 
  I = 9                                    |  A1 = 10                                  
  Z = 117                                  |  A2 = 11                                  
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core5.b.gen_square[ 
  I = 193                                  |  A1 = 6                                   
  Z = 4                                    |  A2 = 7                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core5.b.gen_square[ 
  I = 40                                   |  A1 = 5                                   
  Z = 40                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core5.b.gen_square[ 
  I = 699                                  |  A1 = 6                                   
  Z = 20                                   |  A2 = 10                                  
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core5.b.gen_square[ 
  I = 18                                   |  A1 = 3                                   
  Z = 23                                   |  A2 = 5                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core5.b.gen_square[ 
  I = 10                                   |  A1 = 4                                   
  Z = 10                                   |  A2 = 5                                   
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core5.b.gen_square[ 
  I = 1014                                 |  A1 = 5                                   
  Z = 291                                  |  A2 = 11                                  
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core5.b.gen_square[ 
  I = 39                                   |  A1 = 10                                  
  Z = 11                                   |  A2 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core5.b.gen_square[ 
  I = 3                                    |  A1 = 11                                  
  Z = 8                                    |  A2 = 4                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 38                                   |  A1 = 5                                   
  Z = 26                                   |  A2 = 5                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 9                                    |  A1 = 6                                   
  Z = 8                                    |  A2 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 3                                    |  A1 = 3                                   
  Z = 8                                    |  A2 = 5                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 1463                                 |  A1 = 4                                   
  Z = 100                                  |  A2 = 5                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 164                                  |  A1 = 11                                  
  Z = 14                                   |  A2 = 5                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 1463                                 |  A1 = 11                                  
  Z = 1463                                 |  A2 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 111                                  |  A1 = 6                                   
  Z = 90                                   |  A2 = 7                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 55                                   |  A1 = 5                                   
  Z = 55                                   |  A2 = 4                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 20                                   |  A1 = 5                                   
  Z = 654                                  |  A2 = 5                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 9                                    |  A1 = 11                                  
  Z = 41                                   |  A2 = 11                                  
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:i |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 91                                   |  A1 = 5                                   
  Z = 91                                   |  A2 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 39                                   |  A1 = 5                                   
  Z = 39                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 1014                                 |  A1 = 5                                   
  Z = 1014                                 |  A2 = 7                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 2                                    |  A1 = 5                                   
  Z = 699                                  |  A2 = 4                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 4                                    |  A1 = 9                                   
  Z = 4                                    |  A2 = 11                                  
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 1463                                 |  A1 = 6                                   
  Z = 91                                   |  A2 = 7                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 9                                    |  A1 = 11                                  
  Z = 8                                    |  A2 = 7                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 3                                    |  A1 = 7                                   
  Z = 10                                   |  A2 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 1014                                 |  A1 = 4                                   
  Z = 55                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 4                                    |  A1 = 4                                   
  Z = 654                                  |  A2 = 7                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 9                                    |  A1 = 10                                  
  Z = 164                                  |  A2 = 7                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 1463                                 |  A1 = 3                                   
  Z = 1463                                 |  A2 = 5                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 42                                   |  A1 = 5                                   
  Z = 11                                   |  A2 = 4                                   
  VDD = 275388                             |  ZN = 7                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 20                                   |  A1 = 4                                   
  Z = 32                                   |  A2 = 11                                  
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 3                                    |  A1 = 11                                  
  Z = 60                                   |  A2 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 1463                                 |  A1 = 8                                   
  Z = 250                                  |  A2 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core6.b.arb_data_ou 
  I = 60                                   |  A1 = 7                                   
  Z = 1014                                 |  A2 = 3                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core6.b.arb_data_ou 
  I = 8                                    |  A1 = 9                                   
  Z = 654                                  |  A2 = 3                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core6.b.arb_data_ou 
  I = 9                                    |  A1 = 11                                  
  Z = 15                                   |  A2 = 2                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:i |Instance: \i_chip_core.core6.b.arb_data_ou 
  I = 42                                   |  A1 = 11                                  
  Z = 42                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core6.b.arb_data_ou 
  I = 9                                    |  A1 = 11                                  
  Z = 6                                    |  A2 = 4                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core6.b.arb_data_ou 
  I = 6                                    |  A1 = 8                                   
  Z = 10                                   |  A2 = 4                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core6.b.arb_data_ou 
  I = 4                                    |  A1 = 4                                   
  Z = 3                                    |  A2 = 11                                  
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core6.b.arb_data_ou 
  I = 3                                    |  A1 = 7                                   
  Z = 16                                   |  A2 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core6.b.arb_data_ou 
  I = 5                                    |  A1 = 9                                   
  Z = 3                                    |  A2 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core6.b.arb_data_ou 
  I = 5                                    |  A1 = 4                                   
  Z = 11                                   |  A2 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core6.b.arb_data_ou 
  I = 10                                   |  A1 = 5                                   
  Z = 4                                    |  A2 = 9                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core6.b.arb_data_ou 
  I = 4                                    |  A1 = 11                                  
  Z = 4                                    |  A2 = 2                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:m |Instance: \i_chip_core.core6.b.arb_data_ou 
  I = 7                                    |  A1 = 5                                   
  Z = 5                                    |  A2 = 8                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core6.b.arb_data_ou 
  I = 3                                    |  A1 = 8                                   
  Z = 4                                    |  A2 = 9                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_4:w |Instance: \i_chip_core.core6.b.arb_data_ou 
  I = 3                                    |  A1 = 9                                   
  Z = 5                                    |  A2 = 5                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__and4_1: |Instance: \i_chip_core.core6.b.arb_data_ou 
  A1 = 14                                  |  A1 = 8                                   
  A2 = 193                                 |  A2 = 6                                   
  A3 = 91                                  |  ZN = 5                                   
  A4 = 1                                   |  VDD = 280586                             
  Z = 91                                   |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__and4_1: |Instance: \i_chip_core.core6.b.arb_data_ou 
  A1 = 654                                 |  A1 = 6                                   
  A2 = 31                                  |  A2 = 2                                   
  A3 = 8                                   |  ZN = 2                                   
  A4 = 4                                   |  VDD = 280586                             
  Z = 31                                   |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__and4_1: |Instance: \i_chip_core.core6.b.arb_data_ou 
  A1 = 142                                 |  A1 = 5                                   
  A2 = 50                                  |  A2 = 11                                  
  A3 = 26                                  |  ZN = 3                                   
  A4 = 17                                  |  VDD = 280586                             
  Z = 50                                   |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi222_ |Instance: \i_chip_core.core6.b.arb_data_ou 
  A1 = 30                                  |  A1 = 8                                   
  A2 = 7                                   |  A2 = 4                                   
  B1 = 6                                   |  ZN = 4                                   
  B2 = 5                                   |  VDD = 280586                             
  C1 = 30                                  |  VNW = 280586                             
  C2 = 2                                   |  VPW = 280584                             
  ZN = 2                                   |  VSS = 280584                             
  VDD = 275388                             |                                           
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi222_ |Instance: \i_chip_core.core6.b.arb_data_ou 
  A1 = 30                                  |  A1 = 3                                   
  A2 = 6                                   |  A2 = 9                                   
  B1 = 6                                   |  ZN = 3                                   
  B2 = 5                                   |  VDD = 280586                             
  C1 = 30                                  |  VNW = 280586                             
  C2 = 3                                   |  VPW = 280584                             
  ZN = 4                                   |  VSS = 280584                             
  VDD = 275388                             |                                           
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi222_ |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 393                                 |  A1 = 8                                   
  A2 = 4                                   |  A2 = 7                                   
  B1 = 6                                   |  ZN = 2                                   
  B2 = 9                                   |  VDD = 280586                             
  C1 = 9                                   |  VNW = 280586                             
  C2 = 4                                   |  VPW = 280584                             
  ZN = 3                                   |  VSS = 280584                             
  VDD = 275388                             |                                           
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi222_ |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 68                                  |  A1 = 5                                   
  A2 = 3                                   |  A2 = 5                                   
  B1 = 4                                   |  ZN = 2                                   
  B2 = 5                                   |  VDD = 280586                             
  C1 = 5                                   |  VNW = 280586                             
  C2 = 68                                  |  VPW = 280584                             
  ZN = 3                                   |  VSS = 280584                             
  VDD = 275388                             |                                           
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi222_ |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 291                                 |  A1 = 9                                   
  A2 = 291                                 |  A2 = 4                                   
  B1 = 5                                   |  ZN = 5                                   
  B2 = 6                                   |  VDD = 280586                             
  C1 = 3                                   |  VNW = 280586                             
  C2 = 291                                 |  VPW = 280584                             
  ZN = 291                                 |  VSS = 280584                             
  VDD = 275388                             |                                           
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi222_ |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 291                                 |  A1 = 2                                   
  A2 = 60                                  |  A2 = 2                                   
  B1 = 15                                  |  ZN = 6                                   
  B2 = 6                                   |  VDD = 280586                             
  C1 = 3                                   |  VNW = 280586                             
  C2 = 3                                   |  VPW = 280584                             
  ZN = 3                                   |  VSS = 280584                             
  VDD = 275388                             |                                           
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi222_ |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 68                                  |  A1 = 11                                  
  A2 = 12                                  |  A2 = 7                                   
  B1 = 5                                   |  ZN = 2                                   
  B2 = 5                                   |  VDD = 280586                             
  C1 = 5                                   |  VNW = 280586                             
  C2 = 68                                  |  VPW = 280584                             
  ZN = 5                                   |  VSS = 280584                             
  VDD = 275388                             |                                           
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi211_ |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 58                                  |  A1 = 5                                   
  A2 = 9                                   |  A2 = 4                                   
  B = 108                                  |  ZN = 2                                   
  C = 10                                   |  VDD = 280586                             
  ZN = 108                                 |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi211_ |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 40                                  |  A1 = 7                                   
  A2 = 40                                  |  A2 = 6                                   
  B = 4                                    |  ZN = 7                                   
  C = 13                                   |  VDD = 280586                             
  ZN = 40                                  |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi211_ |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 1014                                |  A1 = 9                                   
  A2 = 13                                  |  A2 = 6                                   
  B = 1014                                 |  ZN = 2                                   
  C = 1014                                 |  VDD = 280586                             
  ZN = 94                                  |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi211_ |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 9                                   |  A1 = 3                                   
  A2 = 699                                 |  A2 = 5                                   
  B = 9                                    |  ZN = 4                                   
  C = 699                                  |  VDD = 280586                             
  ZN = 4                                   |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi211_ |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 143                                 |  A1 = 5                                   
  A2 = 143                                 |  A2 = 6                                   
  B = 143                                  |  ZN = 6                                   
  C = 143                                  |  VDD = 280586                             
  ZN = 143                                 |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi211_ |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 13                                  |  A1 = 11                                  
  A2 = 12                                  |  A2 = 11                                  
  B = 123                                  |  ZN = 3                                   
  C = 22                                   |  VDD = 280586                             
  ZN = 4                                   |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi211_ |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 17                                  |  A1 = 11                                  
  A2 = 18                                  |  A2 = 5                                   
  B = 13                                   |  ZN = 5                                   
  C = 123                                  |  VDD = 280586                             
  ZN = 17                                  |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi211_ |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 12                                  |  A1 = 7                                   
  A2 = 20                                  |  A2 = 2                                   
  B = 20                                   |  ZN = 6                                   
  C = 8                                    |  VDD = 280586                             
  ZN = 20                                  |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi211_ |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 25                                  |  A1 = 5                                   
  A2 = 25                                  |  A2 = 9                                   
  B = 18                                   |  ZN = 4                                   
  C = 16                                   |  VDD = 280586                             
  ZN = 25                                  |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi211_ |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 95                                  |  A1 = 7                                   
  A2 = 70                                  |  A2 = 4                                   
  B = 70                                   |  ZN = 3                                   
  C = 70                                   |  VDD = 280586                             
  ZN = 70                                  |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi211_ |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 393                                 |  A1 = 8                                   
  A2 = 393                                 |  A2 = 6                                   
  B = 1463                                 |  ZN = 10                                  
  C = 1463                                 |  VDD = 280586                             
  ZN = 393                                 |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi211_ |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 187                                 |  A1 = 7                                   
  A2 = 51                                  |  A2 = 2                                   
  B = 38                                   |  ZN = 5                                   
  C = 5                                    |  VDD = 280586                             
  ZN = 5                                   |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi211_ |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 12                                  |  A1 = 5                                   
  A2 = 11                                  |  A2 = 4                                   
  B = 1463                                 |  ZN = 3                                   
  C = 1463                                 |  VDD = 280586                             
  ZN = 11                                  |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi211_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 523                                 |  A1 = 4                                   
  A2 = 523                                 |  A2 = 6                                   
  B = 523                                  |  ZN = 5                                   
  C = 523                                  |  VDD = 280586                             
  ZN = 523                                 |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi211_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 5                                   |  A1 = 4                                   
  A2 = 7                                   |  A2 = 6                                   
  B = 3                                    |  ZN = 2                                   
  C = 2                                    |  VDD = 280586                             
  ZN = 2                                   |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor4_1: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 1014                                |  A1 = 4                                   
  A2 = 1014                                |  A2 = 11                                  
  A3 = 9                                   |  ZN = 2                                   
  A4 = 4                                   |  VDD = 280586                             
  ZN = 4                                   |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor4_1: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 16                                  |  A1 = 5                                   
  A2 = 25                                  |  A2 = 6                                   
  A3 = 25                                  |  ZN = 5                                   
  A4 = 25                                  |  VDD = 280586                             
  ZN = 25                                  |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor4_1: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 117                                 |  A1 = 6                                   
  A2 = 117                                 |  A2 = 3                                   
  A3 = 117                                 |  ZN = 2                                   
  A4 = 4                                   |  VDD = 280586                             
  ZN = 4                                   |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor4_1: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 10                                  |  A1 = 4                                   
  A2 = 6                                   |  A2 = 3                                   
  A3 = 30                                  |  ZN = 3                                   
  A4 = 30                                  |  VDD = 280586                             
  ZN = 30                                  |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor4_1: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 20                                  |  A1 = 11                                  
  A2 = 523                                 |  A2 = 11                                  
  A3 = 15                                  |  ZN = 3                                   
  A4 = 15                                  |  VDD = 280586                             
  ZN = 15                                  |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor4_1: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 122                                 |  A1 = 2                                   
  A2 = 122                                 |  A2 = 2                                   
  A3 = 122                                 |  ZN = 2                                   
  A4 = 10                                  |  VDD = 280586                             
  ZN = 122                                 |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor4_1: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 36                                  |  A1 = 7                                   
  A2 = 36                                  |  A2 = 3                                   
  A3 = 36                                  |  ZN = 2                                   
  A4 = 36                                  |  VDD = 280586                             
  ZN = 36                                  |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor4_1: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 699                                 |  A1 = 9                                   
  A2 = 699                                 |  A2 = 4                                   
  A3 = 699                                 |  ZN = 4                                   
  A4 = 699                                 |  VDD = 280586                             
  ZN = 699                                 |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor4_1: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 96                                  |  A1 = 4                                   
  A2 = 291                                 |  A2 = 3                                   
  A3 = 291                                 |  ZN = 5                                   
  A4 = 291                                 |  VDD = 280586                             
  ZN = 3                                   |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor4_1: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 112                                 |  A1 = 9                                   
  A2 = 10                                  |  A2 = 3                                   
  A3 = 8                                   |  ZN = 5                                   
  A4 = 3                                   |  VDD = 280586                             
  ZN = 10                                  |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor4_1: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 14                                  |  A1 = 4                                   
  A2 = 15                                  |  A2 = 3                                   
  A3 = 18                                  |  ZN = 5                                   
  A4 = 26                                  |  VDD = 280586                             
  ZN = 15                                  |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor4_1: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 15                                  |  A1 = 4                                   
  A2 = 32                                  |  A2 = 4                                   
  A3 = 32                                  |  ZN = 3                                   
  A4 = 32                                  |  VDD = 280586                             
  ZN = 32                                  |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor4_1: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 13                                  |  A1 = 8                                   
  A2 = 13                                  |  A2 = 4                                   
  A3 = 7                                   |  ZN = 4                                   
  A4 = 15                                  |  VDD = 280586                             
  ZN = 2                                   |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor4_1: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 9                                   |  A1 = 10                                  
  A2 = 15                                  |  A2 = 4                                   
  A3 = 10                                  |  ZN = 3                                   
  A4 = 6                                   |  VDD = 280586                             
  ZN = 6                                   |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor4_1: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 5                                   |  A1 = 9                                   
  A2 = 5                                   |  A2 = 5                                   
  A3 = 5                                   |  ZN = 4                                   
  A4 = 4                                   |  VDD = 280586                             
  ZN = 2                                   |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor4_1: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 3                                   |  A1 = 3                                   
  A2 = 10                                  |  A2 = 3                                   
  A3 = 3                                   |  ZN = 3                                   
  A4 = 3                                   |  VDD = 280586                             
  ZN = 2                                   |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_2: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 12                                  |  A1 = 6                                   
  A2 = 71                                  |  A2 = 5                                   
  A3 = 8                                   |  ZN = 5                                   
  ZN = 71                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_2: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 1463                                |  A1 = 6                                   
  A2 = 91                                  |  A2 = 6                                   
  A3 = 91                                  |  ZN = 5                                   
  ZN = 91                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_2: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 1463                                |  A1 = 8                                   
  A2 = 1463                                |  A2 = 3                                   
  A3 = 1463                                |  ZN = 3                                   
  ZN = 1463                                |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor3_2: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 96                                  |  A1 = 5                                   
  A2 = 4                                   |  A2 = 4                                   
  A3 = 2                                   |  ZN = 3                                   
  ZN = 6                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_2: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 1463                                |  A1 = 5                                   
  A2 = 1463                                |  A2 = 6                                   
  ZN = 1463                                |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_2: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 95                                  |  A1 = 7                                   
  A2 = 12                                  |  A2 = 11                                  
  ZN = 51                                  |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_2: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 6                                   |  A1 = 5                                   
  A2 = 8                                   |  A2 = 3                                   
  ZN = 6                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_2: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 193                                 |  A1 = 5                                   
  A2 = 116                                 |  A2 = 4                                   
  ZN = 1463                                |  ZN = 6                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_2: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 41                                  |  A1 = 5                                   
  A2 = 17                                  |  A2 = 3                                   
  ZN = 17                                  |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_2: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 1463                                |  A1 = 8                                   
  A2 = 1463                                |  A2 = 11                                  
  ZN = 1463                                |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_2: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 192                                 |  A1 = 6                                   
  A2 = 3                                   |  A2 = 4                                   
  ZN = 31                                  |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_2: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 699                                 |  A1 = 4                                   
  A2 = 699                                 |  A2 = 4                                   
  ZN = 699                                 |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_2: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 9                                   |  A1 = 3                                   
  A2 = 11                                  |  A2 = 3                                   
  ZN = 291                                 |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_2: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 91                                  |  A1 = 5                                   
  A2 = 25                                  |  A2 = 3                                   
  ZN = 6                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_2: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 192                                 |  A1 = 9                                   
  A2 = 14                                  |  A2 = 3                                   
  ZN = 14                                  |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_2: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 112                                 |  A1 = 4                                   
  A2 = 112                                 |  A2 = 3                                   
  ZN = 112                                 |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_2: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 243                                 |  A1 = 5                                   
  A2 = 12                                  |  A2 = 2                                   
  ZN = 243                                 |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_2: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 36                                  |  A1 = 7                                   
  A2 = 14                                  |  A2 = 5                                   
  ZN = 4                                   |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 31                                   |  A1 = 3                                   
  Z = 31                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 8                                    |  A1 = 7                                   
  Z = 654                                  |  A2 = 2                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:m |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 1463                                 |  A1 = 4                                   
  Z = 1463                                 |  A2 = 11                                  
  VDD = 275388                             |  ZN = 7                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 11                                   |  A1 = 3                                   
  Z = 11                                   |  A2 = 5                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core7.b.arb_data_ou 
  I = 47                                   |  A1 = 4                                   
  Z = 44                                   |  A2 = 2                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:m |Instance: \i_chip_core.core7.b.arb_data_ou 
  I = 2                                    |  A1 = 11                                  
  Z = 36                                   |  A2 = 4                                   
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core7.b.arb_data_ou 
  I = 13                                   |  A1 = 3                                   
  Z = 41                                   |  A2 = 5                                   
  VDD = 275388                             |  ZN = 9                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core7.b.arb_data_ou 
  I = 187                                  |  A1 = 5                                   
  Z = 187                                  |  A2 = 7                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core7.b.arb_data_ou 
  I = 44                                   |  A1 = 11                                  
  Z = 28                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:m |Instance: \i_chip_core.core7.b.arb_data_ou 
  I = 1463                                 |  A1 = 9                                   
  Z = 1463                                 |  A2 = 3                                   
  VDD = 275388                             |  ZN = 7                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core7.b.gen_square[ 
  I = 11                                   |  A1 = 2                                   
  Z = 54                                   |  A2 = 4                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core7.b.gen_square[ 
  I = 654                                  |  A1 = 11                                  
  Z = 5                                    |  A2 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core7.b.gen_square[ 
  I = 117                                  |  A1 = 4                                   
  Z = 117                                  |  A2 = 10                                  
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core7.b.gen_square[ 
  I = 7                                    |  A1 = 5                                   
  Z = 7                                    |  A2 = 9                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core7.b.gen_square[ 
  I = 187                                  |  A1 = 6                                   
  Z = 14                                   |  A2 = 9                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core7.b.gen_square[ 
  I = 30                                   |  A1 = 11                                  
  Z = 30                                   |  A2 = 4                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core7.b.gen_square[ 
  I = 90                                   |  A1 = 5                                   
  Z = 90                                   |  A2 = 9                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core7.b.gen_square[ 
  I = 38                                   |  A1 = 8                                   
  Z = 38                                   |  A2 = 4                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:m |Instance: \i_chip_core.core7.b.gen_square[ 
  I = 148                                  |  A1 = 7                                   
  Z = 148                                  |  A2 = 7                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core7.b.gen_square[ 
  I = 41                                   |  A1 = 4                                   
  Z = 21                                   |  A2 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core7.b.gen_square[ 
  I = 12                                   |  A1 = 5                                   
  Z = 4                                    |  A2 = 9                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core7.b.gen_square[ 
  I = 19                                   |  A1 = 2                                   
  Z = 1014                                 |  A2 = 3                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core7.b.gen_square[ 
  I = 1014                                 |  A1 = 5                                   
  Z = 1014                                 |  A2 = 4                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core7.b.gen_square[ 
  I = 48                                   |  A1 = 7                                   
  Z = 15                                   |  A2 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core7.b.gen_square[ 
  I = 51                                   |  A1 = 7                                   
  Z = 95                                   |  A2 = 4                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core7.b.gen_square[ 
  I = 5                                    |  A1 = 10                                  
  Z = 61                                   |  A2 = 4                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:m |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 55                                   |  A1 = 7                                   
  Z = 1014                                 |  A2 = 3                                   
  VDD = 275388                             |  ZN = 8                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 3                                    |  A1 = 11                                  
  Z = 1014                                 |  A2 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 10                                   |  A1 = 3                                   
  Z = 122                                  |  A2 = 6                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 1463                                 |  A1 = 4                                   
  Z = 148                                  |  A2 = 7                                   
  VDD = 275388                             |  ZN = 7                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 35                                   |  A1 = 2                                   
  Z = 19                                   |  A2 = 2                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:m |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 1463                                 |  A1 = 11                                  
  Z = 4                                    |  A2 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 192                                  |  A1 = 6                                   
  Z = 61                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 148                                  |  A1 = 6                                   
  Z = 148                                  |  A2 = 5                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 21                                   |  A1 = 11                                  
  Z = 21                                   |  A2 = 6                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 5                                    |  A1 = 4                                   
  Z = 18                                   |  A2 = 6                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:m |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 1463                                 |  A1 = 8                                   
  Z = 1463                                 |  A2 = 3                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 4                                    |  A1 = 7                                   
  Z = 192                                  |  A2 = 9                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 291                                  |  A1 = 6                                   
  Z = 1014                                 |  A2 = 4                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 1014                                 |  A1 = 7                                   
  Z = 1014                                 |  A2 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 2                                    |  A1 = 5                                   
  Z = 2                                    |  A2 = 2                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 61                                   |  A1 = 5                                   
  Z = 61                                   |  A2 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 16                                   |  A1 = 4                                   
  Z = 50                                   |  A2 = 11                                  
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 18                                   |  A1 = 8                                   
  Z = 8                                    |  A2 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 1463                                 |  A1 = 4                                   
  Z = 1463                                 |  A2 = 4                                   
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 6                                    |  A1 = 2                                   
  Z = 6                                    |  A2 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 192                                  |  A1 = 5                                   
  Z = 13                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 15                                   |  A1 = 7                                   
  Z = 21                                   |  A2 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 70                                   |  A1 = 10                                  
  Z = 24                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 8                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core3.b.gen_square[ 
  I = 91                                   |  A1 = 5                                   
  Z = 148                                  |  A2 = 2                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 654                                  |  A1 = 3                                   
  Z = 10                                   |  A2 = 2                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:m |Instance: \i_chip_core.core0.b.arb_data_ou 
  I = 291                                  |  A1 = 2                                   
  Z = 1014                                 |  A2 = 2                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 187                                  |  A1 = 3                                   
  Z = 18                                   |  A2 = 4                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core4.b.gen_square[ 
  I = 291                                  |  A1 = 6                                   
  Z = 29                                   |  A2 = 8                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core2.b.illegal_gf1 
  I = 11                                   |  A1 = 5                                   
  Z = 11                                   |  A2 = 9                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core3.b.arb_data_ou 
  I = 1014                                 |  A1 = 4                                   
  Z = 41                                   |  A2 = 6                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core3.b.arb_data_ou 
  I = 192                                  |  A1 = 11                                  
  Z = 192                                  |  A2 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 8                                    |  A1 = 11                                  
  Z = 31                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 3                                    |  A1 = 11                                  
  Z = 113                                  |  A2 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 17                                   |  A1 = 5                                   
  Z = 5                                    |  A2 = 3                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 31                                   |  A1 = 8                                   
  Z = 43                                   |  A2 = 3                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:m |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 1014                                 |  A1 = 5                                   
  Z = 6                                    |  A2 = 3                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 123                                  |  A1 = 6                                   
  Z = 123                                  |  A2 = 3                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core6.b.arb_data_ou 
  I = 1463                                 |  A1 = 4                                   
  Z = 1463                                 |  A2 = 8                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 10                                   |  A1 = 11                                  
  Z = 654                                  |  A2 = 3                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 1463                                 |  A1 = 6                                   
  Z = 1463                                 |  A2 = 3                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core7.b.arb_data_ou 
  I = 113                                  |  A1 = 6                                   
  Z = 113                                  |  A2 = 5                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:m |Instance: \i_chip_core.core7.b.gen_square[ 
  I = 35                                   |  A1 = 4                                   
  Z = 4                                    |  A2 = 4                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 38                                   |  A1 = 4                                   
  Z = 30                                   |  A2 = 7                                   
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core0.b.arb_data_ou 
  I = 654                                  |  A1 = 11                                  
  Z = 8                                    |  A2 = 4                                   
  VDD = 275388                             |  B = 4                                    
  VNW = 275388                             |  C = 6                                    
  VPW = 275386                             |  ZN = 2                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 40                                   |  A1 = 2                                   
  Z = 40                                   |  A2 = 4                                   
  VDD = 275388                             |  B = 2                                    
  VNW = 275388                             |  C = 2                                    
  VPW = 275386                             |  ZN = 3                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 7                                    |  A1 = 11                                  
  Z = 1                                    |  A2 = 3                                   
  VDD = 275388                             |  B = 4                                    
  VNW = 275388                             |  C = 6                                    
  VPW = 275386                             |  ZN = 4                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 1014                                 |  A1 = 2                                   
  Z = 30                                   |  A2 = 2                                   
  VDD = 275388                             |  B = 5                                    
  VNW = 275388                             |  C = 2                                    
  VPW = 275386                             |  ZN = 2                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 291                                  |  A1 = 6                                   
  Z = 291                                  |  A2 = 4                                   
  VDD = 275388                             |  B = 6                                    
  VNW = 275388                             |  C = 7                                    
  VPW = 275386                             |  ZN = 3                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 250                                  |  A1 = 6                                   
  Z = 250                                  |  A2 = 9                                   
  VDD = 275388                             |  B = 5                                    
  VNW = 275388                             |  C = 11                                   
  VPW = 275386                             |  ZN = 2                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 47                                   |  A1 = 4                                   
  Z = 59                                   |  A2 = 8                                   
  VDD = 275388                             |  B = 6                                    
  VNW = 275388                             |  C = 7                                    
  VPW = 275386                             |  ZN = 2                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 654                                  |  A1 = 3                                   
  Z = 654                                  |  A2 = 7                                   
  VDD = 275388                             |  B = 2                                    
  VNW = 275388                             |  C = 5                                    
  VPW = 275386                             |  ZN = 3                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 699                                  |  A1 = 6                                   
  Z = 194                                  |  A2 = 6                                   
  VDD = 275388                             |  B = 4                                    
  VNW = 275388                             |  C = 6                                    
  VPW = 275386                             |  ZN = 2                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core1.b.gen_square[ 
  I = 218                                  |  A1 = 3                                   
  Z = 218                                  |  A2 = 2                                   
  VDD = 275388                             |  B = 9                                    
  VNW = 275388                             |  C = 2                                    
  VPW = 275386                             |  ZN = 3                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core1.b.illegal_gf1 
  I = 192                                  |  A1 = 5                                   
  Z = 192                                  |  A2 = 3                                   
  VDD = 275388                             |  B = 4                                    
  VNW = 275388                             |  C = 3                                    
  VPW = 275386                             |  ZN = 5                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core1.b.illegal_gf1 
  I = 19                                   |  A1 = 5                                   
  Z = 654                                  |  A2 = 5                                   
  VDD = 275388                             |  B = 9                                    
  VNW = 275388                             |  C = 4                                    
  VPW = 275386                             |  ZN = 2                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 108                                  |  A1 = 9                                   
  Z = 108                                  |  A2 = 11                                  
  VDD = 275388                             |  B = 11                                   
  VNW = 275388                             |  C = 11                                   
  VPW = 275386                             |  ZN = 2                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:m |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 9                                    |  A1 = 3                                   
  Z = 12                                   |  A2 = 8                                   
  VDD = 275388                             |  B = 9                                    
  VNW = 275388                             |  C = 4                                    
  VPW = 275386                             |  ZN = 2                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 4                                    |  A1 = 3                                   
  Z = 6                                    |  A2 = 6                                   
  VDD = 275388                             |  B = 10                                   
  VNW = 275388                             |  C = 4                                    
  VPW = 275386                             |  ZN = 5                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 61                                   |  A1 = 11                                  
  Z = 61                                   |  A2 = 3                                   
  VDD = 275388                             |  B = 6                                    
  VNW = 275388                             |  C = 6                                    
  VPW = 275386                             |  ZN = 5                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:m |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 6                                    |  A1 = 11                                  
  Z = 6                                    |  A2 = 6                                   
  VDD = 275388                             |  B = 4                                    
  VNW = 275388                             |  C = 10                                   
  VPW = 275386                             |  ZN = 4                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 180                                  |  A1 = 4                                   
  Z = 180                                  |  A2 = 6                                   
  VDD = 275388                             |  B = 6                                    
  VNW = 275388                             |  C = 3                                    
  VPW = 275386                             |  ZN = 2                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core3.b.arb_data_ou 
  I = 55                                   |  A1 = 6                                   
  Z = 55                                   |  A2 = 5                                   
  VDD = 275388                             |  B = 5                                    
  VNW = 275388                             |  C = 2                                    
  VPW = 275386                             |  ZN = 2                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core3.b.gen_square[ 
  I = 43                                   |  A1 = 4                                   
  Z = 1463                                 |  A2 = 5                                   
  VDD = 275388                             |  B = 11                                   
  VNW = 275388                             |  C = 3                                    
  VPW = 275386                             |  ZN = 2                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core3.b.gen_square[ 
  I = 2                                    |  A1 = 4                                   
  Z = 15                                   |  A2 = 5                                   
  VDD = 275388                             |  B = 11                                   
  VNW = 275388                             |  C = 7                                    
  VPW = 275386                             |  ZN = 2                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 654                                  |  A1 = 6                                   
  Z = 654                                  |  A2 = 3                                   
  VDD = 275388                             |  B = 2                                    
  VNW = 275388                             |  C = 2                                    
  VPW = 275386                             |  ZN = 2                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 8                                    |  A1 = 10                                  
  Z = 8                                    |  A2 = 5                                   
  VDD = 275388                             |  B = 3                                    
  VNW = 275388                             |  C = 11                                   
  VPW = 275386                             |  ZN = 2                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 1463                                 |  A1 = 11                                  
  Z = 19                                   |  A2 = 4                                   
  VDD = 275388                             |  B = 5                                    
  VNW = 275388                             |  C = 8                                    
  VPW = 275386                             |  ZN = 4                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 97                                   |  A1 = 3                                   
  Z = 97                                   |  A2 = 2                                   
  VDD = 275388                             |  B = 2                                    
  VNW = 275388                             |  C = 5                                    
  VPW = 275386                             |  ZN = 5                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 393                                  |  A1 = 11                                  
  Z = 13                                   |  A2 = 2                                   
  VDD = 275388                             |  B = 11                                   
  VNW = 275388                             |  C = 4                                    
  VPW = 275386                             |  ZN = 3                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 1463                                 |  A1 = 11                                  
  Z = 1463                                 |  A2 = 4                                   
  VDD = 275388                             |  B = 4                                    
  VNW = 275388                             |  C = 9                                    
  VPW = 275386                             |  ZN = 3                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 59                                   |  A1 = 5                                   
  Z = 44                                   |  A2 = 3                                   
  VDD = 275388                             |  B = 2                                    
  VNW = 275388                             |  C = 2                                    
  VPW = 275386                             |  ZN = 2                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 16                                   |  A1 = 7                                   
  Z = 15                                   |  A2 = 3                                   
  VDD = 275388                             |  B = 3                                    
  VNW = 275388                             |  C = 2                                    
  VPW = 275386                             |  ZN = 2                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 2                                    |  A1 = 7                                   
  Z = 116                                  |  A2 = 11                                  
  VDD = 275388                             |  B = 10                                   
  VNW = 275388                             |  C = 4                                    
  VPW = 275386                             |  ZN = 3                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 13                                   |  A1 = 4                                   
  Z = 38                                   |  A2 = 4                                   
  VDD = 275388                             |  B = 4                                    
  VNW = 275388                             |  C = 3                                    
  VPW = 275386                             |  ZN = 3                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 8                                    |  A1 = 2                                   
  Z = 187                                  |  A2 = 3                                   
  VDD = 275388                             |  B = 2                                    
  VNW = 275388                             |  C = 2                                    
  VPW = 275386                             |  ZN = 2                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 4                                    |  A1 = 3                                   
  Z = 117                                  |  A2 = 7                                   
  VDD = 275388                             |  B = 6                                    
  VNW = 275388                             |  C = 5                                    
  VPW = 275386                             |  ZN = 2                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 14                                   |  A1 = 11                                  
  Z = 100                                  |  A2 = 6                                   
  VDD = 275388                             |  B = 2                                    
  VNW = 275388                             |  C = 2                                    
  VPW = 275386                             |  ZN = 2                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 6                                    |  A1 = 9                                   
  Z = 4                                    |  A2 = 3                                   
  VDD = 275388                             |  B = 3                                    
  VNW = 275388                             |  C = 3                                    
  VPW = 275386                             |  ZN = 2                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 1014                                 |  A1 = 4                                   
  Z = 1014                                 |  A2 = 3                                   
  VDD = 275388                             |  B = 3                                    
  VNW = 275388                             |  C = 8                                    
  VPW = 275386                             |  ZN = 3                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 13                                   |  A1 = 2                                   
  Z = 6                                    |  A2 = 2                                   
  VDD = 275388                             |  B = 7                                    
  VNW = 275388                             |  C = 4                                    
  VPW = 275386                             |  ZN = 6                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 112                                  |  A1 = 4                                   
  Z = 654                                  |  A2 = 5                                   
  VDD = 275388                             |  B = 3                                    
  VNW = 275388                             |  C = 9                                    
  VPW = 275386                             |  ZN = 2                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core5.b.gen_square[ 
  I = 4                                    |  A1 = 2                                   
  Z = 9                                    |  A2 = 2                                   
  VDD = 275388                             |  B = 3                                    
  VNW = 275388                             |  C = 4                                    
  VPW = 275386                             |  ZN = 2                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 5                                    |  A1 = 4                                   
  Z = 11                                   |  A2 = 5                                   
  VDD = 275388                             |  B = 7                                    
  VNW = 275388                             |  C = 10                                   
  VPW = 275386                             |  ZN = 3                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:m |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 7                                    |  A1 = 4                                   
  Z = 2                                    |  A2 = 2                                   
  VDD = 275388                             |  B = 2                                    
  VNW = 275388                             |  C = 2                                    
  VPW = 275386                             |  ZN = 3                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core6.b.arb_data_ou 
  I = 22                                   |  A1 = 6                                   
  Z = 29                                   |  A2 = 6                                   
  VDD = 275388                             |  B = 9                                    
  VNW = 275388                             |  C = 7                                    
  VPW = 275386                             |  ZN = 2                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:m |Instance: \i_chip_core.core6.b.arb_data_ou 
  I = 5                                    |  A1 = 5                                   
  Z = 22                                   |  A2 = 2                                   
  VDD = 275388                             |  B = 2                                    
  VNW = 275388                             |  C = 2                                    
  VPW = 275386                             |  ZN = 5                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core6.b.arb_data_ou 
  I = 1014                                 |  A1 = 6                                   
  Z = 291                                  |  A2 = 6                                   
  VDD = 275388                             |  B = 10                                   
  VNW = 275388                             |  C = 7                                    
  VPW = 275386                             |  ZN = 2                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core6.b.gen_square[ 
  I = 654                                  |  A1 = 3                                   
  Z = 654                                  |  A2 = 4                                   
  VDD = 275388                             |  B = 6                                    
  VNW = 275388                             |  C = 6                                    
  VPW = 275386                             |  ZN = 2                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core6.b.gen_square[ 
  I = 79                                   |  A1 = 5                                   
  Z = 7                                    |  A2 = 4                                   
  VDD = 275388                             |  B = 4                                    
  VNW = 275388                             |  C = 6                                    
  VPW = 275386                             |  ZN = 2                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core6.b.gen_square[ 
  I = 70                                   |  A1 = 11                                  
  Z = 35                                   |  A2 = 6                                   
  VDD = 275388                             |  B = 8                                    
  VNW = 275388                             |  C = 5                                    
  VPW = 275386                             |  ZN = 2                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core6.b.gen_square[ 
  I = 54                                   |  A1 = 11                                  
  Z = 392                                  |  A2 = 3                                   
  VDD = 275388                             |  B = 4                                    
  VNW = 275388                             |  C = 11                                   
  VPW = 275386                             |  ZN = 2                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 96                                   |  A1 = 4                                   
  Z = 14                                   |  A2 = 3                                   
  VDD = 275388                             |  B = 5                                    
  VNW = 275388                             |  C = 11                                   
  VPW = 275386                             |  ZN = 2                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 523                                  |  A1 = 11                                  
  Z = 523                                  |  A2 = 7                                   
  VDD = 275388                             |  B = 10                                   
  VNW = 275388                             |  C = 7                                    
  VPW = 275386                             |  ZN = 4                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 250                                  |  A1 = 3                                   
  Z = 59                                   |  A2 = 3                                   
  VDD = 275388                             |  B = 3                                    
  VNW = 275388                             |  C = 3                                    
  VPW = 275386                             |  ZN = 2                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 6                                    |  A1 = 9                                   
  Z = 44                                   |  A2 = 5                                   
  VDD = 275388                             |  B = 11                                   
  VNW = 275388                             |  C = 4                                    
  VPW = 275386                             |  ZN = 4                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core7.b.arb_data_ou 
  I = 5                                    |  A1 = 3                                   
  Z = 194                                  |  A2 = 5                                   
  VDD = 275388                             |  B = 8                                    
  VNW = 275388                             |  C = 6                                    
  VPW = 275386                             |  ZN = 2                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core7.b.illegal_gf1 
  I = 393                                  |  A1 = 3                                   
  Z = 1463                                 |  A2 = 3                                   
  VDD = 275388                             |  B = 6                                    
  VNW = 275388                             |  C = 8                                    
  VPW = 275386                             |  ZN = 3                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:m |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 122                                  |  A1 = 4                                   
  Z = 122                                  |  A2 = 4                                   
  VDD = 275388                             |  B = 3                                    
  VNW = 275388                             |  C = 11                                   
  VPW = 275386                             |  ZN = 2                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 111                                  |  A1 = 2                                   
  Z = 111                                  |  A2 = 3                                   
  VDD = 275388                             |  B = 2                                    
  VNW = 275388                             |  C = 4                                    
  VPW = 275386                             |  ZN = 3                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core3.b.illegal_gf1 
  I = 5                                    |  A1 = 11                                  
  Z = 5                                    |  A2 = 9                                   
  VDD = 275388                             |  B = 5                                    
  VNW = 275388                             |  C = 5                                    
  VPW = 275386                             |  ZN = 3                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core4.b.arb_data_ou 
  I = 291                                  |  A1 = 4                                   
  Z = 96                                   |  A2 = 2                                   
  VDD = 275388                             |  B = 3                                    
  VNW = 275388                             |  C = 6                                    
  VPW = 275386                             |  ZN = 5                                   
  VSS = 275386                             |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:m |Instance: \i_chip_core.core0.b.arb_data_ou 
  I = 1463                                 |  A1 = 5                                   
  Z = 1463                                 |  A2 = 2                                   
  VDD = 275388                             |  B = 6                                    
  VNW = 275388                             |  ZN = 5                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:m |Instance: \i_chip_core.core0.b.arb_data_ou 
  I = 8                                    |  A1 = 11                                  
  Z = 3                                    |  A2 = 2                                   
  VDD = 275388                             |  B = 4                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core0.b.arb_data_ou 
  I = 1463                                 |  A1 = 4                                   
  Z = 1463                                 |  A2 = 4                                   
  VDD = 275388                             |  B = 4                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core0.b.arb_data_ou 
  I = 17                                   |  A1 = 4                                   
  Z = 28                                   |  A2 = 5                                   
  VDD = 275388                             |  B = 5                                    
  VNW = 275388                             |  ZN = 4                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 111                                  |  A1 = 2                                   
  Z = 111                                  |  A2 = 2                                   
  VDD = 275388                             |  B = 4                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 291                                  |  A1 = 2                                   
  Z = 11                                   |  A2 = 2                                   
  VDD = 275388                             |  B = 8                                    
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:m |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 7                                    |  A1 = 6                                   
  Z = 7                                    |  A2 = 3                                   
  VDD = 275388                             |  B = 3                                    
  VNW = 275388                             |  ZN = 4                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 4                                    |  A1 = 5                                   
  Z = 200                                  |  A2 = 3                                   
  VDD = 275388                             |  B = 7                                    
  VNW = 275388                             |  ZN = 5                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 393                                  |  A1 = 5                                   
  Z = 393                                  |  A2 = 3                                   
  VDD = 275388                             |  B = 5                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 3                                    |  A1 = 4                                   
  Z = 95                                   |  A2 = 2                                   
  VDD = 275388                             |  B = 9                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:m |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 250                                  |  A1 = 5                                   
  Z = 250                                  |  A2 = 2                                   
  VDD = 275388                             |  B = 2                                    
  VNW = 275388                             |  ZN = 5                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 654                                  |  A1 = 11                                  
  Z = 654                                  |  A2 = 3                                   
  VDD = 275388                             |  B = 5                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 250                                  |  A1 = 5                                   
  Z = 1463                                 |  A2 = 3                                   
  VDD = 275388                             |  B = 5                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 7                                    |  A1 = 2                                   
  Z = 7                                    |  A2 = 2                                   
  VDD = 275388                             |  B = 5                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 392                                  |  A1 = 7                                   
  Z = 392                                  |  A2 = 4                                   
  VDD = 275388                             |  B = 6                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core0.b.gen_square[ 
  I = 4                                    |  A1 = 5                                   
  Z = 6                                    |  A2 = 2                                   
  VDD = 275388                             |  B = 4                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 21                                   |  A1 = 9                                   
  Z = 21                                   |  A2 = 3                                   
  VDD = 275388                             |  B = 4                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 4                                    |  A1 = 11                                  
  Z = 26                                   |  A2 = 4                                   
  VDD = 275388                             |  B = 4                                    
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 392                                  |  A1 = 3                                   
  Z = 392                                  |  A2 = 3                                   
  VDD = 275388                             |  B = 2                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:m |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 4                                    |  A1 = 3                                   
  Z = 7                                    |  A2 = 2                                   
  VDD = 275388                             |  B = 4                                    
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:m |Instance: \i_chip_core.core0.b.illegal_gf1 
  I = 97                                   |  A1 = 6                                   
  Z = 21                                   |  A2 = 3                                   
  VDD = 275388                             |  B = 3                                    
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core1.b.arb_data_ou 
  I = 523                                  |  A1 = 6                                   
  Z = 8                                    |  A2 = 3                                   
  VDD = 275388                             |  B = 7                                    
  VNW = 275388                             |  ZN = 4                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core1.b.gen_square[ 
  I = 27                                   |  A1 = 6                                   
  Z = 27                                   |  A2 = 5                                   
  VDD = 275388                             |  B = 3                                    
  VNW = 275388                             |  ZN = 4                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core1.b.gen_square[ 
  I = 654                                  |  A1 = 11                                  
  Z = 654                                  |  A2 = 4                                   
  VDD = 275388                             |  B = 11                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core1.b.gen_square[ 
  I = 291                                  |  A1 = 5                                   
  Z = 291                                  |  A2 = 5                                   
  VDD = 275388                             |  B = 5                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core1.b.gen_square[ 
  I = 3                                    |  A1 = 7                                   
  Z = 2                                    |  A2 = 7                                   
  VDD = 275388                             |  B = 5                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:i |Instance: \i_chip_core.core1.b.gen_square[ 
  I = 4                                    |  A1 = 3                                   
  Z = 4                                    |  A2 = 3                                   
  VDD = 275388                             |  B = 5                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:m |Instance: \i_chip_core.core1.b.gen_square[ 
  I = 4                                    |  A1 = 3                                   
  Z = 291                                  |  A2 = 3                                   
  VDD = 275388                             |  B = 4                                    
  VNW = 275388                             |  ZN = 6                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core1.b.gen_square[ 
  I = 3                                    |  A1 = 4                                   
  Z = 5                                    |  A2 = 5                                   
  VDD = 275388                             |  B = 3                                    
  VNW = 275388                             |  ZN = 5                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core1.b.illegal_gf1 
  I = 5                                    |  A1 = 4                                   
  Z = 3                                    |  A2 = 3                                   
  VDD = 275388                             |  B = 5                                    
  VNW = 275388                             |  ZN = 5                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_1:w |Instance: \i_chip_core.core1.b.illegal_gf1 
  I = 3                                    |  A1 = 3                                   
  Z = 12                                   |  A2 = 2                                   
  VDD = 275388                             |  B = 8                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai221_ |Instance: \i_chip_core.core1.b.illegal_gf1 
  A1 = 1463                                |  A1 = 7                                   
  A2 = 1463                                |  A2 = 6                                   
  B1 = 1463                                |  B = 10                                   
  B2 = 18                                  |  ZN = 3                                   
  C = 5                                    |  VDD = 280586                             
  ZN = 5                                   |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai221_ |Instance: \i_chip_core.core1.b.illegal_gf1 
  A1 = 11                                  |  A1 = 3                                   
  A2 = 7                                   |  A2 = 5                                   
  B1 = 7                                   |  B = 6                                    
  B2 = 1                                   |  ZN = 3                                   
  C = 3                                    |  VDD = 280586                             
  ZN = 11                                  |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai221_ |Instance: \i_chip_core.core1.b.illegal_gf1 
  A1 = 36                                  |  A1 = 4                                   
  A2 = 60                                  |  A2 = 3                                   
  B1 = 14                                  |  B = 5                                    
  B2 = 20                                  |  ZN = 5                                   
  C = 20                                   |  VDD = 280586                             
  ZN = 20                                  |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai221_ |Instance: \i_chip_core.core1.b.illegal_gf1 
  A1 = 94                                  |  A1 = 2                                   
  A2 = 1014                                |  A2 = 2                                   
  B1 = 4                                   |  B = 7                                    
  B2 = 3                                   |  ZN = 2                                   
  C = 1014                                 |  VDD = 280586                             
  ZN = 3                                   |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai221_ |Instance: \i_chip_core.core1.b.illegal_gf1 
  A1 = 4                                   |  A1 = 11                                  
  A2 = 24                                  |  A2 = 3                                   
  B1 = 5                                   |  B = 5                                    
  B2 = 4                                   |  ZN = 2                                   
  C = 2                                    |  VDD = 280586                             
  ZN = 3                                   |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai221_ |Instance: \i_chip_core.core1.b.illegal_gf1 
  A1 = 4                                   |  A1 = 2                                   
  A2 = 21                                  |  A2 = 2                                   
  B1 = 6                                   |  B = 6                                    
  B2 = 4                                   |  ZN = 2                                   
  C = 3                                    |  VDD = 280586                             
  ZN = 3                                   |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai221_ |Instance: \i_chip_core.core1.b.illegal_gf1 
  A1 = 3                                   |  A1 = 9                                   
  A2 = 392                                 |  A2 = 3                                   
  B1 = 10                                  |  B = 9                                    
  B2 = 4                                   |  ZN = 2                                   
  C = 2                                    |  VDD = 280586                             
  ZN = 3                                   |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai221_ |Instance: \i_chip_core.core1.b.illegal_gf1 
  A1 = 5                                   |  A1 = 5                                   
  A2 = 24                                  |  A2 = 4                                   
  B1 = 5                                   |  B = 6                                    
  B2 = 5                                   |  ZN = 3                                   
  C = 2                                    |  VDD = 280586                             
  ZN = 3                                   |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai221_ |Instance: \i_chip_core.core1.b.illegal_gf1 
  A1 = 52                                  |  A1 = 4                                   
  A2 = 392                                 |  A2 = 3                                   
  B1 = 10                                  |  B = 7                                    
  B2 = 11                                  |  ZN = 2                                   
  C = 2                                    |  VDD = 280586                             
  ZN = 4                                   |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_8:m |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 291                                  |  A1 = 2                                   
  Z = 291                                  |  A2 = 2                                   
  VDD = 275388                             |  B = 2                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_8:w |Instance: \i_chip_core.core2.b.gen_square[ 
  I = 1463                                 |  A1 = 11                                  
  Z = 148                                  |  A2 = 5                                   
  VDD = 275388                             |  B = 7                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai222_ |Instance: \i_chip_core.core2.b.gen_square[ 
  A1 = 40                                  |  A1 = 6                                   
  A2 = 392                                 |  A2 = 3                                   
  B1 = 10                                  |  B = 3                                    
  B2 = 392                                 |  ZN = 3                                   
  C1 = 392                                 |  VDD = 280586                             
  C2 = 25                                  |  VNW = 280586                             
  ZN = 2                                   |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai222_ |Instance: \i_chip_core.core2.b.gen_square[ 
  A1 = 5                                   |  A1 = 5                                   
  A2 = 24                                  |  A2 = 3                                   
  B1 = 5                                   |  B = 3                                    
  B2 = 5                                   |  ZN = 4                                   
  C1 = 3                                   |  VDD = 280586                             
  C2 = 2                                   |  VNW = 280586                             
  ZN = 3                                   |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai222_ |Instance: \i_chip_core.core2.b.gen_square[ 
  A1 = 1014                                |  A1 = 2                                   
  A2 = 32                                  |  A2 = 2                                   
  B1 = 4                                   |  B = 2                                    
  B2 = 5                                   |  ZN = 2                                   
  C1 = 4                                   |  VDD = 280586                             
  C2 = 3                                   |  VNW = 280586                             
  ZN = 2                                   |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai222_ |Instance: \i_chip_core.core2.b.gen_square[ 
  A1 = 6                                   |  A1 = 3                                   
  A2 = 5                                   |  A2 = 2                                   
  B1 = 5                                   |  B = 6                                    
  B2 = 4                                   |  ZN = 5                                   
  C1 = 3                                   |  VDD = 280586                             
  C2 = 2                                   |  VNW = 280586                             
  ZN = 3                                   |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai222_ |Instance: \i_chip_core.core2.b.gen_square[ 
  A1 = 5                                   |  A1 = 4                                   
  A2 = 5                                   |  A2 = 2                                   
  B1 = 5                                   |  B = 6                                    
  B2 = 4                                   |  ZN = 5                                   
  C1 = 3                                   |  VDD = 280586                             
  C2 = 6                                   |  VNW = 280586                             
  ZN = 2                                   |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai222_ |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 6                                   |  A1 = 10                                  
  A2 = 9                                   |  A2 = 5                                   
  B1 = 8                                   |  B = 4                                    
  B2 = 4                                   |  ZN = 2                                   
  C1 = 4                                   |  VDD = 280586                             
  C2 = 4                                   |  VNW = 280586                             
  ZN = 5                                   |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xnor2_1 |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 393                                 |  A1 = 2                                   
  A2 = 42                                  |  A2 = 2                                   
  ZN = 42                                  |  B = 6                                    
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xnor2_1 |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 218                                 |  A1 = 4                                   
  A2 = 218                                 |  A2 = 2                                   
  ZN = 3                                   |  B = 5                                    
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xnor2_1 |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 19                                  |  A1 = 8                                   
  A2 = 9                                   |  A2 = 11                                  
  ZN = 4                                   |  B = 3                                    
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xnor2_1 |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 55                                  |  A1 = 5                                   
  A2 = 28                                  |  A2 = 2                                   
  ZN = 28                                  |  B = 5                                    
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xnor2_1 |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 24                                  |  A1 = 11                                  
  A2 = 13                                  |  A2 = 4                                   
  ZN = 13                                  |  B = 8                                    
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xnor2_1 |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 699                                 |  A1 = 3                                   
  A2 = 33                                  |  A2 = 2                                   
  ZN = 33                                  |  B = 8                                    
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xnor2_1 |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 40                                  |  A1 = 3                                   
  A2 = 10                                  |  A2 = 2                                   
  ZN = 29                                  |  B = 7                                    
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xnor2_1 |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 41                                  |  A1 = 7                                   
  A2 = 67                                  |  A2 = 2                                   
  ZN = 67                                  |  B = 3                                    
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xnor2_1 |Instance: \i_chip_core.core2.b.illegal_gf1 
  A1 = 113                                 |  A1 = 6                                   
  A2 = 113                                 |  A2 = 4                                   
  ZN = 2                                   |  B = 4                                    
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xnor2_1 |Instance: \i_chip_core.core3.b.arb_data_ou 
  A1 = 97                                  |  A1 = 5                                   
  A2 = 31                                  |  A2 = 2                                   
  ZN = 4                                   |  B = 6                                    
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xnor2_1 |Instance: \i_chip_core.core3.b.arb_data_ou 
  A1 = 42                                  |  A1 = 6                                   
  A2 = 112                                 |  A2 = 3                                   
  ZN = 26                                  |  B = 5                                    
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xnor2_1 |Instance: \i_chip_core.core3.b.arb_data_ou 
  A1 = 180                                 |  A1 = 10                                  
  A2 = 180                                 |  A2 = 2                                   
  ZN = 180                                 |  B = 5                                    
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xnor2_1 |Instance: \i_chip_core.core3.b.arb_data_ou 
  A1 = 42                                  |  A1 = 4                                   
  A2 = 26                                  |  A2 = 3                                   
  ZN = 26                                  |  B = 3                                    
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xnor2_1 |Instance: \i_chip_core.core3.b.arb_data_ou 
  A1 = 28                                  |  A1 = 3                                   
  A2 = 26                                  |  A2 = 3                                   
  ZN = 26                                  |  B = 4                                    
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xnor2_1 |Instance: \i_chip_core.core3.b.arb_data_ou 
  A1 = 143                                 |  A1 = 7                                   
  A2 = 143                                 |  A2 = 2                                   
  ZN = 143                                 |  B = 11                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xnor2_1 |Instance: \i_chip_core.core3.b.gen_square[ 
  A1 = 21                                  |  A1 = 6                                   
  A2 = 16                                  |  A2 = 4                                   
  ZN = 2                                   |  B = 4                                    
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xnor2_1 |Instance: \i_chip_core.core3.b.gen_square[ 
  A1 = 21                                  |  A1 = 5                                   
  A2 = 16                                  |  A2 = 2                                   
  ZN = 3                                   |  B = 11                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xnor2_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 148                                 |  A1 = 5                                   
  A2 = 1463                                |  A2 = 3                                   
  ZN = 3                                   |  B = 11                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xnor2_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 31                                  |  A1 = 2                                   
  A2 = 24                                  |  A2 = 2                                   
  ZN = 24                                  |  B = 2                                    
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xnor2_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 52                                  |  A1 = 4                                   
  A2 = 21                                  |  A2 = 3                                   
  ZN = 21                                  |  B = 3                                    
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xnor2_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 20                                  |  A1 = 9                                   
  A2 = 12                                  |  A2 = 3                                   
  ZN = 12                                  |  B = 5                                    
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xnor2_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 8                                   |  A1 = 6                                   
  A2 = 14                                  |  A2 = 2                                   
  ZN = 200                                 |  B = 5                                    
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xnor2_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 28                                  |  A1 = 7                                   
  A2 = 15                                  |  A2 = 3                                   
  ZN = 3                                   |  B = 11                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xnor2_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 97                                  |  A1 = 3                                   
  A2 = 97                                  |  A2 = 3                                   
  ZN = 97                                  |  B = 11                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xnor2_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 20                                  |  A1 = 4                                   
  A2 = 39                                  |  A2 = 3                                   
  ZN = 3                                   |  B = 7                                    
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xnor2_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 21                                  |  A1 = 11                                  
  A2 = 16                                  |  A2 = 3                                   
  ZN = 2                                   |  B = 11                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xnor2_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 21                                  |  A1 = 11                                  
  A2 = 13                                  |  A2 = 5                                   
  ZN = 13                                  |  B = 4                                    
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xnor2_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 187                                 |  A1 = 2                                   
  A2 = 11                                  |  A2 = 2                                   
  ZN = 4                                   |  B = 5                                    
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xnor2_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 7                                   |  A1 = 7                                   
  A2 = 6                                   |  A2 = 3                                   
  ZN = 5                                   |  B = 10                                   
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai22_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 1463                                |  A1 = 6                                   
  A2 = 2                                   |  A2 = 5                                   
  B1 = 3                                   |  B = 4                                    
  B2 = 3                                   |  ZN = 2                                   
  ZN = 2                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai22_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 1463                                |  A1 = 4                                   
  A2 = 116                                 |  A2 = 2                                   
  B1 = 22                                  |  B = 5                                    
  B2 = 4                                   |  ZN = 4                                   
  ZN = 4                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai22_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 14                                  |  A1 = 4                                   
  A2 = 1014                                |  A2 = 3                                   
  B1 = 5                                   |  B = 7                                    
  B2 = 1014                                |  ZN = 5                                   
  ZN = 1014                                |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai22_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 94                                  |  A1 = 10                                  
  A2 = 1014                                |  A2 = 5                                   
  B1 = 1014                                |  B = 9                                    
  B2 = 200                                 |  ZN = 2                                   
  ZN = 94                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai22_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 5                                   |  A1 = 3                                   
  A2 = 24                                  |  A2 = 3                                   
  B1 = 5                                   |  B = 3                                    
  B2 = 4                                   |  ZN = 2                                   
  ZN = 3                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai22_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 1014                                |  A1 = 3                                   
  A2 = 55                                  |  A2 = 2                                   
  B1 = 5                                   |  B = 3                                    
  B2 = 5                                   |  ZN = 2                                   
  ZN = 291                                 |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai32_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 97                                  |  A1 = 4                                   
  A2 = 10                                  |  A2 = 3                                   
  A3 = 4                                   |  B = 2                                    
  B1 = 523                                 |  ZN = 2                                   
  B2 = 8                                   |  VDD = 280586                             
  ZN = 97                                  |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai32_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 122                                 |  A1 = 7                                   
  A2 = 10                                  |  A2 = 3                                   
  A3 = 3                                   |  B = 11                                   
  B1 = 10                                  |  ZN = 2                                   
  B2 = 10                                  |  VDD = 280586                             
  ZN = 3                                   |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai32_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 19                                  |  A1 = 7                                   
  A2 = 38                                  |  A2 = 4                                   
  A3 = 24                                  |  B = 11                                   
  B1 = 38                                  |  ZN = 2                                   
  B2 = 1                                   |  VDD = 280586                             
  ZN = 38                                  |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai32_1 |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 14                                  |  A1 = 6                                   
  A2 = 4                                   |  A2 = 3                                   
  A3 = 5                                   |  B = 7                                    
  B1 = 4                                   |  ZN = 4                                   
  B2 = 4                                   |  VDD = 280586                             
  ZN = 3                                   |  VNW = 280586                             
  VDD = 275388                             |  VPW = 280584                             
  VNW = 275388                             |  VSS = 280584                             
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xor2_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 1463                                |  A1 = 3                                   
  A2 = 250                                 |  A2 = 2                                   
  Z = 5                                    |  B = 6                                    
  VDD = 275388                             |  ZN = 5                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xor2_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 142                                 |  A1 = 5                                   
  A2 = 142                                 |  A2 = 2                                   
  Z = 142                                  |  B = 7                                    
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xor2_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 21                                  |  A1 = 9                                   
  A2 = 55                                  |  A2 = 4                                   
  Z = 1                                    |  B = 6                                    
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xor2_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 1463                                |  A1 = 7                                   
  A2 = 1463                                |  A2 = 2                                   
  Z = 1463                                 |  B = 7                                    
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xor2_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 37                                  |  A1 = 5                                   
  A2 = 30                                  |  A2 = 2                                   
  Z = 30                                   |  B = 6                                    
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xor2_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 187                                 |  A1 = 5                                   
  A2 = 11                                  |  A2 = 2                                   
  Z = 79                                   |  B = 11                                   
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xor2_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 29                                  |  A1 = 3                                   
  A2 = 15                                  |  A2 = 2                                   
  Z = 15                                   |  B = 3                                    
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xor2_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 1014                                |  A1 = 6                                   
  A2 = 1014                                |  A2 = 4                                   
  Z = 5                                    |  B = 4                                    
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__xor2_1: |Instance: \i_chip_core.core3.b.illegal_gf1 
  A1 = 7                                   |  A1 = 5                                   
  A2 = 6                                   |  A2 = 2                                   
  Z = 4                                    |  B = 5                                    
  VDD = 275388                             |  ZN = 4                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai33_1 |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 1014                                |  A1 = 11                                  
  A2 = 5                                   |  A2 = 2                                   
  A3 = 3                                   |  B = 4                                    
  B1 = 5                                   |  ZN = 5                                   
  B2 = 7                                   |  VDD = 280586                             
  B3 = 6                                   |  VNW = 280586                             
  ZN = 4                                   |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai33_1 |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 523                                 |  A1 = 6                                   
  A2 = 14                                  |  A2 = 4                                   
  A3 = 5                                   |  B = 3                                    
  B1 = 4                                   |  ZN = 2                                   
  B2 = 4                                   |  VDD = 280586                             
  B3 = 6                                   |  VNW = 280586                             
  ZN = 4                                   |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai33_1 |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 192                                 |  A1 = 2                                   
  A2 = 30                                  |  A2 = 2                                   
  A3 = 30                                  |  B = 4                                    
  B1 = 30                                  |  ZN = 3                                   
  B2 = 30                                  |  VDD = 280586                             
  B3 = 192                                 |  VNW = 280586                             
  ZN = 4                                   |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai33_1 |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 523                                 |  A1 = 4                                   
  A2 = 523                                 |  A2 = 4                                   
  A3 = 523                                 |  B = 6                                    
  B1 = 523                                 |  ZN = 3                                   
  B2 = 16                                  |  VDD = 280586                             
  B3 = 523                                 |  VNW = 280586                             
  ZN = 523                                 |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai33_1 |Instance: \i_chip_core.core4.b.arb_data_ou 
  A1 = 4                                   |  A1 = 11                                  
  A2 = 9                                   |  A2 = 2                                   
  A3 = 4                                   |  B = 5                                    
  B1 = 4                                   |  ZN = 3                                   
  B2 = 7                                   |  VDD = 280586                             
  B3 = 22                                  |  VNW = 280586                             
  ZN = 4                                   |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai33_1 |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 8                                   |  A1 = 5                                   
  A2 = 6                                   |  A2 = 2                                   
  A3 = 4                                   |  B = 6                                    
  B1 = 5                                   |  ZN = 5                                   
  B2 = 5                                   |  VDD = 280586                             
  B3 = 4                                   |  VNW = 280586                             
  ZN = 4                                   |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai33_1 |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 5                                   |  A1 = 11                                  
  A2 = 7                                   |  A2 = 4                                   
  A3 = 5                                   |  B = 5                                    
  B1 = 523                                 |  ZN = 5                                   
  B2 = 6                                   |  VDD = 280586                             
  B3 = 8                                   |  VNW = 280586                             
  ZN = 4                                   |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai33_1 |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 113                                 |  A1 = 6                                   
  A2 = 60                                  |  A2 = 3                                   
  A3 = 113                                 |  B = 3                                    
  B1 = 5                                   |  ZN = 4                                   
  B2 = 5                                   |  VDD = 280586                             
  B3 = 6                                   |  VNW = 280586                             
  ZN = 2                                   |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai33_1 |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 8                                   |  A1 = 10                                  
  A2 = 1014                                |  A2 = 11                                  
  A3 = 3                                   |  B = 3                                    
  B1 = 5                                   |  ZN = 3                                   
  B2 = 7                                   |  VDD = 280586                             
  B3 = 3                                   |  VNW = 280586                             
  ZN = 3                                   |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai33_1 |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 4                                   |  A1 = 5                                   
  A2 = 5                                   |  A2 = 3                                   
  A3 = 3                                   |  B = 3                                    
  B1 = 3                                   |  ZN = 3                                   
  B2 = 7                                   |  VDD = 280586                             
  B3 = 6                                   |  VNW = 280586                             
  ZN = 2                                   |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai33_1 |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 14                                  |  A1 = 4                                   
  A2 = 5                                   |  A2 = 2                                   
  A3 = 4                                   |  B = 2                                    
  B1 = 4                                   |  ZN = 2                                   
  B2 = 3                                   |  VDD = 280586                             
  B3 = 6                                   |  VNW = 280586                             
  ZN = 3                                   |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai33_1 |Instance: \i_chip_core.core4.b.gen_square[ 
  A1 = 4                                   |  A1 = 3                                   
  A2 = 9                                   |  A2 = 2                                   
  A3 = 4                                   |  B = 8                                    
  B1 = 4                                   |  ZN = 3                                   
  B2 = 4                                   |  VDD = 280586                             
  B3 = 95                                  |  VNW = 280586                             
  ZN = 3                                   |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai33_1 |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 6                                   |  A1 = 7                                   
  A2 = 5                                   |  A2 = 2                                   
  A3 = 5                                   |  B = 11                                   
  B1 = 3                                   |  ZN = 2                                   
  B2 = 6                                   |  VDD = 280586                             
  B3 = 8                                   |  VNW = 280586                             
  ZN = 4                                   |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 21                                   |  A1 = 6                                   
  Z = 1463                                 |  A2 = 3                                   
  VDD = 275388                             |  B = 3                                    
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 250                                  |  A1 = 6                                   
  Z = 38                                   |  A2 = 4                                   
  VDD = 275388                             |  B = 4                                    
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 44                                   |  A1 = 2                                   
  Z = 192                                  |  A2 = 2                                   
  VDD = 275388                             |  B = 5                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 2                                    |  A1 = 9                                   
  Z = 18                                   |  A2 = 2                                   
  VDD = 275388                             |  B = 4                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 17                                   |  A1 = 3                                   
  Z = 10                                   |  A2 = 2                                   
  VDD = 275388                             |  B = 5                                    
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 3                                    |  A1 = 6                                   
  Z = 8                                    |  A2 = 5                                   
  VDD = 275388                             |  B = 3                                    
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 164                                  |  A1 = 6                                   
  Z = 164                                  |  A2 = 3                                   
  VDD = 275388                             |  B = 3                                    
  VNW = 275388                             |  ZN = 5                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 122                                  |  A1 = 3                                   
  Z = 122                                  |  A2 = 2                                   
  VDD = 275388                             |  B = 11                                   
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 2                                    |  A1 = 4                                   
  Z = 116                                  |  A2 = 3                                   
  VDD = 275388                             |  B = 6                                    
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 38                                   |  A1 = 6                                   
  Z = 8                                    |  A2 = 2                                   
  VDD = 275388                             |  B = 2                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: \i_chip_core.core4.b.illegal_gf1 
  I = 67                                   |  A1 = 3                                   
  Z = 67                                   |  A2 = 3                                   
  VDD = 275388                             |  B = 2                                    
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_2:i |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 1014                                |  A1 = 11                                  
  A2 = 48                                  |  A2 = 4                                   
  Z = 48                                   |  B = 5                                    
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_2:i |Instance: \i_chip_core.core4.b.illegal_gf1 
  A1 = 9                                   |  A1 = 3                                   
  A2 = 10                                  |  A2 = 2                                   
  Z = 18                                   |  B = 5                                    
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_2:i |Instance: \i_chip_core.core5.b.arb_data_ou 
  A1 = 17                                  |  A1 = 3                                   
  A2 = 6                                   |  A2 = 2                                   
  Z = 6                                    |  B = 2                                    
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or2_2:i |Instance: \i_chip_core.core5.b.gen_square[ 
  A1 = 1463                                |  A1 = 5                                   
  A2 = 1463                                |  A2 = 3                                   
  Z = 1463                                 |  B = 3                                    
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or3_2:i |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 250                                 |  A1 = 2                                   
  A2 = 250                                 |  A2 = 2                                   
  A3 = 250                                 |  B = 7                                    
  Z = 9                                    |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_2 |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 122                                 |  A1 = 5                                   
  A2 = 122                                 |  A2 = 2                                   
  ZN = 122                                 |  B = 10                                   
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_2 |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 8                                   |  A1 = 3                                   
  A2 = 1014                                |  A2 = 4                                   
  ZN = 291                                 |  B = 4                                    
  VDD = 275388                             |  ZN = 6                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_2 |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 100                                 |  A1 = 11                                  
  A2 = 100                                 |  A2 = 4                                   
  ZN = 10                                  |  B = 3                                    
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nand2_2 |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 393                                 |  A1 = 5                                   
  A2 = 393                                 |  A2 = 5                                   
  ZN = 393                                 |  B = 4                                    
  VDD = 275388                             |  ZN = 3                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai31_2 |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 27                                  |  A1 = 2                                   
  A2 = 7                                   |  A2 = 2                                   
  A3 = 3                                   |  B = 5                                    
  B = 27                                   |  ZN = 4                                   
  ZN = 27                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai31_2 |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 51                                  |  A1 = 11                                  
  A2 = 24                                  |  A2 = 2                                   
  A3 = 22                                  |  B = 5                                    
  B = 10                                   |  ZN = 5                                   
  ZN = 11                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai31_2 |Instance: \i_chip_core.core5.b.illegal_gf1 
  A1 = 31                                  |  A1 = 11                                  
  A2 = 97                                  |  A2 = 6                                   
  A3 = 97                                  |  B = 9                                    
  B = 97                                   |  ZN = 2                                   
  ZN = 97                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__inv_1:i |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 15                                   |  A1 = 11                                  
  ZN = 7                                   |  A2 = 4                                   
  VDD = 275388                             |  B = 3                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__inv_1:i |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 112                                  |  A1 = 11                                  
  ZN = 17                                  |  A2 = 3                                   
  VDD = 275388                             |  B = 4                                    
  VNW = 275388                             |  ZN = 4                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__inv_1:i |Instance: \i_chip_core.core5.b.illegal_gf1 
  I = 16                                   |  A1 = 3                                   
  ZN = 16                                  |  A2 = 2                                   
  VDD = 275388                             |  B = 5                                    
  VNW = 275388                             |  ZN = 4                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_2 |Instance: \i_chip_core.core6.b.arb_data_ou 
  A1 = 5                                   |  A1 = 3                                   
  A2 = 4                                   |  A2 = 2                                   
  B = 9                                    |  B = 3                                    
  ZN = 9                                   |  ZN = 5                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_2 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 36                                  |  A1 = 5                                   
  A2 = 31                                  |  A2 = 5                                   
  B = 24                                   |  B = 4                                    
  ZN = 24                                  |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_2 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 393                                 |  A1 = 2                                   
  A2 = 393                                 |  A2 = 2                                   
  B = 22                                   |  B = 3                                    
  ZN = 393                                 |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_2 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 21                                  |  A1 = 4                                   
  A2 = 7                                   |  A2 = 2                                   
  B = 5                                    |  B = 4                                    
  ZN = 7                                   |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_2 |Instance: \i_chip_core.core6.b.gen_square[ 
  A1 = 4                                   |  A1 = 5                                   
  A2 = 15                                  |  A2 = 3                                   
  B = 3                                    |  B = 4                                    
  ZN = 15                                  |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_2 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 18                                  |  A1 = 5                                   
  A2 = 16                                  |  A2 = 4                                   
  B = 18                                   |  B = 5                                    
  ZN = 18                                  |  ZN = 4                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_2 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 21                                  |  A1 = 11                                  
  A2 = 8                                   |  A2 = 3                                   
  B = 4                                    |  B = 6                                    
  ZN = 9                                   |  ZN = 3                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi21_2 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 2                                   |  A1 = 6                                   
  A2 = 2                                   |  A2 = 6                                   
  B = 8                                    |  B = 4                                    
  ZN = 4                                   |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_3:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 10                                   |  A1 = 9                                   
  Z = 1463                                 |  A2 = 4                                   
  VDD = 275388                             |  B = 3                                    
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_3:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 1014                                 |  A1 = 9                                   
  Z = 1014                                 |  A2 = 5                                   
  VDD = 275388                             |  B = 11                                   
  VNW = 275388                             |  ZN = 3                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_3:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 11                                   |  A1 = 11                                  
  Z = 4                                    |  A2 = 5                                   
  VDD = 275388                             |  B = 4                                    
  VNW = 275388                             |  ZN = 5                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_3:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 61                                   |  A1 = 5                                   
  Z = 61                                   |  A2 = 2                                   
  VDD = 275388                             |  B = 7                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_3:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 14                                   |  A1 = 2                                   
  Z = 14                                   |  A2 = 2                                   
  VDD = 275388                             |  B = 5                                    
  VNW = 275388                             |  ZN = 2                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__buf_3:f |Instance: \i_chip_core.core6.b.illegal_gf1 
  I = 164                                  |  A1 = 11                                  
  Z = 44                                   |  A2 = 5                                   
  VDD = 275388                             |  B = 5                                    
  VNW = 275388                             |  ZN = 5                                   
  VPW = 275386                             |  VDD = 280586                             
  VSS = 275386                             |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai211_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 2                                   |  A1 = 4                                   
  A2 = 2                                   |  A2 = 3                                   
  B = 19                                   |  B = 3                                    
  C = 6                                    |  ZN = 3                                   
  ZN = 6                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai211_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 1014                                |  A1 = 2                                   
  A2 = 1014                                |  A2 = 2                                   
  B = 30                                   |  B = 5                                    
  C = 291                                  |  ZN = 2                                   
  ZN = 1014                                |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__or4_2:i |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 1463                                |  A1 = 3                                   
  A2 = 18                                  |  A2 = 3                                   
  A3 = 1463                                |  B = 6                                    
  A4 = 5                                   |  ZN = 5                                   
  Z = 1463                                 |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi211_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 48                                  |  A1 = 2                                   
  A2 = 48                                  |  A2 = 2                                   
  B = 8                                    |  B = 4                                    
  C = 7                                    |  ZN = 3                                   
  ZN = 7                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__aoi211_ |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 12                                  |  A1 = 3                                   
  A2 = 10                                  |  A2 = 2                                   
  B = 218                                  |  B = 2                                    
  C = 3                                    |  ZN = 2                                   
  ZN = 3                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai33_2 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 14                                  |  A1 = 5                                   
  A2 = 523                                 |  A2 = 2                                   
  A3 = 5                                   |  B = 3                                    
  B1 = 523                                 |  ZN = 5                                   
  B2 = 6                                   |  VDD = 280586                             
  B3 = 4                                   |  VNW = 280586                             
  ZN = 3                                   |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__oai33_2 |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 4                                   |  A1 = 3                                   
  A2 = 87                                  |  A2 = 2                                   
  A3 = 4                                   |  B = 2                                    
  B1 = 4                                   |  ZN = 2                                   
  B2 = 7                                   |  VDD = 280586                             
  B3 = 6                                   |  VNW = 280586                             
  ZN = 3                                   |  VPW = 280584                             
  VDD = 275388                             |  VSS = 280584                             
  VNW = 275388                             |                                           
  VPW = 275386                             |                                           
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor4_4: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 13                                  |  A1 = 5                                   
  A2 = 122                                 |  A2 = 2                                   
  A3 = 122                                 |  B = 4                                    
  A4 = 122                                 |  ZN = 5                                   
  ZN = 3                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor2_4: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 12                                  |  A1 = 5                                   
  A2 = 193                                 |  A2 = 3                                   
  ZN = 22                                  |  B = 3                                    
  VDD = 275388                             |  ZN = 2                                   
  VNW = 275388                             |  VDD = 280586                             
  VPW = 275386                             |  VNW = 280586                             
  VSS = 275386                             |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor4_2: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 6                                   |  A1 = 11                                  
  A2 = 29                                  |  A2 = 9                                   
  A3 = 7                                   |  B = 7                                    
  A4 = 8                                   |  ZN = 3                                   
  ZN = 5                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor4_2: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 60                                  |  A1 = 5                                   
  A2 = 43                                  |  A2 = 4                                   
  A3 = 60                                  |  B = 5                                    
  A4 = 43                                  |  ZN = 3                                   
  ZN = 3                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor4_2: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 393                                 |  A1 = 5                                   
  A2 = 393                                 |  A2 = 5                                   
  A3 = 393                                 |  B = 3                                    
  A4 = 393                                 |  ZN = 2                                   
  ZN = 9                                   |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__nor4_2: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 26                                  |  A1 = 2                                   
  A2 = 23                                  |  A2 = 2                                   
  A3 = 23                                  |  B = 3                                    
  A4 = 26                                  |  ZN = 2                                   
  ZN = 23                                  |  VDD = 280586                             
  VDD = 275388                             |  VNW = 280586                             
  VNW = 275388                             |  VPW = 280584                             
  VPW = 275386                             |  VSS = 280584                             
  VSS = 275386                             |                                           
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__and3_2: |Instance: \i_chip_core.core6.b.illegal_gf1 
  A1 = 1463                                |  A1 = 5                                   
  A2 = 1463                                |  A2 = 3                                   
  A3 = 1463                                |  B = 6                                    
  Z = 1463                                 |  ZN = 2                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.arb_data_ou 
                                           |  A1 = 5                                   
                                           |  A2 = 2                                   
                                           |  B = 5                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 2                                   
                                           |  B = 4                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  B = 3                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 2                                   
                                           |  A2 = 2                                   
                                           |  B = 5                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 2                                   
                                           |  B = 2                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  B = 5                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 4                                   
                                           |  B = 4                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 11                                  
                                           |  B = 7                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 2                                   
                                           |  A2 = 2                                   
                                           |  B = 3                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 4                                   
                                           |  B = 2                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  B = 6                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 2                                   
                                           |  B = 5                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 6                                   
                                           |  B = 5                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 2                                   
                                           |  B = 5                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 2                                   
                                           |  A2 = 2                                   
                                           |  B = 5                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 2                                   
                                           |  B = 6                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  B = 7                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  B = 4                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 2                                   
                                           |  B = 5                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 2                                   
                                           |  B = 2                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  B = 5                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 3                                   
                                           |  B = 4                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 2                                   
                                           |  A2 = 3                                   
                                           |  B = 4                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  B = 8                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  A1 = 4                                   
                                           |  A2 = 9                                   
                                           |  B = 8                                    
                                           |  ZN = 11                                  
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  B = 4                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  B = 7                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 2                                   
                                           |  B = 6                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  B = 7                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.gen_square[ 
                                           |  A1 = 9                                   
                                           |  A2 = 3                                   
                                           |  B = 7                                    
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.arb_data_ou 
                                           |  A1 = 2                                   
                                           |  A2 = 5                                   
                                           |  B = 2                                    
                                           |  ZN = 7                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  B = 9                                    
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  B = 5                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  B = 5                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  B = 8                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 2                                   
                                           |  B = 4                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  B = 10                                   
                                           |  ZN = 7                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 4                                   
                                           |  A2 = 6                                   
                                           |  B = 5                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 2                                   
                                           |  A2 = 3                                   
                                           |  B = 5                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 3                                   
                                           |  B = 3                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 8                                   
                                           |  A2 = 3                                   
                                           |  B = 10                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  B = 3                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 6                                   
                                           |  B = 4                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  B = 10                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  B = 11                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 6                                   
                                           |  B = 3                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 2                                   
                                           |  B = 4                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  B = 7                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 2                                   
                                           |  A2 = 11                                  
                                           |  B = 7                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 10                                  
                                           |  B = 11                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 9                                   
                                           |  B = 9                                    
                                           |  ZN = 7                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  B = 5                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  B = 6                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  B = 7                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  B = 7                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  B = 11                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  B = 5                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 8                                   
                                           |  B = 9                                    
                                           |  ZN = 9                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  B = 8                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  B = 4                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 8                                   
                                           |  B = 3                                    
                                           |  ZN = 10                                  
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 5                                   
                                           |  B = 3                                    
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  B = 5                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  B = 6                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  B = 8                                    
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.arb_data_ou 
                                           |  I = 5                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 6                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 6                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 5                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 6                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  I = 3                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire1129                         
                                           |  I = 2                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap3287                      
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap4797                      
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap4848                      
                                           |  I = 6                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire5829                         
                                           |  I = 2                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire5847                         
                                           |  I = 2                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire5904                         
                                           |  I = 2                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire6179                         
                                           |  I = 2                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire6204                         
                                           |  I = 2                                    
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap6431                      
                                           |  I = 5                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap7657                      
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire7658                         
                                           |  I = 2                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire8200                         
                                           |  I = 2                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire8270                         
                                           |  I = 5                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap8319                      
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire8344                         
                                           |  I = 2                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap8398                      
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap8452                      
                                           |  I = 6                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap8568                      
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap8774                      
                                           |  I = 5                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire9362                         
                                           |  I = 2                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap9797                      
                                           |  I = 4                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap9843                      
                                           |  I = 4                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire10470                        
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap10524                     
                                           |  I = 3                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire10525                        
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap10729                     
                                           |  I = 5                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap10733                     
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap10744                     
                                           |  I = 5                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap10831                     
                                           |  I = 6                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap10834                     
                                           |  I = 6                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire11472                        
                                           |  I = 5                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire11793                        
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire11860                        
                                           |  I = 3                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap11994                     
                                           |  I = 5                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire12025                        
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap12043                     
                                           |  I = 5                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap12075                     
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap12181                     
                                           |  I = 3                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap12246                     
                                           |  I = 5                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire12397                        
                                           |  I = 4                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire12435                        
                                           |  I = 5                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire12468                        
                                           |  I = 2                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire12548                        
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap12549                     
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire12636                        
                                           |  I = 2                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire12720                        
                                           |  I = 2                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap12761                     
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire12769                        
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap13283                     
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire13287                        
                                           |  I = 2                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire13328                        
                                           |  I = 2                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap13330                     
                                           |  I = 4                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire13334                        
                                           |  I = 2                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire13368                        
                                           |  I = 2                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap13527                     
                                           |  I = 4                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire13558                        
                                           |  I = 4                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap13576                     
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap13579                     
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire13951                        
                                           |  I = 4                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire14010                        
                                           |  I = 2                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire14373                        
                                           |  I = 2                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire14547                        
                                           |  I = 2                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap14552                     
                                           |  I = 3                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap14770                     
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap14844                     
                                           |  I = 3                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap15587                     
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap15589                     
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap16129                     
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap16145                     
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap17133                     
                                           |  I = 7                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap17356                     
                                           |  I = 5                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap8073                      
                                           |  I = 3                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap9177                      
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap9987                      
                                           |  I = 5                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap10263                     
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire14911                        
                                           |  I = 3                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap17142                     
                                           |  I = 5                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  A1 = 8                                   
                                           |  A2 = 7                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  A1 = 6                                   
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  A1 = 8                                   
                                           |  A2 = 10                                  
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  A1 = 8                                   
                                           |  A2 = 5                                   
                                           |  ZN = 7                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  A1 = 4                                   
                                           |  A2 = 9                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 7                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 10                                  
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 10                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 11                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 9                                   
                                           |  A2 = 4                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 5                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 8                                   
                                           |  A2 = 7                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 11                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 10                                  
                                           |  A2 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 8                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 11                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 2                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 11                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 6                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 7                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 9                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 8                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 7                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 6                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 5                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 10                                  
                                           |  A2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 9                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.arb_data_ou 
                                           |  A1 = 4                                   
                                           |  A2 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.arb_data_ou 
                                           |  A1 = 8                                   
                                           |  A2 = 11                                  
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.arb_data_ou 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.arb_data_ou 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.arb_data_ou 
                                           |  A1 = 4                                   
                                           |  A2 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.arb_data_ou 
                                           |  A1 = 6                                   
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.arb_data_ou 
                                           |  A1 = 7                                   
                                           |  A2 = 3                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.arb_data_ou 
                                           |  A1 = 7                                   
                                           |  A2 = 5                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 10                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.gen_square[ 
                                           |  A1 = 9                                   
                                           |  A2 = 9                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 5                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 2                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 6                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.arb_data_ou 
                                           |  A1 = 4                                   
                                           |  A2 = 7                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.arb_data_ou 
                                           |  A1 = 6                                   
                                           |  A2 = 10                                  
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.arb_data_ou 
                                           |  A1 = 4                                   
                                           |  A2 = 2                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.arb_data_ou 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.arb_data_ou 
                                           |  A1 = 8                                   
                                           |  A2 = 11                                  
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.arb_data_ou 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.arb_data_ou 
                                           |  A1 = 9                                   
                                           |  A2 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 8                                   
                                           |  A2 = 11                                  
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 10                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 9                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 10                                  
                                           |  A2 = 11                                  
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 11                                  
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 2                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 7                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 4                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 7                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 3                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 8                                   
                                           |  A2 = 3                                   
                                           |  ZN = 7                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 9                                   
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 9                                   
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 4                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 2                                   
                                           |  A2 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 10                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 11                                  
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 4                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 4                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 11                                  
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 6                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 8                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 5                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 2                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 10                                  
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 5                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 5                                   
                                           |  A2 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 9                                   
                                           |  A2 = 3                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 6                                   
                                           |  A2 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 5                                   
                                           |  A2 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 8                                   
                                           |  A2 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 7                                   
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 9                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 7                                   
                                           |  A2 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 3                                   
                                           |  A2 = 8                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 4                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 6                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 7                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 11                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 11                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 9                                   
                                           |  A2 = 3                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 7                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 8                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 8                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 8                                   
                                           |  A2 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 11                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 11                                  
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 7                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 7                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 3                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 10                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 2                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 2                                   
                                           |  A2 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 4                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 8                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 7                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 6                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 6                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 2                                   
                                           |  A2 = 2                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 8                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 4                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 6                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 5                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 12                                  
                                           |  A2 = 11                                  
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 12                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 10                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 11                                  
                                           |  ZN = 7                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 3                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 6                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 3                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 11                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 9                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 11                                  
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 11                                  
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 7                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 6                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 10                                  
                                           |  A2 = 11                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 7                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 7                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 3                                   
                                           |  A2 = 7                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 4                                   
                                           |  A2 = 11                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 2                                   
                                           |  A2 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 6                                   
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 3                                   
                                           |  A2 = 4                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 6                                   
                                           |  A2 = 4                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 4                                   
                                           |  A2 = 11                                  
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 8                                   
                                           |  A2 = 11                                  
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 7                                   
                                           |  A2 = 11                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 8                                   
                                           |  A2 = 3                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 9                                   
                                           |  A2 = 7                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 10                                  
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 4                                   
                                           |  A2 = 5                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 7                                   
                                           |  A2 = 10                                  
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 9                                   
                                           |  A2 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 3                                   
                                           |  A2 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 9                                   
                                           |  A2 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 4                                   
                                           |  A2 = 6                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 6                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 8                                   
                                           |  A2 = 11                                  
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 6                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 6                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 8                                   
                                           |  A2 = 4                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 11                                  
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 8                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 8                                   
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 4                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 11                                  
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 6                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 4                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 4                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 5                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 6                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 4                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 8                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 11                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 7                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.arb_data_ou 
                                           |  A1 = 6                                   
                                           |  A2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.arb_data_ou 
                                           |  A1 = 8                                   
                                           |  A2 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.arb_data_ou 
                                           |  A1 = 3                                   
                                           |  A2 = 8                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 2                                   
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 7                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 10                                  
                                           |  A2 = 11                                  
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 2                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 10                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 10                                  
                                           |  A2 = 3                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 9                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 7                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 7                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 6                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 7                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 7                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 5                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  A1 = 5                                   
                                           |  A2 = 9                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  A1 = 3                                   
                                           |  A2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  A1 = 4                                   
                                           |  A2 = 9                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 9                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  A1 = 10                                  
                                           |  A2 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 11                                  
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 2                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 8                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 9                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 9                                   
                                           |  A2 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 11                                  
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 11                                  
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 8                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 10                                  
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 2                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 3                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 8                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 3                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 7                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 11                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 10                                  
                                           |  A2 = 3                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 10                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 10                                  
                                           |  A2 = 10                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 11                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 11                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 11                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 2                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 4                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 10                                  
                                           |  A2 = 7                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 10                                  
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.arb_data_ou 
                                           |  A1 = 6                                   
                                           |  A2 = 9                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.arb_data_ou 
                                           |  A1 = 5                                   
                                           |  A2 = 7                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.arb_data_ou 
                                           |  A1 = 7                                   
                                           |  A2 = 11                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 5                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 8                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 8                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 9                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 9                                   
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 10                                  
                                           |  A2 = 11                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 3                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 5                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 8                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 3                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 11                                  
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 5                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 9                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 8                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 4                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 7                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 11                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 4                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 4                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 2                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  ZN = 7                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 3                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 7                                   
                                           |  ZN = 8                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 4                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 4                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 4                                   
                                           |  A2 = 9                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 7                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 7                                   
                                           |  A2 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 11                                  
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 9                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  A3 = 11                                  
                                           |  B = 5                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 11                                  
                                           |  A3 = 7                                   
                                           |  B = 5                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 6                                   
                                           |  A3 = 2                                   
                                           |  B = 3                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  A3 = 2                                   
                                           |  B = 7                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 10                                  
                                           |  A2 = 10                                  
                                           |  A3 = 11                                  
                                           |  B = 6                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 7                                   
                                           |  A3 = 6                                   
                                           |  B = 4                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  A3 = 2                                   
                                           |  B = 4                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  A3 = 3                                   
                                           |  B = 9                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  A3 = 2                                   
                                           |  B = 11                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  A3 = 3                                   
                                           |  B = 9                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 2                                   
                                           |  A2 = 10                                  
                                           |  A3 = 8                                   
                                           |  B = 5                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 10                                  
                                           |  A3 = 2                                   
                                           |  B = 2                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 6                                   
                                           |  A3 = 2                                   
                                           |  B = 5                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 3                                   
                                           |  A3 = 2                                   
                                           |  B = 5                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 8                                   
                                           |  A3 = 3                                   
                                           |  B = 5                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 8                                   
                                           |  A3 = 3                                   
                                           |  B = 11                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 10                                  
                                           |  A2 = 11                                  
                                           |  A3 = 2                                   
                                           |  B = 8                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 8                                   
                                           |  A3 = 3                                   
                                           |  B = 5                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 7                                   
                                           |  A3 = 6                                   
                                           |  B = 5                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 4                                   
                                           |  A3 = 2                                   
                                           |  B = 5                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 11                                  
                                           |  A3 = 2                                   
                                           |  B = 6                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 10                                  
                                           |  A3 = 4                                   
                                           |  B = 4                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  A3 = 2                                   
                                           |  B = 3                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 10                                  
                                           |  A3 = 3                                   
                                           |  B = 5                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 10                                  
                                           |  A3 = 4                                   
                                           |  B = 10                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  A3 = 2                                   
                                           |  B = 2                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  A3 = 2                                   
                                           |  B = 6                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 2                                   
                                           |  A3 = 6                                   
                                           |  B = 6                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 6                                   
                                           |  A3 = 4                                   
                                           |  B = 2                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  A3 = 4                                   
                                           |  B = 7                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 8                                   
                                           |  A3 = 4                                   
                                           |  B = 6                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  A3 = 2                                   
                                           |  B = 6                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 10                                  
                                           |  A2 = 5                                   
                                           |  A3 = 4                                   
                                           |  B = 5                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  A3 = 3                                   
                                           |  B = 4                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 10                                  
                                           |  A3 = 3                                   
                                           |  B = 8                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  A3 = 2                                   
                                           |  B = 9                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  A3 = 3                                   
                                           |  B = 2                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  A3 = 5                                   
                                           |  B = 2                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 4                                   
                                           |  A2 = 5                                   
                                           |  A3 = 6                                   
                                           |  B = 7                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  A3 = 2                                   
                                           |  B = 9                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 6                                   
                                           |  A3 = 5                                   
                                           |  B = 5                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 10                                  
                                           |  A3 = 3                                   
                                           |  B = 4                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 11                                  
                                           |  A3 = 2                                   
                                           |  B = 8                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 6                                   
                                           |  A3 = 7                                   
                                           |  B = 2                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 6                                   
                                           |  A3 = 3                                   
                                           |  B = 11                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  A3 = 3                                   
                                           |  B = 2                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  A3 = 5                                   
                                           |  B = 2                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  A3 = 3                                   
                                           |  B = 5                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  A3 = 3                                   
                                           |  B = 5                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 5                                   
                                           |  A3 = 5                                   
                                           |  B = 3                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 8                                   
                                           |  A3 = 5                                   
                                           |  B = 3                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 8                                   
                                           |  A2 = 5                                   
                                           |  A3 = 3                                   
                                           |  B = 4                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  A3 = 2                                   
                                           |  B = 8                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  A3 = 6                                   
                                           |  B = 11                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 11                                  
                                           |  A3 = 3                                   
                                           |  B = 6                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 4                                   
                                           |  A3 = 6                                   
                                           |  B = 2                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  A3 = 4                                   
                                           |  B = 7                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  A3 = 3                                   
                                           |  B = 6                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 8                                   
                                           |  A2 = 9                                   
                                           |  A3 = 4                                   
                                           |  B = 2                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 9                                   
                                           |  A3 = 3                                   
                                           |  B = 5                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 4                                   
                                           |  A3 = 5                                   
                                           |  B = 5                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 10                                  
                                           |  A3 = 2                                   
                                           |  B = 5                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 7                                   
                                           |  A3 = 5                                   
                                           |  B = 5                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 5                                   
                                           |  A3 = 2                                   
                                           |  B = 10                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  A3 = 6                                   
                                           |  B = 4                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  A3 = 5                                   
                                           |  B = 3                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 5                                   
                                           |  A3 = 2                                   
                                           |  B = 3                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  A3 = 2                                   
                                           |  B = 10                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  A3 = 2                                   
                                           |  B = 7                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  A3 = 3                                   
                                           |  B = 7                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  A3 = 4                                   
                                           |  B = 6                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 11                                  
                                           |  A3 = 3                                   
                                           |  B = 7                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 11                                  
                                           |  A3 = 4                                   
                                           |  B = 2                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 6                                   
                                           |  A3 = 4                                   
                                           |  B = 11                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 6                                   
                                           |  A3 = 2                                   
                                           |  B = 2                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.arb_data_ou 
                                           |  A1 = 9                                   
                                           |  A2 = 7                                   
                                           |  A3 = 4                                   
                                           |  B = 3                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  A3 = 3                                   
                                           |  B = 2                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 10                                  
                                           |  A3 = 5                                   
                                           |  B = 2                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 3                                   
                                           |  A3 = 5                                   
                                           |  B = 2                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  A3 = 2                                   
                                           |  B = 5                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 9                                   
                                           |  A2 = 10                                  
                                           |  A3 = 4                                   
                                           |  B = 2                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 7                                   
                                           |  A3 = 3                                   
                                           |  B = 2                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  I = 6                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  I = 6                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 6                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 6                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 11                                   
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  I = 5                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  I = 10                                   
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  I = 6                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  I = 8                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap9465                      
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap9748                      
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire9814                         
                                           |  I = 3                                    
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap10508                     
                                           |  I = 4                                    
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire10509                        
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire10750                        
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap10753                     
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap10855                     
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire11812                        
                                           |  I = 2                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire11990                        
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap12015                     
                                           |  I = 4                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap12016                     
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap12019                     
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire12251                        
                                           |  I = 2                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire12325                        
                                           |  I = 2                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap12358                     
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap12392                     
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap12416                     
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap12631                     
                                           |  I = 5                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire12634                        
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire12635                        
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap12647                     
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire12663                        
                                           |  I = 2                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire12695                        
                                           |  I = 2                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap12729                     
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap12795                     
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap12814                     
                                           |  I = 3                                    
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap12926                     
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire12945                        
                                           |  I = 2                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap13247                     
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap13895                     
                                           |  I = 4                                    
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap13896                     
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap13897                     
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap13898                     
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire14100                        
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap14399                     
                                           |  I = 5                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap14400                     
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire14418                        
                                           |  I = 2                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap14436                     
                                           |  I = 4                                    
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire14443                        
                                           |  I = 2                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap14456                     
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire14492                        
                                           |  I = 2                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire14571                        
                                           |  I = 2                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire14893                        
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap14908                     
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap15010                     
                                           |  I = 4                                    
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap15046                     
                                           |  I = 4                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire15074                        
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap15287                     
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap15288                     
                                           |  I = 4                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap15424                     
                                           |  I = 3                                    
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap15425                     
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap15491                     
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap15492                     
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap15493                     
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire15564                        
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap16061                     
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap16318                     
                                           |  I = 4                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap12763                     
                                           |  I = 4                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire16426                        
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire1759                         
                                           |  I = 2                                    
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap13651                     
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap14709                     
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap16913                     
                                           |  I = 4                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  A1 = 4                                   
                                           |  A2 = 5                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  A1 = 7                                   
                                           |  A2 = 3                                   
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  A1 = 4                                   
                                           |  A2 = 9                                   
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 7                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 2                                   
                                           |  Z = 8                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 7                                   
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 8                                   
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 9                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 11                                  
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 5                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 2                                   
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 4                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  Z = 9                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 11                                  
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 8                                   
                                           |  Z = 9                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 7                                   
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 11                                  
                                           |  Z = 8                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 7                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 8                                   
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 6                                   
                                           |  Z = 8                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.arb_data_ou 
                                           |  A1 = 7                                   
                                           |  A2 = 3                                   
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 10                                  
                                           |  A2 = 3                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 9                                   
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 11                                  
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 3                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 11                                  
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 4                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 10                                  
                                           |  A2 = 4                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 9                                   
                                           |  A2 = 3                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 6                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 7                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 4                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 11                                  
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 6                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 8                                   
                                           |  Z = 8                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 10                                  
                                           |  Z = 8                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 4                                   
                                           |  A2 = 4                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 6                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 3                                   
                                           |  A2 = 4                                   
                                           |  Z = 9                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 10                                  
                                           |  A2 = 11                                  
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 7                                   
                                           |  Z = 10                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 7                                   
                                           |  Z = 8                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 9                                   
                                           |  A2 = 11                                  
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 5                                   
                                           |  Z = 10                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 2                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 3                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 4                                   
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 11                                  
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 6                                   
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 6                                   
                                           |  Z = 10                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 8                                   
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 4                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 9                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 11                                  
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 7                                   
                                           |  Z = 8                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 7                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 11                                  
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 7                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 9                                   
                                           |  A2 = 11                                  
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 9                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 11                                  
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 6                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 8                                   
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 4                                   
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  Z = 10                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 10                                  
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 11                                  
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 3                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 4                                   
                                           |  Z = 10                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 5                                   
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 2                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 11                                  
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.arb_data_ou 
                                           |  A1 = 5                                   
                                           |  A2 = 2                                   
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 8                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  Z = 10                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 7                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 10                                  
                                           |  A2 = 11                                  
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 8                                   
                                           |  Z = 8                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 4                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 10                                  
                                           |  A2 = 10                                  
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 4                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 5                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 4                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 10                                  
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 9                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  A1 = 9                                   
                                           |  A2 = 11                                  
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  A1 = 8                                   
                                           |  A2 = 10                                  
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  A1 = 8                                   
                                           |  A2 = 9                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  A1 = 2                                   
                                           |  A2 = 2                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 6                                   
                                           |  Z = 8                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  Z = 8                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 8                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 5                                   
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 8                                   
                                           |  A2 = 4                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 2                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 2                                   
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 11                                  
                                           |  Z = 9                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 10                                  
                                           |  A2 = 7                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 3                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 11                                  
                                           |  Z = 8                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 4                                   
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 11                                  
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 10                                  
                                           |  A2 = 4                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 7                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 3                                   
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 8                                   
                                           |  A2 = 11                                  
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 7                                   
                                           |  Z = 10                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 8                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 6                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 2                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 9                                   
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 7                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 2                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 3                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.arb_data_ou 
                                           |  A1 = 7                                   
                                           |  A2 = 2                                   
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 4                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 2                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 11                                  
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  A3 = 6                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  A3 = 10                                  
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 8                                   
                                           |  A3 = 5                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 7                                   
                                           |  A3 = 6                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 6                                   
                                           |  A3 = 10                                  
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 5                                   
                                           |  A3 = 3                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 8                                   
                                           |  A3 = 6                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 3                                   
                                           |  A3 = 3                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  A3 = 5                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 4                                   
                                           |  A3 = 4                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 4                                   
                                           |  A3 = 3                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 7                                   
                                           |  A3 = 4                                   
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  A3 = 4                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  A3 = 11                                  
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  A3 = 11                                  
                                           |  Z = 9                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 10                                  
                                           |  A2 = 6                                   
                                           |  A3 = 4                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  A3 = 4                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  A3 = 7                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 3                                   
                                           |  A3 = 4                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 8                                   
                                           |  A3 = 3                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 7                                   
                                           |  A3 = 3                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 5                                   
                                           |  A3 = 4                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 4                                   
                                           |  A3 = 4                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 8                                   
                                           |  A3 = 11                                  
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 8                                   
                                           |  A2 = 6                                   
                                           |  A3 = 6                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  A3 = 4                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 8                                   
                                           |  A2 = 10                                  
                                           |  A3 = 4                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 5                                   
                                           |  A3 = 4                                   
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 5                                   
                                           |  A3 = 4                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 10                                  
                                           |  A3 = 8                                   
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 6                                   
                                           |  A3 = 2                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 6                                   
                                           |  A3 = 5                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 2                                   
                                           |  A2 = 3                                   
                                           |  A3 = 2                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  A3 = 4                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 9                                   
                                           |  A3 = 11                                  
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 7                                   
                                           |  A3 = 2                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  A3 = 5                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  A3 = 7                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  A3 = 6                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  A1 = 7                                   
                                           |  A2 = 6                                   
                                           |  A3 = 8                                   
                                           |  A4 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  A1 = 9                                   
                                           |  A2 = 3                                   
                                           |  A3 = 7                                   
                                           |  A4 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  A1 = 9                                   
                                           |  A2 = 4                                   
                                           |  A3 = 9                                   
                                           |  A4 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 6                                   
                                           |  A3 = 5                                   
                                           |  A4 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  A3 = 5                                   
                                           |  A4 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 6                                   
                                           |  A3 = 7                                   
                                           |  A4 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 7                                   
                                           |  A3 = 11                                  
                                           |  A4 = 7                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 2                                   
                                           |  A2 = 3                                   
                                           |  A3 = 2                                   
                                           |  A4 = 3                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 6                                   
                                           |  A3 = 4                                   
                                           |  A4 = 6                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 2                                   
                                           |  A2 = 2                                   
                                           |  A3 = 2                                   
                                           |  A4 = 2                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 9                                   
                                           |  A3 = 9                                   
                                           |  A4 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.arb_data_ou 
                                           |  A1 = 7                                   
                                           |  A2 = 5                                   
                                           |  A3 = 7                                   
                                           |  A4 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.arb_data_ou 
                                           |  A1 = 9                                   
                                           |  A2 = 6                                   
                                           |  A3 = 7                                   
                                           |  A4 = 7                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.arb_data_ou 
                                           |  A1 = 9                                   
                                           |  A2 = 3                                   
                                           |  A3 = 11                                  
                                           |  A4 = 5                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  A3 = 7                                   
                                           |  A4 = 6                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  A3 = 4                                   
                                           |  A4 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 6                                   
                                           |  A3 = 3                                   
                                           |  A4 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 6                                   
                                           |  A3 = 7                                   
                                           |  A4 = 7                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  A3 = 3                                   
                                           |  A4 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  A3 = 11                                  
                                           |  A4 = 6                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 5                                   
                                           |  A3 = 7                                   
                                           |  A4 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 8                                   
                                           |  A3 = 3                                   
                                           |  A4 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  A3 = 4                                   
                                           |  A4 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.arb_data_ou 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  A3 = 9                                   
                                           |  A4 = 7                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 9                                   
                                           |  A3 = 7                                   
                                           |  A4 = 9                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 10                                  
                                           |  A2 = 4                                   
                                           |  A3 = 11                                  
                                           |  A4 = 8                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 6                                   
                                           |  A3 = 11                                  
                                           |  A4 = 5                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  A3 = 10                                  
                                           |  A4 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  A3 = 10                                  
                                           |  A4 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  A3 = 5                                   
                                           |  A4 = 9                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 10                                  
                                           |  A2 = 3                                   
                                           |  A3 = 11                                  
                                           |  A4 = 8                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 7                                   
                                           |  A3 = 11                                  
                                           |  A4 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 10                                  
                                           |  A2 = 3                                   
                                           |  A3 = 11                                  
                                           |  A4 = 10                                  
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 10                                  
                                           |  A2 = 3                                   
                                           |  A3 = 11                                  
                                           |  A4 = 6                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 7                                   
                                           |  A3 = 9                                   
                                           |  A4 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 5                                   
                                           |  A3 = 4                                   
                                           |  A4 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  A3 = 11                                  
                                           |  A4 = 7                                   
                                           |  ZN = 7                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 4                                   
                                           |  A3 = 6                                   
                                           |  A4 = 11                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  A3 = 11                                  
                                           |  A4 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 10                                  
                                           |  A3 = 8                                   
                                           |  A4 = 11                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 6                                   
                                           |  A3 = 9                                   
                                           |  A4 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  A3 = 9                                   
                                           |  A4 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 6                                   
                                           |  A2 = 4                                   
                                           |  A3 = 10                                  
                                           |  A4 = 7                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 6                                   
                                           |  A2 = 4                                   
                                           |  A3 = 11                                  
                                           |  A4 = 7                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  A3 = 11                                  
                                           |  A4 = 6                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  A3 = 3                                   
                                           |  A4 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 8                                   
                                           |  A3 = 11                                  
                                           |  A4 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  A3 = 5                                   
                                           |  A4 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 8                                   
                                           |  A2 = 8                                   
                                           |  A3 = 6                                   
                                           |  A4 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 9                                   
                                           |  A2 = 6                                   
                                           |  A3 = 11                                  
                                           |  A4 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 6                                   
                                           |  A3 = 4                                   
                                           |  A4 = 7                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 5                                   
                                           |  A3 = 5                                   
                                           |  A4 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  A3 = 11                                  
                                           |  A4 = 7                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  A3 = 9                                   
                                           |  A4 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  A3 = 6                                   
                                           |  A4 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  A3 = 5                                   
                                           |  A4 = 11                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  A3 = 11                                  
                                           |  A4 = 5                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  A1 = 9                                   
                                           |  A2 = 3                                   
                                           |  A3 = 9                                   
                                           |  A4 = 6                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 8                                   
                                           |  A3 = 4                                   
                                           |  A4 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 9                                   
                                           |  A2 = 6                                   
                                           |  A3 = 6                                   
                                           |  A4 = 6                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 9                                   
                                           |  A2 = 6                                   
                                           |  A3 = 8                                   
                                           |  A4 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  A3 = 11                                  
                                           |  A4 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  A3 = 5                                   
                                           |  A4 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 6                                   
                                           |  A3 = 9                                   
                                           |  A4 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  A3 = 11                                  
                                           |  A4 = 9                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 5                                   
                                           |  A3 = 11                                  
                                           |  A4 = 8                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  A3 = 6                                   
                                           |  A4 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 2                                   
                                           |  A3 = 11                                  
                                           |  A4 = 7                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  A3 = 7                                   
                                           |  A4 = 7                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  A3 = 6                                   
                                           |  A4 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 3                                   
                                           |  A3 = 3                                   
                                           |  A4 = 5                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  A3 = 10                                  
                                           |  A4 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.arb_data_ou 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  A3 = 5                                   
                                           |  A4 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 4                                   
                                           |  A3 = 11                                  
                                           |  A4 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  A3 = 11                                  
                                           |  A4 = 4                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 11                                  
                                           |  A3 = 8                                   
                                           |  A4 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 7                                   
                                           |  A3 = 9                                   
                                           |  A4 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 7                                   
                                           |  A3 = 11                                  
                                           |  A4 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  A3 = 6                                   
                                           |  A4 = 9                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 2                                   
                                           |  A3 = 4                                   
                                           |  A4 = 7                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 9                                   
                                           |  A2 = 4                                   
                                           |  A3 = 11                                  
                                           |  A4 = 7                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  A3 = 11                                  
                                           |  A4 = 5                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  B1 = 4                                   
                                           |  B2 = 2                                   
                                           |  C = 3                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  B1 = 3                                   
                                           |  B2 = 7                                   
                                           |  C = 3                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 2                                   
                                           |  B1 = 4                                   
                                           |  B2 = 3                                   
                                           |  C = 2                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 10                                  
                                           |  A2 = 6                                   
                                           |  B1 = 3                                   
                                           |  B2 = 9                                   
                                           |  C = 4                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 2                                   
                                           |  A2 = 5                                   
                                           |  B1 = 3                                   
                                           |  B2 = 2                                   
                                           |  C = 3                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 11                                  
                                           |  B1 = 2                                   
                                           |  B2 = 2                                   
                                           |  C = 4                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 8                                   
                                           |  B1 = 7                                   
                                           |  B2 = 3                                   
                                           |  C = 5                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 3                                   
                                           |  C = 9                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 8                                   
                                           |  A2 = 4                                   
                                           |  B1 = 3                                   
                                           |  B2 = 2                                   
                                           |  C = 9                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  B1 = 3                                   
                                           |  B2 = 3                                   
                                           |  C = 5                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 6                                   
                                           |  B1 = 6                                   
                                           |  B2 = 5                                   
                                           |  C = 5                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 9                                   
                                           |  B1 = 5                                   
                                           |  B2 = 9                                   
                                           |  C = 2                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 6                                   
                                           |  B1 = 5                                   
                                           |  B2 = 8                                   
                                           |  C = 3                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 2                                   
                                           |  A2 = 3                                   
                                           |  B1 = 4                                   
                                           |  B2 = 3                                   
                                           |  C = 2                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 7                                   
                                           |  B1 = 7                                   
                                           |  B2 = 5                                   
                                           |  C = 4                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 2                                   
                                           |  A2 = 4                                   
                                           |  B1 = 4                                   
                                           |  B2 = 2                                   
                                           |  C = 3                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 2                                   
                                           |  A2 = 4                                   
                                           |  B1 = 4                                   
                                           |  B2 = 2                                   
                                           |  C = 3                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 6                                   
                                           |  B1 = 6                                   
                                           |  B2 = 3                                   
                                           |  C = 8                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  B1 = 4                                   
                                           |  B2 = 4                                   
                                           |  C = 2                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 7                                   
                                           |  B1 = 6                                   
                                           |  B2 = 2                                   
                                           |  C = 5                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  B1 = 3                                   
                                           |  B2 = 4                                   
                                           |  C = 3                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 11                                  
                                           |  B1 = 7                                   
                                           |  B2 = 2                                   
                                           |  C = 5                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 8                                   
                                           |  B1 = 8                                   
                                           |  B2 = 2                                   
                                           |  C = 4                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 11                                  
                                           |  B1 = 4                                   
                                           |  B2 = 4                                   
                                           |  C = 3                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  B1 = 2                                   
                                           |  B2 = 2                                   
                                           |  C = 3                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 3                                   
                                           |  B1 = 2                                   
                                           |  B2 = 2                                   
                                           |  C = 2                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 4                                   
                                           |  B1 = 7                                   
                                           |  B2 = 3                                   
                                           |  C = 5                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  B1 = 3                                   
                                           |  B2 = 5                                   
                                           |  C = 6                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 4                                   
                                           |  B1 = 6                                   
                                           |  B2 = 2                                   
                                           |  C = 3                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 8                                   
                                           |  B1 = 6                                   
                                           |  B2 = 3                                   
                                           |  C = 4                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 7                                   
                                           |  B1 = 3                                   
                                           |  B2 = 2                                   
                                           |  C = 4                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 2                                   
                                           |  C = 2                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 9                                   
                                           |  B1 = 4                                   
                                           |  B2 = 3                                   
                                           |  C = 2                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  B1 = 4                                   
                                           |  B2 = 11                                  
                                           |  C = 5                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 6                                   
                                           |  B1 = 6                                   
                                           |  B2 = 6                                   
                                           |  C = 5                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.arb_data_ou 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  B1 = 4                                   
                                           |  B2 = 4                                   
                                           |  C = 5                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 8                                   
                                           |  B1 = 4                                   
                                           |  B2 = 5                                   
                                           |  C = 5                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  I = 5                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  I = 2                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  I = 5                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  I = 5                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  I = 5                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  I = 3                                    
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  I = 2                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  I = 6                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  I = 6                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  I = 5                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  I = 6                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  I = 7                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  I = 8                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  I = 8                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  I = 6                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  I = 6                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.arb_data_ou 
                                           |  I = 8                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.gen_square[ 
                                           |  I = 7                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  I = 11                                   
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  I = 11                                   
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  I = 8                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  I = 9                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  I = 8                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  I = 8                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  I = 11                                   
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  I = 8                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  I = 8                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  I = 6                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  I = 6                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  I = 8                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  I = 5                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 8                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 7                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 7                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 6                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 6                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 5                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 5                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 3                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 6                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 6                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 6                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 6                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 5                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 5                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 5                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  I = 7                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  I = 6                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  I = 8                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  I = 8                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  I = 7                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  I = 7                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.arb_data_ou 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  I = 7                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 2                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 6                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 6                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 6                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 6                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 6                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 6                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 6                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  I = 11                                   
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  I = 7                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  I = 6                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  I = 6                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  I = 11                                   
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  I = 11                                   
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  I = 11                                   
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  I = 6                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  I = 6                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  I = 11                                   
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  I = 5                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  I = 11                                   
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  I = 8                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 11                                   
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 10                                   
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 7                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 10                                   
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 11                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 2                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 7                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  I = 6                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  I = 7                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  I = 2                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  I = 11                                   
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire2697                         
                                           |  I = 3                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire2871                         
                                           |  I = 2                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap3247                      
                                           |  I = 3                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire3254                         
                                           |  I = 2                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire3449                         
                                           |  I = 2                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire4727                         
                                           |  I = 2                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire4799                         
                                           |  I = 2                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire4825                         
                                           |  I = 3                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire5142                         
                                           |  I = 2                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire5327                         
                                           |  I = 2                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire5674                         
                                           |  I = 2                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire5727                         
                                           |  I = 2                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire5802                         
                                           |  I = 2                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire5887                         
                                           |  I = 2                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire5944                         
                                           |  I = 2                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire6079                         
                                           |  I = 2                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire6481                         
                                           |  I = 2                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap6639                      
                                           |  I = 3                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap7063                      
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire7075                         
                                           |  I = 3                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap7294                      
                                           |  I = 4                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire7296                         
                                           |  I = 3                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire7593                         
                                           |  I = 2                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire7662                         
                                           |  I = 5                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire7832                         
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap8047                      
                                           |  I = 3                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap8054                      
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap8355                      
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire8356                         
                                           |  I = 2                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire8366                         
                                           |  I = 2                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire8379                         
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap8395                      
                                           |  I = 5                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire8474                         
                                           |  I = 2                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire8551                         
                                           |  I = 2                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire8704                         
                                           |  I = 6                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire9037                         
                                           |  I = 3                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire9131                         
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire9267                         
                                           |  I = 2                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire9343                         
                                           |  I = 2                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap9757                      
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap9790                      
                                           |  I = 3                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire9793                         
                                           |  I = 2                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap9813                      
                                           |  I = 5                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire10129                        
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap10169                     
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap10262                     
                                           |  I = 4                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire10482                        
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap10529                     
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire10533                        
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap10555                     
                                           |  I = 3                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire10559                        
                                           |  I = 3                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap10560                     
                                           |  I = 6                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire10578                        
                                           |  I = 2                                    
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire10614                        
                                           |  I = 4                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire10706                        
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap11129                     
                                           |  I = 6                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire11253                        
                                           |  I = 2                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap11481                     
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire11700                        
                                           |  I = 5                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire11991                        
                                           |  I = 2                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire12178                        
                                           |  I = 2                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire12184                        
                                           |  I = 2                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire12187                        
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire12351                        
                                           |  I = 6                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap12502                     
                                           |  I = 5                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire12540                        
                                           |  I = 2                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap12551                     
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap12586                     
                                           |  I = 6                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap12817                     
                                           |  I = 5                                    
                                           |  Z = 8                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap12971                     
                                           |  I = 3                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap13279                     
                                           |  I = 5                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire13282                        
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire13379                        
                                           |  I = 2                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire13390                        
                                           |  I = 2                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap13533                     
                                           |  I = 6                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire14584                        
                                           |  I = 2                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire15569                        
                                           |  I = 2                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire15588                        
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire16264                        
                                           |  I = 4                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire16267                        
                                           |  I = 2                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap16752                     
                                           |  I = 6                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap16873                     
                                           |  I = 5                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap17061                     
                                           |  I = 4                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap17089                     
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap17236                     
                                           |  I = 6                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap17325                     
                                           |  I = 5                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap17432                     
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap17476                     
                                           |  I = 4                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: fanout20218                      
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap11268                     
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire16126                        
                                           |  I = 3                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap16655                     
                                           |  I = 4                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap17088                     
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  I = 6                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.arb_data_ou 
                                           |  I = 4                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  I = 7                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 6                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 7                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 8                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 2                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire5074                         
                                           |  I = 2                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap5893                      
                                           |  I = 4                                    
                                           |  Z = 9                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap6666                      
                                           |  I = 4                                    
                                           |  Z = 9                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap7449                      
                                           |  I = 3                                    
                                           |  Z = 10                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap7576                      
                                           |  I = 4                                    
                                           |  Z = 9                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap7706                      
                                           |  I = 4                                    
                                           |  Z = 9                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire8126                         
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire8127                         
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire8336                         
                                           |  I = 5                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap8481                      
                                           |  I = 3                                    
                                           |  Z = 10                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap8489                      
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap8542                      
                                           |  I = 3                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap9180                      
                                           |  I = 5                                    
                                           |  Z = 8                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire9334                         
                                           |  I = 3                                    
                                           |  Z = 10                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire9781                         
                                           |  I = 3                                    
                                           |  Z = 10                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap9791                      
                                           |  I = 7                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap9804                      
                                           |  I = 4                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire9822                         
                                           |  I = 2                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap9945                      
                                           |  I = 7                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap10135                     
                                           |  I = 5                                    
                                           |  Z = 8                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap10480                     
                                           |  I = 5                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire10558                        
                                           |  I = 4                                    
                                           |  Z = 8                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap10635                     
                                           |  I = 5                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire10653                        
                                           |  I = 4                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap10656                     
                                           |  I = 4                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap10659                     
                                           |  I = 8                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap10696                     
                                           |  I = 4                                    
                                           |  Z = 9                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap10833                     
                                           |  I = 4                                    
                                           |  Z = 9                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap10841                     
                                           |  I = 6                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap11188                     
                                           |  I = 5                                    
                                           |  Z = 8                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap11197                     
                                           |  I = 5                                    
                                           |  Z = 8                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap11222                     
                                           |  I = 6                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire11462                        
                                           |  I = 2                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap11477                     
                                           |  I = 4                                    
                                           |  Z = 9                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap11702                     
                                           |  I = 5                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap11781                     
                                           |  I = 4                                    
                                           |  Z = 9                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire12034                        
                                           |  I = 4                                    
                                           |  Z = 8                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap12094                     
                                           |  I = 6                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire12135                        
                                           |  I = 5                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap12482                     
                                           |  I = 6                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire12483                        
                                           |  I = 4                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap12898                     
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire12942                        
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap13235                     
                                           |  I = 3                                    
                                           |  Z = 10                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap13336                     
                                           |  I = 5                                    
                                           |  Z = 8                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire13556                        
                                           |  I = 4                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap13580                     
                                           |  I = 4                                    
                                           |  Z = 9                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap13889                     
                                           |  I = 4                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire13906                        
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap13911                     
                                           |  I = 5                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap13944                     
                                           |  I = 7                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap13945                     
                                           |  I = 5                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap13948                     
                                           |  I = 3                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap14048                     
                                           |  I = 5                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap14073                     
                                           |  I = 4                                    
                                           |  Z = 8                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire14096                        
                                           |  I = 6                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap14240                     
                                           |  I = 5                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire14255                        
                                           |  I = 5                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire14256                        
                                           |  I = 5                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap14277                     
                                           |  I = 5                                    
                                           |  Z = 8                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap14417                     
                                           |  I = 6                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire14423                        
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire14426                        
                                           |  I = 4                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire14427                        
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire14488                        
                                           |  I = 5                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap14574                     
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire14772                        
                                           |  I = 6                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire15192                        
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire15225                        
                                           |  I = 7                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap15226                     
                                           |  I = 3                                    
                                           |  Z = 8                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap15256                     
                                           |  I = 5                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire15268                        
                                           |  I = 4                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap15272                     
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire15277                        
                                           |  I = 3                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap15280                     
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap15283                     
                                           |  I = 6                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire15284                        
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap15285                     
                                           |  I = 6                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire15307                        
                                           |  I = 7                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap15319                     
                                           |  I = 5                                    
                                           |  Z = 8                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap15336                     
                                           |  I = 6                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap15337                     
                                           |  I = 3                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire15358                        
                                           |  I = 6                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap15377                     
                                           |  I = 5                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap15378                     
                                           |  I = 4                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap15379                     
                                           |  I = 5                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire15465                        
                                           |  I = 4                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire15466                        
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap15477                     
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire15479                        
                                           |  I = 5                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire15480                        
                                           |  I = 5                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap15499                     
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap15510                     
                                           |  I = 6                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire15526                        
                                           |  I = 4                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire15580                        
                                           |  I = 4                                    
                                           |  Z = 9                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap15581                     
                                           |  I = 6                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire15585                        
                                           |  I = 5                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap15586                     
                                           |  I = 5                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire15607                        
                                           |  I = 4                                    
                                           |  Z = 8                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire15638                        
                                           |  I = 6                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire15660                        
                                           |  I = 4                                    
                                           |  Z = 9                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap15706                     
                                           |  I = 3                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire15707                        
                                           |  I = 2                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire15739                        
                                           |  I = 7                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire15740                        
                                           |  I = 3                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire15778                        
                                           |  I = 4                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire15904                        
                                           |  I = 7                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire15971                        
                                           |  I = 6                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire15974                        
                                           |  I = 4                                    
                                           |  Z = 8                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire15981                        
                                           |  I = 5                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire15982                        
                                           |  I = 5                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire16015                        
                                           |  I = 6                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire16058                        
                                           |  I = 7                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire16085                        
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap16237                     
                                           |  I = 5                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire16240                        
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire16280                        
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap16370                     
                                           |  I = 6                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire16412                        
                                           |  I = 5                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap16417                     
                                           |  I = 5                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire16432                        
                                           |  I = 5                                    
                                           |  Z = 8                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap16451                     
                                           |  I = 7                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire16453                        
                                           |  I = 4                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire16454                        
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire16476                        
                                           |  I = 6                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap16479                     
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap16480                     
                                           |  I = 4                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap16576                     
                                           |  I = 6                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire16596                        
                                           |  I = 4                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire16609                        
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire16612                        
                                           |  I = 5                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire16659                        
                                           |  I = 3                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire16691                        
                                           |  I = 4                                    
                                           |  Z = 8                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire16718                        
                                           |  I = 3                                    
                                           |  Z = 8                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap16719                     
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap16884                     
                                           |  I = 3                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap16885                     
                                           |  I = 4                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap20516                     
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire13737                        
                                           |  I = 3                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire14243                        
                                           |  I = 5                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire13744                        
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire6252                         
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap9522                      
                                           |  I = 7                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap10407                     
                                           |  I = 6                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap14244                     
                                           |  I = 5                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap14428                     
                                           |  I = 6                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire15463                        
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire18503                        
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  A3 = 11                                  
                                           |  A4 = 11                                  
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 8                                   
                                           |  A3 = 5                                   
                                           |  A4 = 3                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 6                                   
                                           |  A3 = 3                                   
                                           |  A4 = 3                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 2                                   
                                           |  A3 = 3                                   
                                           |  A4 = 2                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 7                                   
                                           |  A3 = 8                                   
                                           |  A4 = 9                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  A1 = 6                                   
                                           |  A2 = 7                                   
                                           |  B1 = 5                                   
                                           |  B2 = 3                                   
                                           |  C1 = 3                                   
                                           |  C2 = 7                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  B1 = 4                                   
                                           |  B2 = 4                                   
                                           |  C1 = 3                                   
                                           |  C2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 6                                   
                                           |  B1 = 6                                   
                                           |  B2 = 8                                   
                                           |  C1 = 5                                   
                                           |  C2 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 8                                   
                                           |  B1 = 8                                   
                                           |  B2 = 5                                   
                                           |  C1 = 4                                   
                                           |  C2 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 9                                   
                                           |  B1 = 9                                   
                                           |  B2 = 5                                   
                                           |  C1 = 4                                   
                                           |  C2 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  B1 = 4                                   
                                           |  B2 = 6                                   
                                           |  C1 = 5                                   
                                           |  C2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 2                                   
                                           |  B1 = 4                                   
                                           |  B2 = 2                                   
                                           |  C1 = 3                                   
                                           |  C2 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  B1 = 4                                   
                                           |  B2 = 6                                   
                                           |  C1 = 3                                   
                                           |  C2 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  B1 = 2                                   
                                           |  B2 = 2                                   
                                           |  C1 = 7                                   
                                           |  C2 = 11                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 3                                   
                                           |  C1 = 3                                   
                                           |  C2 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 7                                   
                                           |  A2 = 8                                   
                                           |  B1 = 8                                   
                                           |  B2 = 8                                   
                                           |  C1 = 5                                   
                                           |  C2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  B1 = 5                                   
                                           |  B2 = 8                                   
                                           |  C1 = 5                                   
                                           |  C2 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 6                                   
                                           |  B1 = 6                                   
                                           |  B2 = 6                                   
                                           |  C1 = 5                                   
                                           |  C2 = 3                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 7                                   
                                           |  B1 = 6                                   
                                           |  B2 = 6                                   
                                           |  C1 = 5                                   
                                           |  C2 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  B1 = 4                                   
                                           |  B2 = 6                                   
                                           |  C1 = 3                                   
                                           |  C2 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 6                                   
                                           |  C1 = 3                                   
                                           |  C2 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 4                                   
                                           |  B1 = 6                                   
                                           |  B2 = 5                                   
                                           |  C1 = 5                                   
                                           |  C2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 7                                   
                                           |  B1 = 7                                   
                                           |  B2 = 5                                   
                                           |  C1 = 5                                   
                                           |  C2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 2                                   
                                           |  A2 = 2                                   
                                           |  B = 4                                    
                                           |  C = 8                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  B = 4                                    
                                           |  C = 11                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  B = 4                                    
                                           |  C = 11                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 9                                   
                                           |  A2 = 7                                   
                                           |  B = 3                                    
                                           |  C = 5                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 2                                   
                                           |  B = 6                                    
                                           |  C = 11                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 3                                   
                                           |  B = 3                                    
                                           |  C = 6                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.arb_data_ou 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  B = 5                                    
                                           |  C = 7                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.gen_square[ 
                                           |  A1 = 8                                   
                                           |  A2 = 5                                   
                                           |  B = 8                                    
                                           |  C = 9                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  B = 2                                    
                                           |  C = 5                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  B = 10                                   
                                           |  C = 5                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 8                                   
                                           |  B = 5                                    
                                           |  C = 4                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 5                                   
                                           |  B = 6                                    
                                           |  C = 7                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  B = 11                                   
                                           |  C = 5                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 7                                   
                                           |  B = 10                                   
                                           |  C = 11                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  B = 3                                    
                                           |  C = 2                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.arb_data_ou 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  B = 5                                    
                                           |  C = 5                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.arb_data_ou 
                                           |  A1 = 2                                   
                                           |  A2 = 2                                   
                                           |  B = 2                                    
                                           |  C = 5                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  B = 3                                    
                                           |  C = 4                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 6                                   
                                           |  B = 5                                    
                                           |  C = 5                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  B = 3                                    
                                           |  C = 10                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 10                                  
                                           |  A2 = 5                                   
                                           |  B = 9                                    
                                           |  C = 11                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 9                                   
                                           |  A2 = 11                                  
                                           |  B = 2                                    
                                           |  C = 11                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 2                                   
                                           |  A2 = 3                                   
                                           |  B = 5                                    
                                           |  C = 9                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 2                                   
                                           |  B = 5                                    
                                           |  C = 11                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 8                                   
                                           |  A2 = 4                                   
                                           |  B = 2                                    
                                           |  C = 11                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 4                                   
                                           |  B = 4                                    
                                           |  C = 5                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  B = 7                                    
                                           |  C = 5                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  B = 4                                    
                                           |  C = 11                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  B = 8                                    
                                           |  C = 2                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 5                                   
                                           |  B = 3                                    
                                           |  C = 11                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  B = 3                                    
                                           |  C = 4                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 8                                   
                                           |  A2 = 8                                   
                                           |  B = 4                                    
                                           |  C = 2                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 2                                   
                                           |  A2 = 2                                   
                                           |  B = 10                                   
                                           |  C = 4                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  B = 6                                    
                                           |  C = 11                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 10                                  
                                           |  A2 = 7                                   
                                           |  B = 2                                    
                                           |  C = 11                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 2                                   
                                           |  B = 3                                    
                                           |  C = 3                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 2                                   
                                           |  A2 = 2                                   
                                           |  B = 6                                    
                                           |  C = 3                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  B = 3                                    
                                           |  C = 7                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  B = 3                                    
                                           |  C = 2                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 2                                   
                                           |  A2 = 2                                   
                                           |  B = 11                                   
                                           |  C = 7                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 2                                   
                                           |  B = 4                                    
                                           |  C = 8                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 3                                   
                                           |  B = 3                                    
                                           |  C = 7                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  B = 2                                    
                                           |  C = 4                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 4                                   
                                           |  B = 2                                    
                                           |  C = 11                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 2                                   
                                           |  B = 2                                    
                                           |  C = 2                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  B = 11                                   
                                           |  C = 4                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  B = 2                                    
                                           |  C = 11                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 4                                   
                                           |  B = 3                                    
                                           |  C = 3                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  B = 4                                    
                                           |  C = 6                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 10                                  
                                           |  B = 11                                   
                                           |  C = 11                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 11                                  
                                           |  B = 11                                   
                                           |  C = 11                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  B = 4                                    
                                           |  C = 9                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  B = 3                                    
                                           |  C = 3                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 7                                   
                                           |  B = 6                                    
                                           |  C = 11                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  B = 5                                    
                                           |  C = 9                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 10                                  
                                           |  B = 2                                    
                                           |  C = 5                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  B = 6                                    
                                           |  C = 6                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 2                                   
                                           |  A2 = 2                                   
                                           |  B = 2                                    
                                           |  C = 6                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 6                                   
                                           |  B = 11                                   
                                           |  C = 3                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 5                                   
                                           |  B = 3                                    
                                           |  C = 11                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 7                                   
                                           |  B = 3                                    
                                           |  C = 3                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 2                                   
                                           |  B = 2                                    
                                           |  C = 2                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 6                                   
                                           |  A3 = 7                                   
                                           |  A4 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 5                                   
                                           |  A3 = 5                                   
                                           |  A4 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  A3 = 10                                  
                                           |  A4 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 8                                   
                                           |  A3 = 3                                   
                                           |  A4 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.arb_data_ou 
                                           |  A1 = 6                                   
                                           |  A2 = 4                                   
                                           |  A3 = 8                                   
                                           |  A4 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 7                                   
                                           |  A3 = 11                                  
                                           |  A4 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.gen_square[ 
                                           |  A1 = 8                                   
                                           |  A2 = 5                                   
                                           |  A3 = 8                                   
                                           |  A4 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  A3 = 5                                   
                                           |  A4 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 4                                   
                                           |  A3 = 11                                  
                                           |  A4 = 11                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 9                                   
                                           |  A3 = 7                                   
                                           |  A4 = 11                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 5                                   
                                           |  A3 = 5                                   
                                           |  A4 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 10                                  
                                           |  A2 = 6                                   
                                           |  A3 = 8                                   
                                           |  A4 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 3                                   
                                           |  A3 = 8                                   
                                           |  A4 = 9                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 10                                  
                                           |  A2 = 5                                   
                                           |  A3 = 3                                   
                                           |  A4 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 10                                  
                                           |  A2 = 5                                   
                                           |  A3 = 9                                   
                                           |  A4 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 5                                   
                                           |  A3 = 5                                   
                                           |  A4 = 4                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 7                                   
                                           |  A3 = 3                                   
                                           |  A4 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 9                                   
                                           |  A3 = 6                                   
                                           |  A4 = 8                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 10                                  
                                           |  A2 = 8                                   
                                           |  A3 = 8                                   
                                           |  A4 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 9                                   
                                           |  A3 = 11                                  
                                           |  A4 = 6                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 7                                   
                                           |  A2 = 11                                  
                                           |  A3 = 4                                   
                                           |  A4 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 9                                   
                                           |  A2 = 11                                  
                                           |  A3 = 5                                   
                                           |  A4 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  A3 = 5                                   
                                           |  A4 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 9                                   
                                           |  A2 = 4                                   
                                           |  A3 = 5                                   
                                           |  A4 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  A3 = 5                                   
                                           |  A4 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  A3 = 9                                   
                                           |  A4 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 6                                   
                                           |  A3 = 4                                   
                                           |  A4 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 7                                   
                                           |  A3 = 9                                   
                                           |  A4 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 5                                   
                                           |  A3 = 2                                   
                                           |  A4 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 3                                   
                                           |  A3 = 4                                   
                                           |  A4 = 7                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  A3 = 9                                   
                                           |  A4 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 7                                   
                                           |  A3 = 11                                  
                                           |  A4 = 6                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 7                                   
                                           |  A3 = 3                                   
                                           |  A4 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 5                                   
                                           |  A3 = 6                                   
                                           |  A4 = 2                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  A3 = 6                                   
                                           |  A4 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 3                                   
                                           |  A3 = 10                                  
                                           |  A4 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  A3 = 11                                  
                                           |  A4 = 11                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  A3 = 4                                   
                                           |  A4 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  A3 = 11                                  
                                           |  A4 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  A3 = 6                                   
                                           |  A4 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 6                                   
                                           |  A3 = 11                                  
                                           |  A4 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 6                                   
                                           |  A3 = 3                                   
                                           |  A4 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  A3 = 6                                   
                                           |  A4 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 11                                  
                                           |  A3 = 5                                   
                                           |  A4 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 2                                   
                                           |  A3 = 2                                   
                                           |  A4 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 4                                   
                                           |  A3 = 11                                  
                                           |  A4 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  A3 = 4                                   
                                           |  A4 = 7                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  A3 = 7                                   
                                           |  A4 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  A3 = 5                                   
                                           |  A4 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 8                                   
                                           |  A2 = 4                                   
                                           |  A3 = 8                                   
                                           |  A4 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 3                                   
                                           |  A3 = 3                                   
                                           |  A4 = 11                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 11                                  
                                           |  A3 = 6                                   
                                           |  A4 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 5                                   
                                           |  A3 = 11                                  
                                           |  A4 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 6                                   
                                           |  A3 = 6                                   
                                           |  A4 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 11                                  
                                           |  A3 = 8                                   
                                           |  A4 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  A3 = 5                                   
                                           |  A4 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 6                                   
                                           |  A3 = 11                                  
                                           |  A4 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  A3 = 11                                  
                                           |  A4 = 11                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 11                                  
                                           |  A3 = 11                                  
                                           |  A4 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  A3 = 11                                  
                                           |  A4 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 6                                   
                                           |  A3 = 6                                   
                                           |  A4 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  A3 = 6                                   
                                           |  A4 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  A3 = 3                                   
                                           |  A4 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  A3 = 11                                  
                                           |  A4 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 2                                   
                                           |  A2 = 3                                   
                                           |  A3 = 3                                   
                                           |  A4 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.arb_data_ou 
                                           |  A1 = 7                                   
                                           |  A2 = 11                                  
                                           |  A3 = 4                                   
                                           |  A4 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 9                                   
                                           |  A3 = 4                                   
                                           |  A4 = 11                                  
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  A3 = 8                                   
                                           |  A4 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 6                                   
                                           |  A3 = 6                                   
                                           |  A4 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 8                                   
                                           |  A2 = 9                                   
                                           |  A3 = 4                                   
                                           |  A4 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  A3 = 11                                  
                                           |  A4 = 7                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 6                                   
                                           |  A3 = 6                                   
                                           |  A4 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 8                                   
                                           |  A3 = 4                                   
                                           |  A4 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 11                                  
                                           |  A3 = 4                                   
                                           |  A4 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  A3 = 3                                   
                                           |  A4 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 8                                   
                                           |  A2 = 4                                   
                                           |  A3 = 4                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 8                                   
                                           |  A3 = 6                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  A3 = 3                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 4                                   
                                           |  A3 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  A3 = 3                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 4                                   
                                           |  A3 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  A3 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  A3 = 3                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 5                                   
                                           |  A3 = 3                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 6                                   
                                           |  A3 = 4                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  A3 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 9                                   
                                           |  A2 = 4                                   
                                           |  A3 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  A3 = 3                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  A1 = 8                                   
                                           |  A2 = 5                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 9                                   
                                           |  A2 = 4                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  ZN = 10                                  
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 9                                   
                                           |  ZN = 7                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 9                                   
                                           |  ZN = 10                                  
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 7                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 6                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 7                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  ZN = 8                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 4                                   
                                           |  A2 = 8                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  ZN = 7                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 6                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.arb_data_ou 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 8                                   
                                           |  ZN = 11                                  
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 8                                   
                                           |  ZN = 7                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 11                                  
                                           |  ZN = 8                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 10                                  
                                           |  ZN = 10                                  
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 3                                   
                                           |  ZN = 7                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 5                                   
                                           |  ZN = 8                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 11                                  
                                           |  ZN = 10                                  
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 9                                   
                                           |  ZN = 7                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 2                                   
                                           |  A2 = 6                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 5                                   
                                           |  ZN = 7                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 11                                  
                                           |  ZN = 10                                  
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 9                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  A3 = 2                                   
                                           |  ZN = 11                                  
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 3                                   
                                           |  A3 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 8                                   
                                           |  A3 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 3                                   
                                           |  A3 = 4                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 4                                   
                                           |  A3 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  A3 = 2                                   
                                           |  ZN = 7                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  I = 2                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  I = 11                                   
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  I = 3                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  I = 7                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  I = 5                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  I = 6                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  I = 4                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  I = 7                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  I = 11                                   
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  I = 11                                   
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  I = 4                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  I = 10                                   
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  I = 7                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 9                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  I = 6                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  I = 2                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  I = 8                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 8                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  I = 8                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  I = 8                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.gen_square[ 
                                           |  I = 5                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  I = 7                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.arb_data_ou 
                                           |  I = 5                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  I = 4                                    
                                           |  Z = 8                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  I = 11                                   
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  I = 2                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  I = 9                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  I = 8                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  I = 8                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  I = 11                                   
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  I = 7                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  I = 8                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  I = 2                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  I = 7                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  I = 9                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  I = 5                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  I = 10                                   
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  I = 8                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  I = 9                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  I = 11                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  I = 10                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  I = 5                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  I = 10                                   
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  I = 5                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 11                                   
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 6                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 8                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 10                                   
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 8                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 6                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 6                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 9                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 11                                   
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  I = 2                                    
                                           |  Z = 10                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 11                                   
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 7                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 6                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 5                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 5                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 11                                   
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 6                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 6                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 5                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 9                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  I = 11                                   
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  I = 7                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  I = 8                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  I = 8                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  I = 11                                   
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  I = 11                                   
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  I = 11                                   
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  I = 7                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.arb_data_ou 
                                           |  I = 7                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.arb_data_ou 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  I = 6                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 8                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 10                                   
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 6                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 9                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 7                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 11                                   
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 9                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  I = 8                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  I = 8                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  I = 5                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  I = 5                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  I = 10                                   
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  I = 11                                   
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  I = 6                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 9                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 7                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 8                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 11                                   
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 6                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 11                                   
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 2                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 6                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 11                                   
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 2                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 7                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  I = 2                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  I = 5                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  I = 5                                    
                                           |  Z = 8                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  I = 8                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  I = 11                                   
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  I = 6                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire2884                         
                                           |  I = 2                                    
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire2888                         
                                           |  I = 2                                    
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire3013                         
                                           |  I = 2                                    
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire3428                         
                                           |  I = 2                                    
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire5170                         
                                           |  I = 2                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire5639                         
                                           |  I = 2                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire5859                         
                                           |  I = 2                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire5890                         
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire6441                         
                                           |  I = 2                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire6497                         
                                           |  I = 2                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire7059                         
                                           |  I = 2                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap7316                      
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire7490                         
                                           |  I = 2                                    
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap8250                      
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap8323                      
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire8482                         
                                           |  I = 2                                    
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire8637                         
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire8989                         
                                           |  I = 2                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire9735                         
                                           |  I = 2                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire9773                         
                                           |  I = 2                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire9819                         
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire9853                         
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap10039                     
                                           |  I = 4                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire10307                        
                                           |  I = 2                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap10514                     
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap10616                     
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire10680                        
                                           |  I = 2                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire10686                        
                                           |  I = 2                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire10938                        
                                           |  I = 2                                    
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire11271                        
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap11346                     
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire11467                        
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire11794                        
                                           |  I = 2                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire11984                        
                                           |  I = 2                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire11998                        
                                           |  I = 3                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap12027                     
                                           |  I = 4                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire12035                        
                                           |  I = 2                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap12036                     
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap12179                     
                                           |  I = 5                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap12180                     
                                           |  I = 5                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap12182                     
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire12412                        
                                           |  I = 2                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap12498                     
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire12552                        
                                           |  I = 2                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap12576                     
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire12790                        
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap12791                     
                                           |  I = 3                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap12794                     
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire12854                        
                                           |  I = 2                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap13185                     
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire13248                        
                                           |  I = 2                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire13400                        
                                           |  I = 2                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire13535                        
                                           |  I = 2                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire13559                        
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire13560                        
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire13930                        
                                           |  I = 2                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire13949                        
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap13952                     
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire13953                        
                                           |  I = 2                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap14396                     
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire14397                        
                                           |  I = 4                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap14437                     
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire14438                        
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire14955                        
                                           |  I = 2                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap15014                     
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire15626                        
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire15977                        
                                           |  I = 5                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire7476                         
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap14480                     
                                           |  I = 4                                    
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  A1 = 5                                   
                                           |  A2 = 7                                   
                                           |  B1 = 6                                   
                                           |  B2 = 5                                   
                                           |  C = 2                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  A1 = 3                                   
                                           |  A2 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 3                                   
                                           |  C = 2                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 5                                   
                                           |  B1 = 6                                   
                                           |  B2 = 4                                   
                                           |  C = 3                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 7                                   
                                           |  B1 = 7                                   
                                           |  B2 = 5                                   
                                           |  C = 2                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  B1 = 2                                   
                                           |  B2 = 11                                  
                                           |  C = 5                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 7                                   
                                           |  B1 = 6                                   
                                           |  B2 = 4                                   
                                           |  C = 5                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.arb_data_ou 
                                           |  A1 = 4                                   
                                           |  A2 = 2                                   
                                           |  B1 = 2                                   
                                           |  B2 = 4                                   
                                           |  C = 2                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.gen_square[ 
                                           |  A1 = 2                                   
                                           |  A2 = 5                                   
                                           |  B1 = 3                                   
                                           |  B2 = 5                                   
                                           |  C = 7                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 2                                   
                                           |  B1 = 2                                   
                                           |  B2 = 2                                   
                                           |  C = 5                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 7                                   
                                           |  B1 = 6                                   
                                           |  B2 = 5                                   
                                           |  C = 2                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  B1 = 4                                   
                                           |  B2 = 5                                   
                                           |  C = 2                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 3                                   
                                           |  B1 = 4                                   
                                           |  B2 = 5                                   
                                           |  C = 2                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  B1 = 6                                   
                                           |  B2 = 5                                   
                                           |  C = 4                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 6                                   
                                           |  B1 = 5                                   
                                           |  B2 = 5                                   
                                           |  C = 2                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 6                                   
                                           |  B1 = 4                                   
                                           |  B2 = 5                                   
                                           |  C = 4                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 7                                   
                                           |  B1 = 4                                   
                                           |  B2 = 2                                   
                                           |  C = 6                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 7                                   
                                           |  B1 = 4                                   
                                           |  B2 = 6                                   
                                           |  C = 5                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  B1 = 8                                   
                                           |  B2 = 6                                   
                                           |  C = 7                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 10                                  
                                           |  B1 = 5                                   
                                           |  B2 = 2                                   
                                           |  C = 8                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 7                                   
                                           |  B1 = 6                                   
                                           |  B2 = 7                                   
                                           |  C = 6                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 3                                   
                                           |  B1 = 6                                   
                                           |  B2 = 4                                   
                                           |  C = 6                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 8                                   
                                           |  B1 = 5                                   
                                           |  B2 = 2                                   
                                           |  C = 6                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 6                                   
                                           |  B1 = 6                                   
                                           |  B2 = 5                                   
                                           |  C = 2                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  B1 = 3                                   
                                           |  B2 = 4                                   
                                           |  C = 5                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 5                                   
                                           |  A2 = 8                                   
                                           |  B1 = 6                                   
                                           |  B2 = 5                                   
                                           |  C = 7                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 5                                   
                                           |  A2 = 2                                   
                                           |  B1 = 3                                   
                                           |  B2 = 2                                   
                                           |  C = 2                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  B1 = 8                                   
                                           |  B2 = 6                                   
                                           |  C = 5                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 4                                   
                                           |  B1 = 8                                   
                                           |  B2 = 6                                   
                                           |  C = 5                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 5                                   
                                           |  B1 = 3                                   
                                           |  B2 = 3                                   
                                           |  C = 2                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 5                                   
                                           |  C = 6                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 7                                   
                                           |  B1 = 7                                   
                                           |  B2 = 5                                   
                                           |  C = 2                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  B1 = 5                                   
                                           |  B2 = 3                                   
                                           |  C = 5                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 4                                   
                                           |  B1 = 4                                   
                                           |  B2 = 5                                   
                                           |  C = 2                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  B1 = 3                                   
                                           |  B2 = 2                                   
                                           |  C = 7                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  B1 = 4                                   
                                           |  B2 = 11                                  
                                           |  C = 2                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 6                                   
                                           |  B1 = 3                                   
                                           |  B2 = 3                                   
                                           |  C = 2                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 7                                   
                                           |  B1 = 8                                   
                                           |  B2 = 3                                   
                                           |  C = 5                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 4                                   
                                           |  B1 = 4                                   
                                           |  B2 = 6                                   
                                           |  C = 2                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 11                                  
                                           |  B1 = 4                                   
                                           |  B2 = 2                                   
                                           |  C = 4                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  B1 = 6                                   
                                           |  B2 = 4                                   
                                           |  C = 5                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  B1 = 4                                   
                                           |  B2 = 5                                   
                                           |  C = 2                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 2                                   
                                           |  A2 = 3                                   
                                           |  B1 = 4                                   
                                           |  B2 = 4                                   
                                           |  C = 2                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 5                                   
                                           |  C = 3                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 4                                   
                                           |  C = 4                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 4                                   
                                           |  B1 = 6                                   
                                           |  B2 = 4                                   
                                           |  C = 5                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 7                                   
                                           |  B1 = 6                                   
                                           |  B2 = 4                                   
                                           |  C = 3                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 4                                   
                                           |  C = 2                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 3                                   
                                           |  C = 2                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 9                                   
                                           |  B1 = 6                                   
                                           |  B2 = 5                                   
                                           |  C = 2                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 9                                   
                                           |  B1 = 6                                   
                                           |  B2 = 4                                   
                                           |  C = 2                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap14424                     
                                           |  I = 5                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire15257                        
                                           |  I = 4                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 6                                   
                                           |  A3 = 11                                  
                                           |  A4 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  A3 = 11                                  
                                           |  A4 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.arb_data_ou 
                                           |  A1 = 5                                   
                                           |  A2 = 6                                   
                                           |  B1 = 5                                   
                                           |  B2 = 5                                   
                                           |  C1 = 3                                   
                                           |  C2 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.arb_data_ou 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  B1 = 4                                   
                                           |  B2 = 5                                   
                                           |  C1 = 3                                   
                                           |  C2 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 2                                   
                                           |  A2 = 2                                   
                                           |  B1 = 4                                   
                                           |  B2 = 7                                   
                                           |  C1 = 3                                   
                                           |  C2 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 5                                   
                                           |  A2 = 8                                   
                                           |  B1 = 8                                   
                                           |  B2 = 5                                   
                                           |  C1 = 3                                   
                                           |  C2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 5                                   
                                           |  A2 = 8                                   
                                           |  B1 = 8                                   
                                           |  B2 = 5                                   
                                           |  C1 = 3                                   
                                           |  C2 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  B1 = 6                                   
                                           |  B2 = 4                                   
                                           |  C1 = 4                                   
                                           |  C2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  B1 = 7                                   
                                           |  B2 = 5                                   
                                           |  C1 = 4                                   
                                           |  C2 = 2                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 7                                   
                                           |  B1 = 6                                   
                                           |  B2 = 7                                   
                                           |  C1 = 5                                   
                                           |  C2 = 3                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 6                                   
                                           |  B1 = 6                                   
                                           |  B2 = 5                                   
                                           |  C1 = 3                                   
                                           |  C2 = 2                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  B1 = 6                                   
                                           |  B2 = 6                                   
                                           |  C1 = 3                                   
                                           |  C2 = 2                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 7                                   
                                           |  B1 = 7                                   
                                           |  B2 = 6                                   
                                           |  C1 = 3                                   
                                           |  C2 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 7                                   
                                           |  B1 = 8                                   
                                           |  B2 = 4                                   
                                           |  C1 = 3                                   
                                           |  C2 = 7                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  B1 = 8                                   
                                           |  B2 = 5                                   
                                           |  C1 = 5                                   
                                           |  C2 = 2                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 9                                   
                                           |  B1 = 6                                   
                                           |  B2 = 5                                   
                                           |  C1 = 3                                   
                                           |  C2 = 2                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 4                                   
                                           |  B1 = 4                                   
                                           |  B2 = 4                                   
                                           |  C1 = 3                                   
                                           |  C2 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 4                                   
                                           |  C1 = 3                                   
                                           |  C2 = 2                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  B1 = 4                                   
                                           |  B2 = 6                                   
                                           |  C1 = 5                                   
                                           |  C2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 6                                   
                                           |  C1 = 3                                   
                                           |  C2 = 7                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.arb_data_ou 
                                           |  A1 = 6                                   
                                           |  A2 = 9                                   
                                           |  B1 = 8                                   
                                           |  B2 = 4                                   
                                           |  C1 = 4                                   
                                           |  C2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 9                                   
                                           |  B1 = 6                                   
                                           |  B2 = 5                                   
                                           |  C1 = 3                                   
                                           |  C2 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 5                                   
                                           |  C1 = 3                                   
                                           |  C2 = 6                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 11                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 8                                   
                                           |  A2 = 5                                   
                                           |  ZN = 7                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 9                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 8                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 9                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 10                                  
                                           |  A2 = 7                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 10                                  
                                           |  A2 = 9                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 10                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 9                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 2                                   
                                           |  A2 = 9                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 10                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 8                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 10                                  
                                           |  A2 = 10                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 9                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 10                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 7                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 11                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 9                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 8                                   
                                           |  A2 = 8                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 9                                   
                                           |  A2 = 9                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 10                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 12                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 2                                   
                                           |  A2 = 7                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 11                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 11                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 8                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 7                                   
                                           |  A2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 9                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 10                                  
                                           |  A2 = 8                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 8                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 8                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 9                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 10                                  
                                           |  A2 = 7                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.arb_data_ou 
                                           |  A1 = 8                                   
                                           |  A2 = 10                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 8                                   
                                           |  A2 = 10                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 10                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 10                                  
                                           |  A2 = 11                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 8                                   
                                           |  A2 = 9                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 8                                   
                                           |  A2 = 10                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 9                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 10                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 8                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 11                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  A1 = 10                                  
                                           |  A2 = 5                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 9                                   
                                           |  A2 = 11                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 9                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 9                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 8                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 9                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 7                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 9                                   
                                           |  A2 = 7                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 11                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 10                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 8                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 8                                   
                                           |  A2 = 6                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  A1 = 3                                   
                                           |  A2 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 3                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 9                                   
                                           |  B1 = 8                                   
                                           |  B2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 11                                  
                                           |  B1 = 5                                   
                                           |  B2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 2                                   
                                           |  B1 = 2                                   
                                           |  B2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 11                                  
                                           |  B1 = 8                                   
                                           |  B2 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  B1 = 4                                   
                                           |  B2 = 5                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  B1 = 3                                   
                                           |  B2 = 8                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  B1 = 5                                   
                                           |  B2 = 4                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 6                                   
                                           |  B1 = 7                                   
                                           |  B2 = 5                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  B1 = 4                                   
                                           |  B2 = 4                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 5                                   
                                           |  A2 = 6                                   
                                           |  B1 = 6                                   
                                           |  B2 = 5                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 6                                   
                                           |  B1 = 5                                   
                                           |  B2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  B1 = 4                                   
                                           |  B2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 7                                   
                                           |  B1 = 7                                   
                                           |  B2 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 2                                   
                                           |  B1 = 3                                   
                                           |  B2 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 10                                  
                                           |  A2 = 2                                   
                                           |  B1 = 2                                   
                                           |  B2 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  B1 = 11                                  
                                           |  B2 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 7                                   
                                           |  B1 = 6                                   
                                           |  B2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 2                                   
                                           |  B1 = 4                                   
                                           |  B2 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 2                                   
                                           |  B1 = 2                                   
                                           |  B2 = 8                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 3                                   
                                           |  B1 = 5                                   
                                           |  B2 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 4                                   
                                           |  B1 = 8                                   
                                           |  B2 = 5                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 6                                   
                                           |  A2 = 7                                   
                                           |  B1 = 5                                   
                                           |  B2 = 6                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 2                                   
                                           |  B1 = 2                                   
                                           |  B2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  B1 = 3                                   
                                           |  B2 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 9                                   
                                           |  B1 = 6                                   
                                           |  B2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 7                                   
                                           |  A3 = 7                                   
                                           |  A4 = 3                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 6                                   
                                           |  A3 = 3                                   
                                           |  A4 = 3                                   
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 4                                   
                                           |  A3 = 11                                  
                                           |  A4 = 4                                   
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  A3 = 2                                   
                                           |  A4 = 3                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 7                                   
                                           |  A3 = 8                                   
                                           |  A4 = 6                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 8                                   
                                           |  A3 = 11                                  
                                           |  A4 = 4                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 2                                   
                                           |  A3 = 11                                  
                                           |  A4 = 10                                  
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.arb_data_ou 
                                           |  A1 = 3                                   
                                           |  A2 = 6                                   
                                           |  B1 = 3                                   
                                           |  B2 = 3                                   
                                           |  C = 2                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 5                                   
                                           |  B1 = 6                                   
                                           |  B2 = 3                                   
                                           |  C = 3                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 4                                   
                                           |  B1 = 4                                   
                                           |  B2 = 3                                   
                                           |  C = 6                                    
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  A1 = 4                                   
                                           |  A2 = 6                                   
                                           |  A3 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 2                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 11                                  
                                           |  A3 = 4                                   
                                           |  B1 = 5                                   
                                           |  B2 = 9                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 6                                   
                                           |  A3 = 5                                   
                                           |  B1 = 2                                   
                                           |  B2 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 2                                   
                                           |  A3 = 2                                   
                                           |  B1 = 3                                   
                                           |  B2 = 11                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 6                                   
                                           |  A3 = 4                                   
                                           |  B1 = 6                                   
                                           |  B2 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 7                                   
                                           |  A3 = 6                                   
                                           |  B1 = 5                                   
                                           |  B2 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  A3 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 2                                   
                                           |  A3 = 4                                   
                                           |  B1 = 3                                   
                                           |  B2 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 8                                   
                                           |  A3 = 3                                   
                                           |  B1 = 5                                   
                                           |  B2 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 6                                   
                                           |  A2 = 2                                   
                                           |  A3 = 3                                   
                                           |  B1 = 2                                   
                                           |  B2 = 2                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 6                                   
                                           |  A3 = 4                                   
                                           |  B1 = 5                                   
                                           |  B2 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  A3 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 3                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 6                                   
                                           |  A3 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 2                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 6                                   
                                           |  A3 = 5                                   
                                           |  B1 = 4                                   
                                           |  B2 = 2                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 4                                   
                                           |  A3 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 9                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 10                                  
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 10                                  
                                           |  A2 = 10                                  
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 8                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.arb_data_ou 
                                           |  A1 = 5                                   
                                           |  A2 = 11                                  
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 10                                  
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 9                                   
                                           |  A2 = 9                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 2                                   
                                           |  A2 = 8                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 11                                  
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 10                                  
                                           |  A2 = 8                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 10                                  
                                           |  A2 = 8                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 10                                  
                                           |  A2 = 8                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 10                                  
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 11                                  
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 8                                   
                                           |  A2 = 8                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 9                                   
                                           |  A2 = 8                                   
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 4                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 6                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 2                                   
                                           |  A2 = 3                                   
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 9                                   
                                           |  A2 = 7                                   
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 8                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 8                                   
                                           |  A2 = 6                                   
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  A1 = 6                                   
                                           |  A2 = 4                                   
                                           |  A3 = 7                                   
                                           |  B1 = 7                                   
                                           |  B2 = 7                                   
                                           |  B3 = 6                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 6                                   
                                           |  A3 = 5                                   
                                           |  B1 = 6                                   
                                           |  B2 = 4                                   
                                           |  B3 = 11                                  
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 4                                   
                                           |  A3 = 6                                   
                                           |  B1 = 7                                   
                                           |  B2 = 7                                   
                                           |  B3 = 6                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 8                                   
                                           |  A3 = 5                                   
                                           |  B1 = 4                                   
                                           |  B2 = 7                                   
                                           |  B3 = 7                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 9                                   
                                           |  A3 = 4                                   
                                           |  B1 = 3                                   
                                           |  B2 = 4                                   
                                           |  B3 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  A3 = 5                                   
                                           |  B1 = 3                                   
                                           |  B2 = 6                                   
                                           |  B3 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 6                                   
                                           |  A3 = 3                                   
                                           |  B1 = 3                                   
                                           |  B2 = 3                                   
                                           |  B3 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  A3 = 5                                   
                                           |  B1 = 2                                   
                                           |  B2 = 6                                   
                                           |  B3 = 7                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 6                                   
                                           |  A3 = 4                                   
                                           |  B1 = 6                                   
                                           |  B2 = 11                                  
                                           |  B3 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 6                                   
                                           |  A3 = 4                                   
                                           |  B1 = 11                                  
                                           |  B2 = 7                                   
                                           |  B3 = 5                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 6                                   
                                           |  A3 = 6                                   
                                           |  B1 = 6                                   
                                           |  B2 = 7                                   
                                           |  B3 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 3                                   
                                           |  A3 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 7                                   
                                           |  B3 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 7                                   
                                           |  A3 = 6                                   
                                           |  B1 = 4                                   
                                           |  B2 = 8                                   
                                           |  B3 = 8                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  A3 = 4                                   
                                           |  B1 = 4                                   
                                           |  B2 = 8                                   
                                           |  B3 = 6                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 4                                   
                                           |  A2 = 5                                   
                                           |  A3 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 10                                  
                                           |  B3 = 6                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 5                                   
                                           |  A3 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 8                                   
                                           |  B3 = 7                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 6                                   
                                           |  A3 = 4                                   
                                           |  B1 = 5                                   
                                           |  B2 = 5                                   
                                           |  B3 = 4                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 6                                   
                                           |  A3 = 6                                   
                                           |  B1 = 5                                   
                                           |  B2 = 5                                   
                                           |  B3 = 6                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 3                                   
                                           |  A3 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 7                                   
                                           |  B3 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 4                                   
                                           |  A3 = 6                                   
                                           |  B1 = 5                                   
                                           |  B2 = 6                                   
                                           |  B3 = 7                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 7                                   
                                           |  A3 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 6                                   
                                           |  B3 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 6                                   
                                           |  A3 = 4                                   
                                           |  B1 = 4                                   
                                           |  B2 = 5                                   
                                           |  B3 = 5                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 6                                   
                                           |  A3 = 4                                   
                                           |  B1 = 4                                   
                                           |  B2 = 3                                   
                                           |  B3 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  A3 = 5                                   
                                           |  B1 = 6                                   
                                           |  B2 = 7                                   
                                           |  B3 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 5                                   
                                           |  A2 = 7                                   
                                           |  A3 = 8                                   
                                           |  B1 = 6                                   
                                           |  B2 = 3                                   
                                           |  B3 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 6                                   
                                           |  A3 = 6                                   
                                           |  B1 = 5                                   
                                           |  B2 = 7                                   
                                           |  B3 = 7                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 7                                   
                                           |  A3 = 6                                   
                                           |  B1 = 4                                   
                                           |  B2 = 3                                   
                                           |  B3 = 7                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 5                                   
                                           |  A3 = 4                                   
                                           |  B1 = 5                                   
                                           |  B2 = 2                                   
                                           |  B3 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.arb_data_ou 
                                           |  A1 = 7                                   
                                           |  A2 = 7                                   
                                           |  A3 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 3                                   
                                           |  B3 = 7                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  A3 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 3                                   
                                           |  B3 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 8                                   
                                           |  A3 = 4                                   
                                           |  B1 = 6                                   
                                           |  B2 = 5                                   
                                           |  B3 = 6                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 11                                  
                                           |  A3 = 5                                   
                                           |  B1 = 3                                   
                                           |  B2 = 3                                   
                                           |  B3 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 6                                   
                                           |  A3 = 6                                   
                                           |  B1 = 4                                   
                                           |  B2 = 7                                   
                                           |  B3 = 7                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 6                                   
                                           |  A3 = 6                                   
                                           |  B1 = 6                                   
                                           |  B2 = 7                                   
                                           |  B3 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 6                                   
                                           |  A3 = 6                                   
                                           |  B1 = 6                                   
                                           |  B2 = 6                                   
                                           |  B3 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  A1 = 4                                   
                                           |  A2 = 5                                   
                                           |  A3 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 9                                   
                                           |  B3 = 6                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 8                                   
                                           |  A3 = 4                                   
                                           |  B1 = 5                                   
                                           |  B2 = 8                                   
                                           |  B3 = 7                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 3                                   
                                           |  A3 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 10                                  
                                           |  B3 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  A3 = 5                                   
                                           |  B1 = 4                                   
                                           |  B2 = 10                                  
                                           |  B3 = 6                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  A3 = 3                                   
                                           |  B1 = 4                                   
                                           |  B2 = 6                                   
                                           |  B3 = 6                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 4                                   
                                           |  A3 = 4                                   
                                           |  B1 = 4                                   
                                           |  B2 = 6                                   
                                           |  B3 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 6                                   
                                           |  A3 = 4                                   
                                           |  B1 = 4                                   
                                           |  B2 = 5                                   
                                           |  B3 = 6                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 8                                   
                                           |  A2 = 5                                   
                                           |  A3 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 4                                   
                                           |  B3 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 7                                   
                                           |  A3 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 4                                   
                                           |  B3 = 4                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 8                                   
                                           |  A3 = 6                                   
                                           |  B1 = 7                                   
                                           |  B2 = 7                                   
                                           |  B3 = 6                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 6                                   
                                           |  A3 = 5                                   
                                           |  B1 = 4                                   
                                           |  B2 = 5                                   
                                           |  B3 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 8                                   
                                           |  A3 = 6                                   
                                           |  B1 = 7                                   
                                           |  B2 = 6                                   
                                           |  B3 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  A3 = 5                                   
                                           |  B1 = 3                                   
                                           |  B2 = 8                                   
                                           |  B3 = 6                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 4                                   
                                           |  A3 = 4                                   
                                           |  B1 = 6                                   
                                           |  B2 = 5                                   
                                           |  B3 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  A3 = 4                                   
                                           |  B1 = 6                                   
                                           |  B2 = 7                                   
                                           |  B3 = 6                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  A3 = 4                                   
                                           |  B1 = 6                                   
                                           |  B2 = 7                                   
                                           |  B3 = 3                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 6                                   
                                           |  A2 = 6                                   
                                           |  A3 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 5                                   
                                           |  B3 = 6                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 5                                   
                                           |  A3 = 3                                   
                                           |  B1 = 4                                   
                                           |  B2 = 7                                   
                                           |  B3 = 6                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  A3 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 5                                   
                                           |  B3 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  A3 = 5                                   
                                           |  B1 = 4                                   
                                           |  B2 = 7                                   
                                           |  B3 = 8                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 7                                   
                                           |  A3 = 6                                   
                                           |  B1 = 5                                   
                                           |  B2 = 6                                   
                                           |  B3 = 8                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 6                                   
                                           |  A3 = 6                                   
                                           |  B1 = 4                                   
                                           |  B2 = 3                                   
                                           |  B3 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 8                                   
                                           |  A2 = 3                                   
                                           |  A3 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 3                                   
                                           |  B3 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 7                                   
                                           |  A3 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 7                                   
                                           |  B3 = 7                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 7                                   
                                           |  A3 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 5                                   
                                           |  B3 = 7                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 6                                   
                                           |  A3 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 5                                   
                                           |  B3 = 4                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 5                                   
                                           |  A3 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 7                                   
                                           |  B3 = 5                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire6358                         
                                           |  I = 3                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap9792                      
                                           |  I = 4                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire10549                        
                                           |  I = 2                                    
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap11478                     
                                           |  I = 4                                    
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire12818                        
                                           |  I = 3                                    
                                           |  Z = 9                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire14063                        
                                           |  I = 3                                    
                                           |  Z = 9                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap14895                     
                                           |  I = 3                                    
                                           |  Z = 8                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire16110                        
                                           |  I = 3                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: max_cap17173                     
                                           |  I = 3                                    
                                           |  Z = 8                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: wire17451                        
                                           |  I = 3                                    
                                           |  Z = 9                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.arb_data_ou 
                                           |  A1 = 5                                   
                                           |  A2 = 7                                   
                                           |  B1 = 5                                   
                                           |  B2 = 3                                   
                                           |  C1 = 3                                   
                                           |  C2 = 2                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 7                                   
                                           |  B1 = 7                                   
                                           |  B2 = 3                                   
                                           |  C1 = 3                                   
                                           |  C2 = 2                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  Z = 7                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 7                                   
                                           |  Z = 8                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 11                                  
                                           |  Z = 9                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 11                                  
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 3                                   
                                           |  Z = 9                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  A1 = 11                                  
                                           |  A2 = 10                                  
                                           |  Z = 10                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 9                                   
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 6                                   
                                           |  B1 = 6                                   
                                           |  B2 = 4                                   
                                           |  C = 9                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  B1 = 3                                   
                                           |  B2 = 2                                   
                                           |  C = 11                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 3                                   
                                           |  B1 = 6                                   
                                           |  B2 = 2                                   
                                           |  C = 2                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 2                                   
                                           |  B1 = 3                                   
                                           |  B2 = 4                                   
                                           |  C = 2                                    
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  A3 = 3                                   
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  A3 = 3                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 6                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  A1 = 9                                   
                                           |  A2 = 10                                  
                                           |  ZN = 9                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 4                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 10                                  
                                           |  A2 = 6                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  ZN = 10                                  
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 9                                   
                                           |  A2 = 5                                   
                                           |  ZN = 11                                  
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 4                                   
                                           |  ZN = 10                                  
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  ZN = 8                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.arb_data_ou 
                                           |  A1 = 7                                   
                                           |  A2 = 5                                   
                                           |  A3 = 5                                   
                                           |  B = 5                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 7                                   
                                           |  A3 = 3                                   
                                           |  B = 5                                    
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 5                                   
                                           |  A3 = 4                                   
                                           |  B = 4                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 5                                   
                                           |  A3 = 4                                   
                                           |  B = 8                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  A3 = 2                                   
                                           |  B = 6                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 2                                   
                                           |  A3 = 2                                   
                                           |  B = 4                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 10                                  
                                           |  A3 = 3                                   
                                           |  B = 6                                    
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  A3 = 5                                   
                                           |  B = 6                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 5                                   
                                           |  A2 = 4                                   
                                           |  A3 = 3                                   
                                           |  B = 3                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 5                                   
                                           |  A3 = 3                                   
                                           |  B = 11                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 10                                  
                                           |  A3 = 6                                   
                                           |  B = 6                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  A3 = 5                                   
                                           |  B = 4                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  I = 4                                    
                                           |  ZN = 7                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  I = 8                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  I = 6                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  I = 9                                    
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  I = 6                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  A3 = 5                                   
                                           |  B1 = 4                                   
                                           |  B2 = 10                                  
                                           |  B3 = 7                                   
                                           |  ZN = 10                                  
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  A3 = 4                                   
                                           |  B1 = 3                                   
                                           |  B2 = 4                                   
                                           |  B3 = 5                                   
                                           |  ZN = 7                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  A3 = 11                                  
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  A3 = 4                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  A3 = 2                                   
                                           |  ZN = 7                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 8                                   
                                           |  A3 = 5                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  A3 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  A1 = 8                                   
                                           |  A2 = 4                                   
                                           |  A3 = 11                                  
                                           |  ZN = 7                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  A3 = 11                                  
                                           |  ZN = 8                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 2                                   
                                           |  B = 2                                    
                                           |  ZN = 8                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 2                                   
                                           |  A2 = 2                                   
                                           |  B = 4                                    
                                           |  ZN = 7                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 2                                   
                                           |  A2 = 2                                   
                                           |  B = 2                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.arb_data_ou 
                                           |  A1 = 3                                   
                                           |  A2 = 5                                   
                                           |  B = 2                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 2                                   
                                           |  B = 2                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  B = 5                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 5                                   
                                           |  B = 5                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 2                                   
                                           |  A2 = 2                                   
                                           |  B = 2                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.arb_data_ou 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  B = 3                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  B = 10                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  B = 7                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 2                                   
                                           |  B = 6                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 2                                   
                                           |  A2 = 2                                   
                                           |  B = 3                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  B = 4                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.gen_square[ 
                                           |  A1 = 2                                   
                                           |  A2 = 2                                   
                                           |  B = 4                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  I = 6                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  I = 6                                    
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.gen_square[ 
                                           |  I = 6                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  I = 3                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  I = 4                                    
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  I = 6                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: fanout17861                      
                                           |  I = 10                                   
                                           |  Z = 11                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.arb_data_ou 
                                           |  A1 = 3                                   
                                           |  A2 = 7                                   
                                           |  B1 = 3                                   
                                           |  B2 = 5                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  B1 = 5                                   
                                           |  B2 = 5                                   
                                           |  ZN = 7                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 4                                   
                                           |  B1 = 4                                   
                                           |  B2 = 4                                   
                                           |  ZN = 7                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 8                                   
                                           |  B = 5                                    
                                           |  C = 5                                    
                                           |  ZN = 7                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 6                                   
                                           |  B = 6                                    
                                           |  C = 4                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 10                                  
                                           |  A2 = 6                                   
                                           |  B = 11                                   
                                           |  C = 9                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 2                                   
                                           |  B = 3                                    
                                           |  C = 9                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 7                                   
                                           |  B = 6                                    
                                           |  C = 3                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 10                                  
                                           |  A2 = 4                                   
                                           |  B = 3                                    
                                           |  C = 7                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 2                                   
                                           |  A2 = 2                                   
                                           |  B = 2                                    
                                           |  C = 5                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  B = 2                                    
                                           |  C = 6                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 3                                   
                                           |  A3 = 11                                  
                                           |  A4 = 2                                   
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 4                                   
                                           |  A3 = 6                                   
                                           |  A4 = 3                                   
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 7                                   
                                           |  A2 = 3                                   
                                           |  A3 = 6                                   
                                           |  A4 = 6                                   
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 8                                   
                                           |  A2 = 4                                   
                                           |  A3 = 4                                   
                                           |  A4 = 5                                   
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 3                                   
                                           |  B = 3                                    
                                           |  C = 10                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 11                                  
                                           |  B = 3                                    
                                           |  C = 10                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 8                                   
                                           |  B = 5                                    
                                           |  C = 2                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 8                                   
                                           |  B = 2                                    
                                           |  C = 7                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 3                                   
                                           |  B = 5                                    
                                           |  C = 6                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 10                                  
                                           |  A2 = 5                                   
                                           |  B = 4                                    
                                           |  C = 3                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 8                                   
                                           |  B = 9                                    
                                           |  C = 2                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 4                                   
                                           |  B = 2                                    
                                           |  C = 11                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 9                                   
                                           |  A2 = 4                                   
                                           |  B = 10                                   
                                           |  C = 2                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 11                                  
                                           |  B = 11                                   
                                           |  C = 3                                    
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 5                                   
                                           |  A3 = 5                                   
                                           |  B1 = 4                                   
                                           |  B2 = 11                                  
                                           |  B3 = 8                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  A1 = 6                                   
                                           |  A2 = 6                                   
                                           |  A3 = 4                                   
                                           |  B1 = 4                                   
                                           |  B2 = 4                                   
                                           |  B3 = 3                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  A1 = 3                                   
                                           |  A2 = 4                                   
                                           |  A3 = 4                                   
                                           |  B1 = 4                                   
                                           |  B2 = 6                                   
                                           |  B3 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 6                                   
                                           |  A3 = 3                                   
                                           |  B1 = 3                                   
                                           |  B2 = 6                                   
                                           |  B3 = 5                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  A3 = 5                                   
                                           |  B1 = 5                                   
                                           |  B2 = 5                                   
                                           |  B3 = 5                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 4                                   
                                           |  A3 = 5                                   
                                           |  B1 = 6                                   
                                           |  B2 = 3                                   
                                           |  B3 = 6                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 6                                   
                                           |  A3 = 6                                   
                                           |  B1 = 5                                   
                                           |  B2 = 6                                   
                                           |  B3 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.gen_square[ 
                                           |  A1 = 4                                   
                                           |  A2 = 6                                   
                                           |  A3 = 5                                   
                                           |  B1 = 4                                   
                                           |  B2 = 7                                   
                                           |  B3 = 6                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 3                                   
                                           |  A3 = 9                                   
                                           |  A4 = 11                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  A3 = 7                                   
                                           |  A4 = 3                                   
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.illegal_gf1 
                                           |  A1 = 2                                   
                                           |  A2 = 3                                   
                                           |  A3 = 3                                   
                                           |  B1 = 4                                   
                                           |  B2 = 11                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.illegal_gf1 
                                           |  I = 8                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 4                                   
                                           |  B1 = 4                                   
                                           |  B2 = 3                                   
                                           |  C1 = 3                                   
                                           |  C2 = 2                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 7                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 4                                   
                                           |  ZN = 8                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 5                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 5                                   
                                           |  ZN = 10                                  
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core1.b.arb_data_ou 
                                           |  A1 = 4                                   
                                           |  A2 = 5                                   
                                           |  A3 = 2                                   
                                           |  A4 = 2                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 10                                  
                                           |  A2 = 10                                  
                                           |  A3 = 8                                   
                                           |  A4 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 6                                   
                                           |  A3 = 11                                  
                                           |  A4 = 10                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 9                                   
                                           |  A3 = 5                                   
                                           |  A4 = 9                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 3                                   
                                           |  A3 = 8                                   
                                           |  A4 = 11                                  
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 9                                   
                                           |  A2 = 6                                   
                                           |  A3 = 6                                   
                                           |  A4 = 7                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  A3 = 4                                   
                                           |  A4 = 4                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 11                                  
                                           |  A3 = 7                                   
                                           |  A4 = 9                                   
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 11                                  
                                           |  A3 = 7                                   
                                           |  A4 = 5                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core0.b.arb_data_ou 
                                           |  A1 = 6                                   
                                           |  A2 = 5                                   
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 6                                   
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 9                                   
                                           |  A2 = 5                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 4                                   
                                           |  A3 = 6                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  I0 = 4                                   
                                           |  I1 = 5                                   
                                           |  S = 5                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 8                                   
                                           |  A2 = 4                                   
                                           |  A3 = 3                                   
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 9                                   
                                           |  A3 = 4                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 6                                   
                                           |  A3 = 3                                   
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 5                                   
                                           |  A2 = 11                                  
                                           |  A3 = 11                                  
                                           |  Z = 2                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.gen_square[ 
                                           |  A1 = 6                                   
                                           |  A2 = 10                                  
                                           |  A3 = 4                                   
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  A3 = 4                                   
                                           |  Z = 4                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 7                                   
                                           |  A2 = 4                                   
                                           |  B = 6                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.arb_data_ou 
                                           |  A1 = 8                                   
                                           |  A2 = 4                                   
                                           |  B = 3                                    
                                           |  ZN = 6                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.arb_data_ou 
                                           |  A1 = 3                                   
                                           |  A2 = 11                                  
                                           |  B = 3                                    
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.gen_square[ 
                                           |  A1 = 3                                   
                                           |  A2 = 5                                   
                                           |  B1 = 3                                   
                                           |  B2 = 2                                   
                                           |  C = 3                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 3                                   
                                           |  A3 = 6                                   
                                           |  A4 = 9                                   
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 2                                   
                                           |  A3 = 3                                   
                                           |  A4 = 11                                  
                                           |  Z = 5                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 5                                   
                                           |  A2 = 5                                   
                                           |  A3 = 3                                   
                                           |  B = 4                                    
                                           |  ZN = 3                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 11                                  
                                           |  A2 = 9                                   
                                           |  B = 2                                    
                                           |  C = 11                                   
                                           |  ZN = 4                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core4.b.illegal_gf1 
                                           |  A1 = 6                                   
                                           |  A2 = 4                                   
                                           |  B = 4                                    
                                           |  C = 8                                    
                                           |  ZN = 2                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core5.b.arb_data_ou 
                                           |  A1 = 3                                   
                                           |  A2 = 3                                   
                                           |  B = 3                                    
                                           |  C = 3                                    
                                           |  ZN = 7                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core3.b.illegal_gf1 
                                           |  A1 = 3                                   
                                           |  A2 = 6                                   
                                           |  B = 7                                    
                                           |  ZN = 5                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core7.b.illegal_gf1 
                                           |  A1 = 4                                   
                                           |  A2 = 3                                   
                                           |  B = 6                                    
                                           |  ZN = 8                                   
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 4                                    
                                           |  Z = 6                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  I = 5                                    
                                           |  Z = 3                                    
                                           |  VDD = 280586                             
                                           |  VNW = 280586                             
                                           |  VPW = 280584                             
                                           |  VSS = 280584                             
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  (1,3) = (280584,4)                       
                                           |  2 = 5                                    
                                           |  4 = 280584                               
                                           |                                           
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  (1,3) = (280584,4)                       
                                           |  2 = 3                                    
                                           |  4 = 280584                               
                                           |                                           
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  (1,3) = (280584,7)                       
                                           |  2 = 4                                    
                                           |  4 = 280584                               
                                           |                                           
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core2.b.illegal_gf1 
                                           |  (1,3) = (280586,4)                       
                                           |  2 = 5                                    
                                           |  4 = 280586                               
                                           |                                           
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  (1,3) = (280586,4)                       
                                           |  2 = 3                                    
                                           |  4 = 280586                               
                                           |                                           
                                           |                                           
(no matching instance)                     |Instance: \i_chip_core.core6.b.illegal_gf1 
                                           |  (1,3) = (280586,7)                       
                                           |  2 = 4                                    
                                           |  4 = 280586                               
                                           |                                           
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: wire19642                        
  I = 4                                    |  I = 4                                    
  Z = 1014                                 |  Z = 8                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap6574                      
  I = 4                                    |  I = 6                                    
  Z = 8                                    |  Z = 7                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap7674                      
  I = 9                                    |  I = 6                                    
  Z = 9                                    |  Z = 4                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap9185                      
  I = 148                                  |  I = 7                                    
  Z = 1463                                 |  Z = 6                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap9946                      
  I = 40                                   |  I = 7                                    
  Z = 40                                   |  Z = 4                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap11242                     
  I = 1463                                 |  I = 9                                    
  Z = 193                                  |  Z = 4                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap11376                     
  I = 26                                   |  I = 4                                    
  Z = 43                                   |  Z = 4                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap11377                     
  I = 5                                    |  I = 4                                    
  Z = 2                                    |  Z = 5                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: wire12481                        
  I = 38                                   |  I = 5                                    
  Z = 122                                  |  Z = 8                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap13972                     
  I = 9                                    |  I = 6                                    
  Z = 42                                   |  Z = 7                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap13986                     
  I = 250                                  |  I = 5                                    
  Z = 1463                                 |  Z = 7                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: wire14239                        
  I = 523                                  |  I = 4                                    
  Z = 8                                    |  Z = 6                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: wire14248                        
  I = 1014                                 |  I = 6                                    
  Z = 1014                                 |  Z = 6                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: wire14422                        
  I = 11                                   |  I = 4                                    
  Z = 142                                  |  Z = 5                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap14425                     
  I = 50                                   |  I = 4                                    
  Z = 9                                    |  Z = 5                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap14430                     
  I = 6                                    |  I = 6                                    
  Z = 1463                                 |  Z = 4                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: wire14487                        
  I = 1463                                 |  I = 4                                    
  Z = 26                                   |  Z = 6                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap14490                     
  I = 41                                   |  I = 5                                    
  Z = 55                                   |  Z = 6                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap14564                     
  I = 1463                                 |  I = 5                                    
  Z = 250                                  |  Z = 6                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: wire14588                        
  I = 10                                   |  I = 5                                    
  Z = 243                                  |  Z = 6                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap14589                     
  I = 3                                    |  I = 4                                    
  Z = 5                                    |  Z = 5                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap14811                     
  I = 1014                                 |  I = 4                                    
  Z = 291                                  |  Z = 4                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: wire15281                        
  I = 44                                   |  I = 4                                    
  Z = 44                                   |  Z = 5                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap15282                     
  I = 523                                  |  I = 4                                    
  Z = 172                                  |  Z = 4                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap15305                     
  I = 523                                  |  I = 7                                    
  Z = 523                                  |  Z = 6                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap15359                     
  I = 39                                   |  I = 3                                    
  Z = 15                                   |  Z = 6                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap15380                     
  I = 11                                   |  I = 6                                    
  Z = 10                                   |  Z = 4                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap15381                     
  I = 6                                    |  I = 5                                    
  Z = 31                                   |  Z = 6                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap15389                     
  I = 9                                    |  I = 4                                    
  Z = 3                                    |  Z = 3                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: wire15447                        
  I = 1463                                 |  I = 5                                    
  Z = 3                                    |  Z = 8                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap15464                     
  I = 5                                    |  I = 4                                    
  Z = 5                                    |  Z = 5                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap15481                     
  I = 523                                  |  I = 5                                    
  Z = 523                                  |  Z = 4                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap15523                     
  I = 3                                    |  I = 6                                    
  Z = 3                                    |  Z = 4                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap15591                     
  I = 3                                    |  I = 5                                    
  Z = 11                                   |  Z = 5                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap15592                     
  I = 5                                    |  I = 5                                    
  Z = 5                                    |  Z = 4                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap15593                     
  I = 3                                    |  I = 3                                    
  Z = 15                                   |  Z = 5                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap15596                     
  I = 7                                    |  I = 3                                    
  Z = 18                                   |  Z = 4                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap15600                     
  I = 20                                   |  I = 6                                    
  Z = 142                                  |  Z = 4                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap15705                     
  I = 6                                    |  I = 6                                    
  Z = 50                                   |  Z = 7                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap15735                     
  I = 7                                    |  I = 5                                    
  Z = 9                                    |  Z = 4                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap15973                     
  I = 18                                   |  I = 4                                    
  Z = 218                                  |  Z = 8                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: wire15976                        
  I = 33                                   |  I = 5                                    
  Z = 33                                   |  Z = 8                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap15984                     
  I = 15                                   |  I = 5                                    
  Z = 699                                  |  Z = 4                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: wire15985                        
  I = 44                                   |  I = 3                                    
  Z = 44                                   |  Z = 7                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap16059                     
  I = 44                                   |  I = 7                                    
  Z = 44                                   |  Z = 4                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap16238                     
  I = 1463                                 |  I = 6                                    
  Z = 148                                  |  Z = 6                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: wire16239                        
  I = 1014                                 |  I = 3                                    
  Z = 44                                   |  Z = 6                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap16250                     
  I = 2                                    |  I = 4                                    
  Z = 71                                   |  Z = 6                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap16268                     
  I = 523                                  |  I = 5                                    
  Z = 4                                    |  Z = 4                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap16348                     
  I = 523                                  |  I = 5                                    
  Z = 523                                  |  Z = 6                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap16351                     
  I = 71                                   |  I = 5                                    
  Z = 71                                   |  Z = 5                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap16352                     
  I = 1014                                 |  I = 5                                    
  Z = 13                                   |  Z = 5                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap16936                     
  I = 3                                    |  I = 6                                    
  Z = 40                                   |  Z = 4                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: fanout22176                      
  I = 3                                    |  I = 4                                    
  Z = 5                                    |  Z = 11                                   
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: wire6254                         
  I = 10                                   |  I = 3                                    
  Z = 6                                    |  Z = 6                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: max_cap15214                     
  I = 6                                    |  I = 6                                    
  Z = 4                                    |  Z = 5                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
                                           |                                           
Instance: gf180mcu_fd_sc_mcu9t5v0__clkbuf_ |Instance: wire20214                        
  I = 4                                    |  I = 4                                    
  Z = 7                                    |  Z = 7                                    
  VDD = 275388                             |  VDD = 280586                             
  VNW = 275388                             |  VNW = 280586                             
  VPW = 275386                             |  VPW = 280584                             
  VSS = 275386                             |  VSS = 280584                             
---------------------------------------------------------------------------------------
Netlists do not match.
Port matching may fail to disambiguate symmetries.

Subcircuit pins:
Circuit 1: chip_top                        |Circuit 2: chip_top                        
-------------------------------------------|-------------------------------------------
VDD                                        |(no pin, node is \i_chip_core.core2.b.gen_ 
VSS                                        |(no pin, node is net18517)                 
clk_PAD                                    |clk_PAD                                    
analog_PAD[0]                              |analog_PAD[1] **Mismatch**                 
analog_PAD[1]                              |analog_PAD[0] **Mismatch**                 
input_PAD[0]                               |input_PAD[9] **Mismatch**                  
input_PAD[1]                               |input_PAD[8] **Mismatch**                  
input_PAD[2]                               |input_PAD[7] **Mismatch**                  
input_PAD[3]                               |input_PAD[6] **Mismatch**                  
input_PAD[4]                               |input_PAD[5] **Mismatch**                  
input_PAD[5]                               |input_PAD[4] **Mismatch**                  
input_PAD[6]                               |input_PAD[3] **Mismatch**                  
input_PAD[7]                               |input_PAD[2] **Mismatch**                  
input_PAD[8]                               |input_PAD[1] **Mismatch**                  
input_PAD[9]                               |input_PAD[11] **Mismatch**                 
input_PAD[10]                              |input_PAD[10]                              
input_PAD[11]                              |input_PAD[0] **Mismatch**                  
rst_n_PAD                                  |rst_n_PAD                                  
bidir_PAD[10]                              |bidir_PAD[10]                              
bidir_PAD[11]                              |bidir_PAD[11]                              
bidir_PAD[12]                              |bidir_PAD[12]                              
bidir_PAD[13]                              |bidir_PAD[13]                              
bidir_PAD[14]                              |bidir_PAD[14]                              
bidir_PAD[15]                              |bidir_PAD[15]                              
bidir_PAD[16]                              |bidir_PAD[16]                              
bidir_PAD[0]                               |bidir_PAD[1] **Mismatch**                  
bidir_PAD[1]                               |bidir_PAD[0] **Mismatch**                  
bidir_PAD[33]                              |bidir_PAD[39] **Mismatch**                 
bidir_PAD[34]                              |bidir_PAD[38] **Mismatch**                 
bidir_PAD[35]                              |bidir_PAD[37] **Mismatch**                 
bidir_PAD[20]                              |bidir_PAD[36] **Mismatch**                 
bidir_PAD[36]                              |bidir_PAD[35] **Mismatch**                 
bidir_PAD[21]                              |bidir_PAD[34] **Mismatch**                 
bidir_PAD[37]                              |bidir_PAD[33] **Mismatch**                 
bidir_PAD[22]                              |bidir_PAD[32] **Mismatch**                 
bidir_PAD[38]                              |bidir_PAD[31] **Mismatch**                 
bidir_PAD[23]                              |bidir_PAD[30] **Mismatch**                 
bidir_PAD[39]                              |bidir_PAD[29] **Mismatch**                 
bidir_PAD[24]                              |bidir_PAD[28] **Mismatch**                 
bidir_PAD[25]                              |bidir_PAD[27] **Mismatch**                 
bidir_PAD[26]                              |bidir_PAD[26]                              
bidir_PAD[27]                              |bidir_PAD[25] **Mismatch**                 
bidir_PAD[28]                              |bidir_PAD[24] **Mismatch**                 
bidir_PAD[29]                              |bidir_PAD[23] **Mismatch**                 
bidir_PAD[17]                              |bidir_PAD[22] **Mismatch**                 
bidir_PAD[18]                              |bidir_PAD[21] **Mismatch**                 
bidir_PAD[19]                              |bidir_PAD[20] **Mismatch**                 
bidir_PAD[30]                              |bidir_PAD[19] **Mismatch**                 
bidir_PAD[31]                              |bidir_PAD[18] **Mismatch**                 
bidir_PAD[32]                              |bidir_PAD[17] **Mismatch**                 
bidir_PAD[3]                               |bidir_PAD[3]                               
bidir_PAD[4]                               |bidir_PAD[4]                               
bidir_PAD[2]                               |bidir_PAD[2]                               
bidir_PAD[5]                               |bidir_PAD[5]                               
bidir_PAD[6]                               |bidir_PAD[6]                               
bidir_PAD[7]                               |bidir_PAD[7]                               
bidir_PAD[8]                               |bidir_PAD[8]                               
bidir_PAD[9]                               |bidir_PAD[9]                               
(no pin, node is net20381)                 |VSS                                        
(no pin, node is net20381)                 |VDD                                        
---------------------------------------------------------------------------------------
Cell pin lists for chip_top and chip_top altered to match.
Device classes chip_top and chip_top are equivalent.

Final result: Top level cell failed pin matching.
