wafer.space Community - CoB PCB (0.5x0.5 focus) 🧵

2:30 p.m.

Change from previous PCBs:

No vias or though holes in enclosed area (under the epoxy glob)
Made pins on the mezzanine longer, bumped to 0.8 mm to help SMD soldering, we might want to make this even longer. The coordinates of the mezzanine footprint pins have not changed so this change should have no effect for the pick-and-pace. No changes:
part positions: mezzanine, die footprint and SMD capacitors are all at exactly the same place Things we might want to change:
No fill zone in the encapsulation region Things I want to change:
constant bonding wire length from die to finger
more gradual angle changes in bonder trajectory (seem to not handle abrusc transitions very well, see corners )
length match signal wire or at least attempt to have them closer in cumulative length.

Watchout elongating pins like that because for automated assembly that means more paste and could end up bridging.

tnt

Watchout elongating pins like that because for automated assembly that means more paste and could end up bridging.

Very good point.

tnt

Watchout elongating pins like that because for automated assembly that means more paste and could end up bridging.

Think the extra 0.14 mm puts us at risk ? Because, my thinking is we want more paste to prevent the pins disconnecting from the mezzanine, but also want to prevent shorts. If the answer is yes, I will revert not questions asked.

I have no idea, I usually just follow the vendor recommended footprint and assume they did their homework

2:44 p.m.

but 0.14mm seem unlikely to make much of a difference

tnt

I have no idea, I usually just follow the vendor recommended footprint and assume they did their homework

Thanks, off to read the datasheet then

2:51 p.m.

I also really wondering when the mezannines disconnected. Because they might have done so during the "reflow" step in the packaging house and have been perfectly fine when JLC delivered them.

Do we have microscope shots of the failure ?

tnt

Do we have microscope shots of the failure ?

Don't know, but this is what I have (was shared https://discord.com/channels/1361349522684510449/1408134567491145728/1515658100030312499 )

The pins are still gold, they never wetted and they're bent. (edited)

2:56 p.m.

The connectors were damaged before soldering.

1

tnt

The connectors were damaged before soldering.

Thanks, you are a badass tnt

(edited)

Potentially some vias near the pads should be moved back a bit if the goal is to have none under the epoxy. That might be easier if you move to something more similar to the pad frame you posted in the TT discord.

3:22 p.m.

I suspect it will be difficult to make the larger dies work with no vias inside the pad ring, although reducing the size of the pads should give you a bit more space

tnt

I have no idea, I usually just follow the vendor recommended footprint and assume they did their homework

oh yeah, if they're assembled by JLCPCB do take the footprints they have on their easyeda for the part, at least drawing-wise

RebelMike

Potentially some vias near the pads should be moved back a bit if the goal is to have none under the epoxy. That might be easier if you move to something more similar to the pad frame you posted in the TT discord.

It defiantly will but my current plan is to first see if I can get these changes approved before taking such a departure. For clarity of reading he is referencing to my automatic CoB footprint generator (https://discord.com/channels/1009193568256135208/1009193776155205696/1535851539502075936). I will move the vias further out

RebelMike

I suspect it will be difficult to make the larger dies work with no vias inside the pad ring, although reducing the size of the pads should give you a bit more space

I have a feeling it might be better to have the PCB-side bond pads not be as wide in favor of them being allowed closer; after all, the machien does reliably hit the far smaller passivation openings on the dies.... Unless that means the die would need to be aligned accurately enough to the die ahead of the wire bonding machine getting it's turn; AFAIK that's a premium offer of the factory (alignment by machine to be substantially more precise)

1

RebelMike

I suspect it will be difficult to make the larger dies work with no vias inside the pad ring, although reducing the size of the pads should give you a bit more space

Difficult for sure, but I don't think it will be impossible, they use 4 layers PCBs unlike the 2 layers here, I think I can make it work. Also, I have no intention of modifying the pad sizes. The pads where just bigger on the test I posted, it was just a trial run for the algo.

anyways, go have fun, best luck to ya!

1

namibj

I have a feeling it might be better to have the PCB-side bond pads not be as wide in favor of them being allowed closer; after all, the machien does reliably hit the far smaller passivation openings on the dies.... Unless that means the die would need to be aligned accurately enough to the die ahead of the wire bonding machine getting it's turn; AFAIK that's a premium offer of the factory (alignment by machine to be substantially more precise)

I think the issue there might be JLC's requirements for wire width.

Essen

I think the issue there might be JLC's requirements for wire width.

I'm literally basing it on the spacing between pads; and the trace width I see between the vias and the pads, on the red layer here: https://discord.com/channels/1361349522684510449/1408134567491145728/1536016323061223484

1

Mezzanine footprint: Assuming connector is : https://www.lcsc.com/product-detail/C19089236.html?spm=wm.fly.bg.1.xh&lcsc_vid=QwRcU1cHRFULBFdQRFgIVVxQQQJWUVYHRAMNVlJQRAAxVlNeQVNXUlRTT1lfVTsOAxUeFF5JWBYZEEoKFBINSQcJGk4eFQsCAgIaSgADAwAHC0slRlheX11UTlNADxALGw%3D%3D

HC-PBB40C-70DP-0.4V-02 | Arrays, Edge Type, Mezzanine (Board to Boa...

HC-PBB40C-70DP-0.4V-02 Arrays, Edge Type, Mezzanine (Board to Board) by HCTL. Features - and -35℃~+85℃. From $0.3354, in stock. Datasheet available.

5:16 p.m.

The default mezannine is perfectly inline with the datasheet

Updated layout, moved via on left side further away

6:05 p.m.

DRC is clear

Looks good, though where have all the ground vias gone?

Essen

Mezzanine footprint: Assuming connector is : https://www.lcsc.com/product-detail/C19089236.html?spm=wm.fly.bg.1.xh&lcsc_vid=QwRcU1cHRFULBFdQRFgIVVxQQQJWUVYHRAMNVlJQRAAxVlNeQVNXUlRTT1lfVTsOAxUeFF5JWBYZEEoKFBINSQcJGk4eFQsCAgIaSgADAwAHC0slRlheX11UTlNADxALGw%3D%3D

I did not say the datasheet foorprint, I meant the foorprint they drew for their easyeda CAD which has in that process been greenlit by their engineers for production usage on their PCBA process.

RebelMike

Looks good, though where have all the ground vias gone?

"who needs ground vias"

RebelMike

Looks good, though where have all the ground vias gone?

Oups, thanks for catching that, might have gone a bit to far in my removing them, let me add some back (edited)

Essen

Difficult for sure, but I don't think it will be impossible, they use 4 layers PCBs unlike the 2 layers here, I think I can make it work. Also, I have no intention of modifying the pad sizes. The pads where just bigger on the test I posted, it was just a trial run for the algo.

4 layer PCBs are almost the same cost as 2 layer PCBs in my experience.

11:52 p.m.

@Essen - if you want to be really fancy, you should work out how to draw the bond wires in 3d between the pads on the ICs and the PCB pads.

11:53 p.m.

@Essen - there are a whole bunch of academic papers about the pathway the bond machine is supposed to follow for good bonds.

Tim 'mithro' Ansell

@Essen - there are a whole bunch of academic papers about the pathway the bond machine is supposed to follow for good bonds.

Bring on the papers: if you have any to recommend I will read them.

Tim 'mithro' Ansell

@Essen - if you want to be really fancy, you should work out how to draw the bond wires in 3d between the pads on the ICs and the PCB pads.

Haha, that is much too fancy for me, I am a simple girl. I just deal in expensive crystals. (edited)

Gnd via's re-added. (edited)

2:51 a.m.

undid change on mezannine connectors: back to default 0.66mm

But your ground is terrible ... look at the path it needs to take to go from a ground pin to the connector ... in theory that should be like your best/shortest path.

tnt

But your ground is terrible ... look at the path it needs to take to go from a ground pin to the connector ... in theory that should be like your best/shortest path.

Less wimpy gnd, does this look passable for you @tnt ? (edited)

gnd vias an filling added back :

I think it'd be good to have industry experience guided input on whether and if so, how, PTH/via structures (notably, with what possibly constraints on covering/tenting) are ok/problematic to have under the bond wires in the glob coverage zone. I'm pretty sure the observed bubbling was from COBs that had fairly narrow top-open bottom-closed holes there; I would not be surprised if in practice those (and huge openings that easily drip glob material) are the only problematic hole types to have under the glob. And a spam of gnd vias at the central north and south would be much better than these 4 isolated ones, especially for acting as the EM wave return path of the IO connections which for just that IIRC doesn't even need the die's own ground bonds to be as numerous.