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    "name": "Generate clean padring",
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      "timestamp": "2025-12-02T01:05:47.471+00:00",
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      "content": "Hi all,\nI am trying to generate a clean pad frame for manual top level connections following the script here: https://github.com/wafer-space/gf180mcu-project-template/pull/29/commits/34fc81fc1c3d354f5d73af2510585641c9bfa93c\n\nSince for a clean pad frame, we don't have the chip_core, just chip_top, what is the proper way of providing the config pins of these instantiated pads? I've tried\n 1) '0/'1: leads to magic-klayout XOR errors and some lvs errors of the pad frame\n2) VSS/VDD: leads to lvs errors for short-connect the power grids.\n\nThanks for your help!",
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      "content": "Since you do manual top-level connections the padring is streamed out before any of the stdcells are placed and routed. Therefore you cannot connect any constants to the pins (you can, but there will be no connections).\nYou need to manually tie these pins after the GDS for the padring has been generated.",
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      "content": "Got it, thanks!",
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      "timestamp": "2025-12-06T19:54:27.904+00:00",
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      "content": "Just to double check, this clean pad ring generator script is still valid after the project template update right?",
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      "content": "Yes, I merged the PR into main. You can create a standalone padring via `make librelane-padring`.",
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