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Guild: wafer.space Community
Channel: Information / questions / F_t / F_max
After: 03/31/2026 23:59
Before: 05/01/2026 00:00
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[04/15/2026 00:47] namibj
Does anyone have numbers? I know they're inherently theoretical but it's still some sense of scale...


[04/15/2026 06:41] ravenslofty
my chess move generator is heavily combinational, but I had to use a multicycle path to get it to pass typical and fast corners at 60MHz, *with* the 9T standard cell library


[04/15/2026 13:43] mavmaster
My team simulated an F_t of ~65GHz if I recall correctly. We are only doing RF work up to 600MHz on this node atm though.

{Reactions}
ferrisCatOwO

[04/15/2026 17:00] namibj
Asking because I'm looking about porting the MCML digital PLL core (sans the digital scaffold around said core for now at least, kinda a bit rushed) I'm expecting to get into TTSKY26a over to the wafer.space Run 2 after the TT deadline.
If anyone happens to be interested in letting such a small bit live at an edge of a mostly-other-things chip of wafer.space Run2, and could be willing to offfer a bit of scan chain state and like about 2~4 IO pads, it _could_ maybe even do a multi-gigabit TX test, but we're talking like 10% of a half-tile of Run2 even with the transmitter's NRZ PA.

{Reactions}
🔥

[04/15/2026 17:06] mavmaster
Dm me but I fear I cant promise the space until our project is complete (will also be rushed)


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