While there are 3v3 cells being defined for wafer.space on GF180, I suspect that Tiny Tapeout would require all tiles on a given shuttle to have the same characteristics as each other, since they are using the same I/Os and are multiplexed.
17:44
Still, the Tiny Tapeout discord would be a better place for this discussion:
Hi @Tim 'mithro' Ansell ! Hey, I have my first TT in the works. I didn't get as far along as I'd like for the sky130, but I've been keeping a gf180 in sync and plan for June submission. I see there are a variety of gf changes coming. I have some free time. Anything I can do to help test?
gojimmypi
Hi @Tim 'mithro' Ansell ! Hey, I have my first TT in the works. I didn't get as far along as I'd like for the sky130, but I've been keeping a gf180 in sync and plan for June submission. I see there are a variety of gf changes coming. I have some free time. Anything I can do to help test?
I don't know how hard it is but Tholin's 3v3 stdcell library's latches don't have STA yet blocking them from being synthesized. https://discord.com/channels/1361349522684510449/1509460314155122759/1509561262307147828
I don't know how hard that is and how practical they are to actually use, but the fine m1 combined with larger minimum devices (3v3 not 1v8) might make it more relevant in practice?
namibj
I don't know how hard it is but Tholin's 3v3 stdcell library's latches don't have STA yet blocking them from being synthesized. https://discord.com/channels/1361349522684510449/1509460314155122759/1509561262307147828
I don't know how hard that is and how practical they are to actually use, but the fine m1 combined with larger minimum devices (3v3 not 1v8) might make it more relevant in practice?
The timing analysis exercise sounds interesting. I'm not familiar with the toolchain. Can you point me in the right direction to get started? It may be a little ambitious, but I'm willing to give it a try.
gojimmypi
The timing analysis exercise sounds interesting. I'm not familiar with the toolchain. Can you point me in the right direction to get started? It may be a little ambitious, but I'm willing to give it a try.
Tiny Tapeout GF180 (wafer.space) shuttles - Verilog HDL Projects: Universal Asynchronous Receiver/Transmitter Finite State Machine for Exploring ASIC Hardware Physically Unclonable Function True Ra...
gojimmypi
The timing analysis exercise sounds interesting. I'm not familiar with the toolchain. Can you point me in the right direction to get started? It may be a little ambitious, but I'm willing to give it a try.
✅ flummer reported @thomasflummer's Linear Timecode (LTC) generator as working: Timecode is send out and can be parsed by TimeCode Monitor on my computer when run though the Audio PMOD and then into an audio interface.
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