

example_project by going into example_project and running make project, right?
Ciel will then fetch the PDK that is marked supported by LibreLane. However I get stuck at GlobalPlacement:
Iter | Area | Removed | Inserted | Pins
| | Buffers | Buffers | Remaining
-------------------------------------------------------
0 | +0.0% | 0 | 0 | 468
46 | +0.0% | 0 | 0 | 422
92 | +0.0% | 0 | 0 | 376
[CRITICAL RSZ-2008] buffering pin _545_/ZN: wire step options empty
Could it be that you implemented the example_project with a different version of LibreLane than in the nix-shell of this repository?
If so - that would be great! Then I would have another reproducible for #8229, which is not related to the I/O pads.
