With the deadline for GF180MCU Run #1 rapidly coming up, I'm starting to think about when / how to schedule GF180MCU Run #2.
It is currently expected that Run #1 will come back in March 2026. I'm thinking it's best to have the closing time for Run #2 sometime after that so people can demonstrate working silicon.
I would love thoughts, suggestions, opinions on what type of timeline makes sense to people.
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04:43
@Leo Moser (mole99) / @urish / @Tholin - I assume you probably have opinions.....
I would think that waiting after run #1 is done and people had time to test is a good idea. Unless there is is enough demand to completely fill a run #2 before that ( which I doubt ), I don't really see any benefit into making it before.
I agree with Sylvain. It would be good to be able to test designs before the next shuttle. And seeing the designs in action would be even more an incentive for people to buy a slot on the next shuttle.
Four runs might be quite a lot initially. Maybe you want to reduce them for 2026?
As an end goal, that seems fine, but when things are getting started, I wouldn't rush.
Beside the obvious "does it work" and "demo effect" :
(1) being the first run, there is also the question of how packaging / bonding will work out which might influence what people want to do for the next runs.
(2) I don't have the numbers, but I would expect the first few runs might end up being run at a loss and it might take time for people to get moving designing stuff, so not burning all capital before that happens would be good
I think demonstration of working designs - especially if any of them were available as references - would do a lot to encourage people to submit designs.
01:30
Ideally, somebody could put together a video with an overall workflow as well - for example, walking through the major parts of an existing project, like the top-level template, how to connect to the I/O pads, and a build workflow.
Not sure how to express my thoughts - but I think a lot of people are not familiar with the world of silicon (beyond FPGAs), and aren't sure what to watch out for (to prevent things from going wrong). Having a reference project to start with goes a long way
01:39
"These inputs produce these outputs"
dshadoff
Not sure how to express my thoughts - but I think a lot of people are not familiar with the world of silicon (beyond FPGAs), and aren't sure what to watch out for (to prevent things from going wrong). Having a reference project to start with goes a long way
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